Voltage Harmonic Control of Z-source Inverter
for UPS Applications
Arkadiusz Kulka, Tore Undeland
Norwegian University of Science and Technology
O.S. Bragstadsplass 2E, Trondheim, Norway
+47 73594241
e-mail: {arkadiusz.kulka, tore.undeland}@elkraft.ntnu.no
URL: http://www.elkraft.ntnu.no/eno
Abstract—This paper presents a control method for
obtaining sinusoidal output voltage regardless of the
nonlinear and unbalanced loads. Control of the DC boost
stage and capacitor voltage is presented. The resonant
regulators are used for selective harmonic cancelation of the
output AC voltage. The Z-source inverter is able to provide
higher AC voltage related to the DC link voltage than in
conventional VSI, possessing embedded property of boost
converter. This work presents the optimal control of boost
factor and capacitor voltage, reducing the voltage transistor
stress under desired AC voltage level. Experiment
implementation on TMS320F2812 DSP show possibility of
accommodating blanking time DSP circuits for controlling
shoot-through duty ratio without any additional external
logic. Modified space vector modulation gives only two
transistor switching per cycle, thus minimizing the
switching loses as much as possible.
Keywords—uninterruptible power supply, Z source
inverter, distributed power generation, voltage control,
renewable energy.
I.
INTRODUCTION
Z-source voltage-type inverter (ZSI) has been proven
experimentally and in the literature as an attractive
single-stage solution for buck-boost, three phase dc-ac
power conversion [1]. The general layout is shown in
Fig. 1.
The ZSI provides special features which can’t be
observed in the traditional VSI inverter:
• The ZSI is a boost converter for dc-ac power
conversion and higher peak to peak ac output voltage
can be obtained than available input voltage.
• A short circuit across any phase legs is allowed, so
the dead time is not necessary. The cross conductive
short circuit is called shoot through state and is
similar to those in Current Source Inverter.
• Shorting of any phase legs provide a boost up
capability, thus must be carefully controlled (similar
to step-up converter).
The proposed AC voltage control scheme is suited for
ZSI with LC output filter. It use resonant regulators (1)
and it is suited for UPS or standalone power generation
where sine wave output voltage is to be maintained. The
proposed controller is able to compensate voltage
distortion from unbalanced and nonlinear loads, thus
controlling negative and positive voltage sequence and its
harmonics. For control purpose only two phase to phase
output voltage measurements are required and one
measurement of the C2 capacitor voltage (pseudo dc link).
Fig. 1. Three phase Z source inverter.
II. AC VOLTAGE CONTROL TOPOLOGY
The proposed control topology is depicted in Fig. 2 and
is based on [2]. Filter capacitor current control is used for
selective harmonic voltage rejection. As an alternative to
sensing the capacitor current a sensor less scheme is used
based on derivative of output voltage. The derivative
introduces higher amplitude gain for higher harmonics.
Normally the filter capacitor current contain large amount
of switching noises and the derivative in the digital
system will additionally introduce delay and even more
noise. It is found that resonant controller handle well this
type of signal. The delay associated with modulator and
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c 2008 IEEE
978-1-4244-1742-1/08/$25.00 discrete derivative can be compensated by adjusting the
leading angle J of resonant controller (1) for given
harmonic. The so called leading angle can change phase
relation between input and output which can be adjusted
due the fact that (1) is composed of two orthogonal
components.
s ˜ cos(J ) Z ˜ sin(J )
(1)
Hac( s ) K i ˜
s2 Z 2
The system delay is the same for all harmonics, but for
each separate harmonic there is different compensation
(leading) angle. Note, that with increased order of
harmonic the given leading angle is increasing. E.g. for
fundamental harmonic of 50Hz, one sample delay
(e.g.100us) is just 1.8 degree, but for 11th harmonics it is
almost 20 degree. In order to achieve high quality voltage
output the 5th, 7th, 11th and 13th harmonic must be
included. Without correcting the leading angle for the last
two harmonics the quality would be not satisfactory.
The reference for capacitor current iCref,D, iCref,E (2) is
easily obtained from voltage reference vref,D, vref,E (3) by
interchanging axes and thus obtaining 90O advanced
reference angle. It should be noted that in current
reference definition capacitor value is included, but later
on is cancelled out as can be seen in Fig. 6, avoiding the
C parameter uncertainty.
ªiC ,ref ,D º
«i
»
¬ C ,ref , E ¼
ª vref ,E º
«v
»>Z ˜ C @
¬ ref ,D ¼
(2)
ªvref ,D º
«v
»
¬ ref ,E ¼
ªcos(Zt )º
« sin(Zt ) » ˜ vd ,ref
¬
¼
(3)
Fig. 2. Voltage harmonic controller layout.
III. MODULATOR WITH SHOOT THROUGH STATES
ZSI uses modified modulation strategy that insert shoot
through states into standard space vector modulation,
SVM [4]. These shoot-through states boost the dc link
capacitor voltages and can be placed instead the null
states without altering the normalized volt-sec average
voltage. The duration of each active state in a switching
cycle is kept the same as in traditional SPWM. Therefore,
the output waveform will still be kept sinusoidal. The
generation of switching signals is shown in Fig. 3.
The first shoot through interval TST/3 is inserter
between two active states (common point of a and b line
in Fig. 3). The active states are left/right shifted
accordingly by TST/6 with their time intervals kept
constant, and the remaining two (most left and most
right) shoot-through states (TST/3) are lastly inserted
within the null intervals, at the beginning and end of
active states. The modulation is symmetrical (left and
right side of Fig. 3 is the mirror image). This way of
sequencing inverter states also ensures a single device
switching at all transitions and also allows
simultaneously use of shoot through states
The reference signals of the inverter legs for upper and
lower transistors are shown on Fig. 4. Very important
implementation detail is that during the saturation
(usually transients), the highest priority is given to the
shoot through states (Fig. 5), so the active states are
clamped first. This allow boost up the voltage first and
then the modulation index can come back to not saturated
level.
2008 13th International Power Electronics and Motion Control Conference (EPE-PEMC 2008)
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Fig. 3. Generation of switching signals, with shoot through states (red).
Fig. 4. Reference signal for modulator during steady state operation.
The bands limited by parallel lines are the shoot through states.
In experiment the selection of inductance was based on
ripple current and maximum transistor current.
Since the transistor peak current is high (60 A), the
converter rated current was defined as 10 A, the DSP
cannot output long ST states (and we don’t want use long
time for ST during one PWM period), relatively small
inductor in size and value can be designed. With this
specific hardware it was convenient to have high current
ripple (utilizing fully transistors and short ST time), but
this is not usual case.
Assumed maximum capacitor voltage of 400 V,
maximum ripple current of 40 A, the maximum shoot
through time is limited by the DSP to 3 Ps.
L
TST VCAP
'I MAX
30PH
IV. VIRTUAL DC LINK VOLTAGE CONTROLLER
Fig. 5. Reference signal for modulator during transients. The modulated
signal become saturated but not the shoot through signal.
For the simulation and the experiment the switching
frequency was set to 10 kHz. The shoot through zero state
(ST) was populated among the three phase legs,
achieving equivalent switching frequency of 60 kHz from
the view of Z-source network.
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The average of pseudo dc-link voltage across the
inverter bridge is identical to the capacitor voltage
because the average of an inductor voltage is zero. The
capacitor voltage (C1 and C2) is dependent on the shoot
through time, and it can be stepped up by increasing
shoot-through time. Reducing the transistor voltage stress
under a desired load is important, it should ensure that
there is no high boost ratio and simultaneously the
modulation index is not fully used (and the dc voltage as
well). As has been analyzed in [1] the voltage gain
(boost) is defined as B=(1-2TST/T)-1, B is always t1,
where TST is the half of shoot through time during the
switching period T.
2008 13th International Power Electronics and Motion Control Conference (EPE-PEMC 2008)
The AC voltage output relation is, vpeak,phase=M B VDC
where M is the modulation index. Therefore, to minimize
the voltage stress for any given voltage gain, we have to
maximize the range of modulation index M by using as
much of available DC link voltage and leaving enough
time for shoot through state. Defining the shoot through
duty ratio by DST = TST/T resulting that during normal
operation.M+DSTd1 In case of using boost property,
minimum voltage stress appears for M+DST=1.
A discrete-time PI voltage controller based on
trapezoidal method of approximation is used to regulate
the average voltage of DC-link, VC2 (Fig. 6). It is
important to include the wind up protection, thus limiting
the maximum shoot through duty ratio.
Fig. 8. Duty ration of modulation signal, when voltage harmonic
algorithm is enabled.
Figure 8 shows the controller output modulation in
phase A and B which is given to SVM. The visible
ripples are cancelling the influence of rectifier current on
output filter. Because the goal is to achieve sinusoidal
voltage, they compensate voltage droop over a filter
inductance. The blue line shows the 1/3 of the shoot
through time, so this explain why modulation index at
peaks is not reaching one, summing up gives,
0.65 + 3 * 0.11 = 0.98.
Fig. 6. Optimal DC-link voltage controller
As a result the aim of this controller is to keep the
maximum peak modulation index as close to one as
possible. The vD and vE are the output signals of the
voltage controller, and the peak value of that vector is
calculated. The other feed-forward term is calculation of
equivalent voltage which would be “taken out” by shoot
through duty ratio and not available for active vectors. It
is very important to add this term, as the DST is increasing
(consuming equivalent time of zero vectors) there is less
available time for the active vectors.
V. SIMULATION RESULTS
In Fig. 7 the simulation shows the load voltages and
currents under a rectifier load. The DC source voltage is
400 V. The output reference AC voltage is set to 600 V
peak.
Fig. 9. Response of the optimal dc-link controller.
Figure 9 shows the start up response of dc-ling boost
controller to a given set-point value. Dc link voltage at C2
(green), DC supply voltage (blue), and shoot through
time (red).
The problem can arise when very nonlinear current is
drawn (crest factor >2). This leads to high spikes in
reference voltage calculated by set of resonant
controllers. The spikes “consume” the dc-link voltage,
thus leading to even higher boost factor. The problem in
real implementation was solved by inserting a peak
detector and large time constant low-pass filter. The
insertion took place in Fig. 6 between the instantaneous
reference vD, vE and module calculation and the
summation block.
VI. EXPERIMENTAL RESULTS
Fig. 7. Inverter Output voltage and load currents, no boost, voltage
harmonic enabled.
Since the standard VSI converter cannot be used due to
significant changes in dc-link layout and gate signal
interlocking, the 3 kW prototype of Z-source inverter was
design and constructed. The used transistors rated current
is 60 A, and voltage class of 1200 V. The gate driver is
based on monolithic, opto isolated integrated circuit
HCPL 316J which require galvanic small power supply
for each transistor. Two level over voltage dc-link
protection is also designed, since it easy to boost voltage
to dangerous level for dc-link capacitors and transistors.
There is no hardware interlocking protection for upper
and lower transistors, so the gate signals from DSP card
2008 13th International Power Electronics and Motion Control Conference (EPE-PEMC 2008)
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are directly connected to the gate drivers enabling shootthrough. The capacitor over voltage protection act in two
steps. First the transistor which damp the power to the
resistor is activated, secondly if the voltage is still
increasing and pass certain level the signals to the drivers
are cut down. The protection circuit is visible on the right
side of the board at Fig. 10.
Fig. 11. Two phase sinusoidal output voltage with harmonic
cancellation enabled, no load current.
The influence of enabling selective voltage harmonic
cancellation algorithm is illustrated in Fig. 12 and
Fig. 13.
Fig. 10. Photograph of the setup: control board, inverter, Z network.
The controller is DSP, TMS320F2812 which has all
necessary circuits, like A/D converter, PWM generator
and embedded hardwire to control dead time. The PWM
outputs also can be adjusted to be active high or low.
Exploiting those features enables direct DSP control of
duty ratio and shoot through factor. The dead time unit
act as a shoot through time generator and is adaptively
changed during operation. A found limitation in DSP is
that the shoot through can be only 3,2 Ps for a given
PWM resolution, and there are always six shoot through
per switching period, giving a total of 19,2 Ps. For 100 Ps
switching period and PWM resolution of 6,66 ns the step
up duty ratio is limited to 19 %. By lowering the
resolution the boost factor can be further increased.
The death time generator from the DSP act as a shoot
through generator, however the death time logic actually
consumes the average volt-sec of the modulator duty. In
order to prevent it a software correction function is
introduced which shifts the active states by adding
duration which is proportional to ST time. With varying
ST time (the band on Fig. 4) the active states are shifted
accordingly. The function is similar to one used for
correcting death time effect in conventional VSI where
current control is used. The death time correction is
especially important e.g. when virtual flux is estimated
[9].
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Fig. 12. Voltage and current on rectifier type of load connected to the
output as a nonlinear load. The voltage harmonic cancellation is
disabled.
Fig. 13. Voltage and current on rectifier type of load connected to the
output as a nonlinear load. The voltage harmonic cancellation is
enabled.
2008 13th International Power Electronics and Motion Control Conference (EPE-PEMC 2008)
In both cases the supply voltage is 80 V, and the
reference output peak voltage is 100V. The boost factor is
25%. The three phase rectifier output is connected
parallel to 4700 PF capacitor and to 25 : load resistor.
minimum load, the diesel could run with lower speed,
saving the fuel, and the required AC voltage would be
still achieved. It can be used for renewably energy
sources where is need for small boost up capability but it
should not exchange transformers where is need for high
boost up (like PV generation). In practice to comply with
standards for EMI radiation it can be problem since large
amount of components is under high dV/dt.
VIII.
REFERENCES
[1] Fang Z. Peng ”Z-Source Inverter” IEEE Transaction on Industry
Application, Vol. 39, No. 2, March/April 2003.
[2] Arkadiusz Kulka, Tore Undeland, Vazquez S., Franquelo S.
[3]
[4]
Fig. 14. Inverter output voltage where no load is applied, the boost
ration is 300 %, the voltage harmonic cancellation is disabled. The
reference output voltage is set to 240 V peak, the source is 80 V.
[5]
[6]
With very high boost ratio (the dc-link voltage three
times higher than available supply voltage) the second
order effect is easily visible. Due to harmonics coming
from the shoot through state, even when the reference is
set to sinusoidal the output voltage is distorted. The
maximum available ST time is used in Fig. 14 (3.2 Ps).
Experiments measurements shows that operation of Zsource inverter with high boos ratios (higher than 2) are
inefficient. The voltage harmonic cancellation algorithm
can be enabled, improving significantly the voltage shape
but with increased nonlinear load current the shape will
be distorted quickly. In other words, with higher output
voltage (high boost factor) less current can be drawn. The
current capacity can be improved by increasing the ST
time. Increasing the ST time is not feasible since the
maximum transistor current can be reach and redesign of
inductor would be required.
[7]
[8]
[9]
“Stationary Frame Voltage Harmonic Controller for Standalone
Power Generation” Proceedings of EPE 2007 Aalborg/Denmark.
Fang Zheng Peng, Miaosen S.,Zhaoming Q, “Maximum Boost
Control of the Z-Source Inverter” IEEE Transaction on Power
Electronics, Vol. 20, No. 4, July 2005.
Poh Chiang Loh, D. Mahinda Vilathgamuwa, Yue Sen Lai, Geok
Tin
Chua
and
Yunwei
Li
“Pulse-Width Modulation of Z-Source Inverters” IEEE
Transaction on Power Electronics, Vol. 20, No. 6, November
2005.
Miaosen Shen, Alan Joseph, Jin Wang, Fang Z. Peng1, Donald J.
Adams “Comparison of Traditional Inverters and Z-Source
Inverter for Fuel Cell Vehicles” IEEE 0-7803-8538-1, 2004.
Jacek Rabkowski “The bidirectional Z-source inverter for energy
storage application” Proceedings of EPE 2007, Aalborg/Denmark.
Jin-Woo Jung, Ali Keyhani “Control of a Fuel Cell Based ZSource Converter” IEEE Transaction on Energy Conversion, Vol.
22, No. 2, June 2007.
Poh Chiang Loh, Feng Gao, Pee-Chin Tan, Frede Blaabjerg
“Three-Level AC-DC-AC Z-Source Converter Using Reduced
Passive Component Count” IEEE 1-4244-0655-2, 2007.
Arkadiusz Kulka, Tore Undeland “Double Frame Virtual Flux,
Voltage Sensor-less Algorithm for Three Phase VSC in
Unbalanced Condition – Experimental study” unpublished.
VII. CONCLUSION
This paper has presented a Z-source inverter for
implementing UPS or stand alone power generation
system. It can boost the input voltage by a practical factor
1.5 to 2 not scarifying the efficiency, reducing cost and
minimized component count. The voltage and current
transistor class for Z-source inverter must be higher
compared to VSI of the same rated power. For the high
boost ratios (>2) the efficiency compared to standard VSI
with boost stage is lower. The boost property can be vital
where the input voltage is not changing in wide range and
can decrease with the load. Example is the draining
battery of UPS, or variable speed PM generator where for
conventional VSI would be lack of DC link voltage. It
can be used in variable speed diesel based systems where
the speed changes would be in the range of 2. At
2008 13th International Power Electronics and Motion Control Conference (EPE-PEMC 2008)
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