ACTIVE GATE DRIVERS FOR MOTOR
CONTROL APPLICATIONS
By
DORIN O. NEACSU
Correspondence Address:
Satcon Technology Center
161 First Street, Cambridge, MA 02142
Phone (617) 349-0834, Fax (617) 661-3373, Email neacsu@earthlink.net
Tutorial previously presented at IEEE PESC 2001
Copyright © 2001 IEEE. Reprinted with permission. Internal or personal use of this material is
permitted. However, permission to reprint/republish this material for advertising or promotional
purposes or for creating new collective works for resale or redistribution must be obtained from
the IEEE by sending a blank email message to pubs-permissions@ieee.org.
About Speaker
Dorin O. Neacsu (M'95, SM'00) was born in Suceava, Romania, in 1964.
He received the MS and PhD degrees in electrical engineering from the
Technical University of Iasi, Iasi, Romania, in 1988 and 1994,
respectively. He was with TAGCM-SUT Iasi, Romania, from 1988 to
1990. Since 1990, he has been with the faculty of the Department of
Electronics, Technical University of Iasi. In 1995, he has been a PostDoctoral Fellow at Universite du Quebec a Trois Rivieres, Canada.
Between February 1997 and August 1998, he has been at Delphi-Energy
and Engine Management Systems, Indianapolis, USA, working on
advanced DSP control of electrical drives for propulsion systems. In
August 1999, he has joined International Rectifier, in El Segundo, CA,
USA and has worked in the Power IC Group.
Since January 2001, Dr.Neacsu is with Satcon Technology Center, Cambridge, MA, USA. Along
with about 50 papers or research notes published in journals or conference proceedings, Dr. Neacsu
has co-written several university textbooks in Canada and Romania and a book on simulationmodelling of power converters in Romanian language. Dr. Neacsu has served as a Reviewer or
Session Chairman for several IEEE Transactions or conferences. His research areas are in gate
drivers and static power converters, PWM algorithms, microprocessor control, modeling and
simulation of power converters and emerging control technologies as fuzzy logic.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
3
PLAN OF PRESENTATION
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
1. IGBT/MOSFET SWITCHINGS
2. LIMITS OF OPERATION. PROTECTION
3. GATE DRIVER REQUIREMENTS
4. LOSSES
5. EMI
6. COMPUTER BASED DESIGN
7. GATE CONTROL OF SERIES CONNECTED IGBTs
8. ACTIVE PROTECTION CIRCUITS
9. ADVANCED METHODS OF ACTIVE GATE CONTROL
10. CONCLUSION
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
4
VANCOUVER, CANADA
JUNE 17-21,2001
1. IGBT/MOSFET SWITCHINGS
- POWER MOSFET CIRCUIT MODELS
• Faster than bipolar transistors since they do not have excess
minority carrier that should be moved during turn-on and turn-off
• Electrical charges are moved through the stray capacitances or
depletion layer capacitances;
• Equivalent circuit model for transient analysis in cut-off and active
regions:
Cgd
D
G
Id=f(Vgs)
Cgs
S
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
5
1. IGBT/MOSFET SWITCHINGS
• When vDS<vGS -VGSth the MOSFET enters the ohmic region.
• In power switching converters, vGS>> VGSth and the boundary for
the ohmic region becomes vDS < vGS
• The equivalent circuit model for the ohmic region:
D
G
Cgd
RDS(on)
Cgs
S
• RDS(on) represents the ohmic losses mostly arising from drain drift
region.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
6
VANCOUVER, CANADA
JUNE 17-21,2001
1. IGBT/MOSFET SWITCHINGS
• The capacitances Cgd and Cgs are varying with the voltage across them
with a substantial change in Cgd that can be approximated with a 2-step
variation. This nonlinearity is hard to deal with even if smaller than Cgs.
Cgd
Model Approximation Cgd
Cgd - 0.2nF
VARIATION
RANGE OF
10 OR 20
Possible experimental variation
of Cgd@100V
Cgd - 0.02nF
vDS
NOTE: Numerical values are of example only.
Cgd effect is alike the “Miller” effect in any feedback circuit (path
between OUT & IN). This was first studied by John Miller for
vacuum tube triode amplifier.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
7
1. IGBT/MOSFET SWITCHINGS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
Constant Cgs on third interval
(increased by GD overlap oxide capacitance)
Cgs
Cgs2 - 2.2nF
∆C=Gate Oxide Capacitance of drain overlap
Cgs1 - 0.6nF
Constant Cgs on first interval
vGS
NOTE: Numerical values are of example only
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
8
VANCOUVER, CANADA
1. IGBT/MOSFET SWITCHINGS
JUNE 17-21,2001
- IGBT VERSUS MOSFET
• IGBT combines the advantages of Bipolar Transistors such as low
conduction losses with the merits of MOSFETs such as shorter
switching times.
• Equivalent circuitry:
Collector
Drift region
resistance
Parasitic transistor
with negative effects
on latch-up
Gate
Unlike conventional
Darlington, MOSFET
carries most of current
Body layer spreading
resistance
Emitter
• Switching behaviour of IGBTs can be analyzed based on MOSFET
models
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
9
1. IGBT/MOSFET SWITCHINGS
- SWITCHING WAVEFORMS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Turn-on and turn-off behavior are analyzed with a simple circuit
including a free-wheeling diode.
L
D
Rg
M
• This case is modeling very well the large majority of motor drive
applications
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
10
1. IGBT/MOSFET SWITCHINGS
vGG
vGS(Io)
RG*(Cgd1+Cgs)
vGS(th)
RG*(Cgd2+Cgs)
vGS
Peak to be
considered at
gate circuit
design
Miller plateau
Charge on
Cgs and Cgd
Charge on
Cgd
iG
Drain
current rise
establishing
(di/dt)
Irr
Adding free-wheeling diode
reverse recovery current
I0
iD
vD
VDS(on)
TURN-ON
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
11
1. IGBT/MOSFET SWITCHINGS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
vGG
vGS
RG*(Cgd1+Cgs) Miller plateau
vGS(Io)
RG*(Cgd2+Cgs)
vGS(th)
iG
Charge on
Cgs and Cgd
Charge on
Cgd
I0
iD
vD
MOSFET
current
Bipolar transistor
current
TURN-OFF
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
12
1. IGBT/MOSFET SWITCHINGS
- IGBT/MOSFET CHARACTERISTICS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Main parameters are herein quoted as a nomenclature for equations
• IGBT maximum ratings:
VCES
Collector-to-Emitter Breakdown voltage
IC @ TC=25ºC and 100 ºC Continuous Collector Current
ICM
Pulsed Collector Current
ILM
Clamped Inductive Load Current
IFM
diode maximum Forward Current
VGE
Gate-to-Emitter Voltage
PD @ TC=25ºC Maximum Power Dissipation
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
13
1. IGBT/MOSFET SWITCHINGS
- IGBT Maximum Ratings
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Maximal values on the market:
IC
2400A
1700V
HIGH POWER EUPEC
IGBTs MODULES ON
THE MARKET
1200A
3300V
600A
6500V
VCE
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
14
1. IGBT/MOSFET SWITCHINGS
- IGBT switching characteristics
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Design of gate drivers is depending on the switching characteristics.
• The switching times given in datasheets as electrical characteristics
are for resistive load switching.
Qg
Qge
Qgc
td(on)
tr
td(off)
tf
Eon
Eoff
Ets
td(on)
tr
Total gate charge (turn-on)
td(off)
Turn-off delay time
gate-emitter charge (turn-on)
tf
fall time
gate-collector charge (turn-on)
Ets
Total switching loss
Turn-on delay time
LE
internal emitter inductance
Rise Time
Cies
Input Capacitance
Turn-Off Delay Time
Coes
Output Capacitance
Fall Time
Cres
Reverse Transfer Capacitance
Turn-On Switching Loss
trr
Diode Peak Reverse Recovery Time
Turn-Off Switching Loss
Irr
Diode Peak Reverse Recovery Crt
Total Switching Loss
Qrr
Diode Reverse Recovery Charge
Turn-On Delay Time
di(rec)M/dt
Rise Time
Diode Peak Rate of Fall of Recovery
• The performance curves are for half-bridge inductive load since the
inductive loads are the most prevalent application for IGBTs
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
15
1. IGBT/MOSFET SWITCHINGS
- Electrical characteristics
V(BR)CES
∆V(BR)CES/∆TJ
VCE(on)
VGE(th)
VGE(th)/∆TJ
gfe
ICES
VFM
IGES
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
Collector-to-Emitter Breakdown Voltage
Temperature coefficient of breakdown voltage
Collector-to-Emitter saturation voltage
Gate threshold voltage
temperature coefficient of threshold voltage
Forward transconductance
Zero Gate voltage collector current
Diode forward voltage drop
Gate-to-emitter leakage current
- Thermal characteristics
Are not of interest for this presentation
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
16
2. LIMITS OF OPERATION. PROTECTION
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Modern gate drivers incorporate many protection features. In order
to design with these, the IGBT/MOSFET limits of operation and
the need of protection circuitry is outlined herein.
• Limits of operation:
– Maximum collector current is set up to avoid latch-up.
IGBTs are easy to be paralleled.
– Maximum gate-emitter voltage is set by the gate oxide
breakdown considerations. The maximum current that can
flow under short-circuit with a maximum gate-emitter
voltage is 4-10 times the nominal rated collector current.
IGBT will work in active region with VCE=off-state voltage.
– Maximum collector-emitter voltage is set by the breakdown
voltage of the internal pnp transistor.
– Maximum junction temperature is 150°C.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
17
2. LIMITS OF OPERATION. PROTECTION
• Safe operating area:
Both IGBT and Power MOSFET have square SOA for short
switching times. Modern IGBT devices withstand operation at
the corners of the SOA for 10us.
IC
Thermal limit for longer
switching times
Thermal limit for DC
equivalent
IC
Limit by reapplied
dVCE/dt
Higher
dv/dt
FORWARD
REVERSE
BIAS SOA
BIAS SOA
VCE
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
VCE
18
2. LIMITS OF OPERATION. PROTECTION
- CROSS-CONDUCTION
T1
Vdc
Icg
When T1 turns-on
VCE1 => VCE1 drops from
Vdc to almost 0
Cgc
Ice
Ico
RgOFF
VCE2
T2
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
VgOFF
Cge
=>(dv/dt)>0 across T2
Cce
(dv/dt)>0 across T2
→ Icg flowing into the gate circuit is increasing the gate voltage
→ If this voltage exceeds the gate threshold level, collector current
starts to flow
→ This current depends on the level of dv/dt and gate off-state
resistance.
Negative off-state control voltage and appropriate gate resistance
can prevent occuring cross-conduction. Limited dv/dt can also
be a solution, but this can increase losses.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
19
VANCOUVER, CANADA
2. LIMITS OF OPERATION. PROTECTION
JUNE 17-21,2001
- REAL OPERATION TRAJECTORY
• In a real circuit, the operation points are along the following
trajectory due to the switched inductance. These points should be
considered as being inside the datasheet SOA.
Overcurrent at turn-on
IC
Turn-on
Idealized switching
curve
Overvoltage at turn-off
Turn-off
VCE
• These trajectories depend upon stray inductances, parasitic
capacitances and switching performance as di/dt, dv/dt. The IGBT
package itself has a stray inductance of about 15nH.
• Factors as di/dt, dv/dt can be adjusted through the gate circuit and
the OA can be minimized inside the datasheet SOA.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
20
3. GATE DRIVER REQUIREMENTS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Basically a gate driver circuit can be reduced at a voltage
supply, a gate driving power module and a gate resistor
Power +
Control
signals
IGBT
Power • Both supply power and switching control information should be
sent to the gate circuitry. These should be done with or without
potential separation.
• Moreover, given the power converter topologies with floating
power devices, the high side device should be separated from
the low-side.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
21
3. GATE DRIVER REQUIREMENTS
Possible configurations:
• Gate drivers with potential separation:
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
– Gate driver with inductive transfer of power (power supply at up to
1MHz intermediate frequency) and a direct information transfer;
– Gate driver with inductive transfer of energy (power supply with up to
20kHz intermediate frequency) and optocoupler transfer of information;
• Gate drivers without potential separation:
– Gate driver with bootstrap for power supply of high-side and level
shifter of switching control of information.
Another classification can be made based on the number of channels
to be controlled:
• Simple gate driver with input and output on the same ground level
• Simple gate driver for high-side with input and output at different
ground levels
• Dual gate driver (or half-bridge) with both low-side and high-side
(level-shift)
• Three-Phase gate drivers with 6 independent channels.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
22
VANCOUVER, CANADA
3. GATE DRIVER REQUIREMENTS
JUNE 17-21,2001
• When high-side devices are considered (drivers or High Voltage
ICs), the level of the insulation voltage of the level shifter makes the
difference. Within IC technologies, the level shifter transistor has a
large size and minimizes the possibilities for a high output power.
Max.gate
3A; 100V
AVAILABLE GATE
current
xxx
DRIVER ICs
1A; 300V
xxx
0.2A; 1200V
IR22xx
Max.insulation
voltage
• To supply the high-side circuitry, a charge pump topology is used,
most typically being a bootstrap circuit. => Special need for start-up
sequence to charge the bootstrap
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
23
3. GATE DRIVER REQUIREMENTS
- GATE VOLTAGE
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• A positive voltage must be applied on the gate-emitter circuit to
turn-on the device.
• The maximum of this voltage is specified in datasheets, usually as
20V. If short-circuit survival is required, this limit should be
restricted.
• The minimum value is defined by the condition to have the device
fully saturated when conducting its maximum peak current. [Usually
11.5V]
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
24
PESC 2001
VANCOUVER, CANADA
3. GATE DRIVER REQUIREMENTS
JUNE 17-21,2001
- GATE VOLTAGE
• To reduce the switching losses at turn-off, a negative voltage
should be applied. This is mandatory at high power IGBTs and
can be avoided at low power devices. IGBTs usually require a
larger negative voltage than power MOSFETs due to:
– IGBTs operate at higher voltages => increased dv/dt coupling of
noise
– Ratio of reverse transfer capacitance to input capacitance is larger
for IGBTs (Cres/Cies) => increased Miller effect => larger noise
coupled from collector to gate.
– High power IGBTs are constructed by paralleling devices and have
internal gate resistors =>Drawback: voltage can develop on gate
even with input shorted to emitter.
NOTE Some low-power IGBTs do not need negative voltage by
using Cres (reverse transfer) minimization.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
25
PESC 2001
VANCOUVER, CANADA
3. GATE DRIVER REQUIREMENTS
JUNE 17-21,2001
- SERIES RESISTOR
Limit diode losses
LARGE VALUE OF
Avoid ringing
GATE RESISTOR
Limit of the diode
recovery voltage
Avoid cross-conduction
SMALL VALUE OF
GATE RESISTOR
Limit IGBT switching losses
Improve di/dt
• Series gate resistor(s) is employed at both turn-on or turn-off. It is
usually implemented by only a passive resistor. Advanced gate
control implies one resistor for turn-on and another one for turn-off.
• Different effects of the value of the series gate resistor make room
to custom design for different objective functions.
• IGBT/MOSFET Manufacturers are usually suggesting a range of
gate resistor values.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
26
3. GATE DRIVER REQUIREMENTS
- GATE DRIVER OUTPUT
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• After establishing the gate control voltages and gate resistors,
the design of the gate driver continues with defining the power
level of the control signal. The necessary power is a function of
operating frequency, bias control voltages and total gate charge.
The total gate charge is published in IGBT/MOSFET
datasheets, depending on gate control voltage.
• The average current can be calculated by: iS = Q • freq. The total
power can be estimated as P = iS • (VG+ - VG-). Usually this power
is small.
• The tougher criteria for design is ensuring the peak gate current
that can be roughly estimated as: IG(Peak) = (VG+ - VG-)/RG when a
single gate resistor is used.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
27
PESC 2001
VANCOUVER, CANADA
3. GATE DRIVER REQUIREMENTS
JUNE 17-21,2001
-GD DEFINITION BASED ON CHARGE
• Datasheets present the gate charge characteristics versus the
gate-emitter voltage. The gate charge necessary for switching is
very important for establishing the switching performance of a
MOSFET or IGBT. The lower the charge, the lower is the gate
drive current needed for a given switching time.
t2(<t1)
t1(>t2)
Vge
Vge
First slope is
determined by the input
capacitance that is
higher for the second
device
Qgate
DEVICE WITH SMALLER
INPUT CAPACITANCE IS
NOT ALWAYS FASTER
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
Second device has a
higher
transconductance and
therefore requires less
voltage on its gate for
Qgate the given amount of
collector current
See different
transconductance
versus different
input capacitance
28
3. GATE DRIVER REQUIREMENTS
- GATE DRIVER CIRCUITRY
• Designer should minimize the parasitic inductances.
• To reduce magnetic fields, all current loops with switching transients
should be made to have as small area as possible. The magnetic
field is best reduced when using a twisted pair of wires.
• To reduce stray capacitances, the designer should minimize the
area of the metal exposed at the switching potential.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
29
4.LOSSES
-SWITCHING LOSSES
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Observing the collector current and voltage waveforms,
switching losses can be derived by calculation of the areas of VI
regions.
• Switching loss energy at IGBT turn-on:
2
2

VDC
 di   ( I L + I RM )
ETon = 0.5 ⋅ VDC − Lst ⋅    ⋅
+ 0.5 ⋅ I L ⋅
di
dt
 dv 


 on 

 
 
 dt on
 dt on
IRM also depends on di/dt
Ic
Vce
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
30
4.LOSSES
-SWITCHING LOSSES
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Switching loss energy at IGBT turn-off
EToff
2
VDC
0.5
IL
dv
ô
Ödt off
È
0.5 ÙVDC
Ù
ä
Ic
2 Lst
di
ô
Ödt
·
off
IL
di
ô
Ödt
2
0.5 kt VDC I L ttail
off
Vce
Current tail
Technology
dependent,
nothing to do
on the gate
control!
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
31
4.LOSSES
-SWITCHING LOSSES
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Switching loss energy at diode turn-off
È
·
di
E Doff 0.5 ÙVDC 2 Lst ô
Ödt diode
ä
ID
IL 2
di
ô
Ödt diode
Diode recovery depends on (di/dt)
VD
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
32
4.LOSSES
-CONDUCTION LOSSES
PCOND
1
T
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
Tf
von (t ) iL (t )dt
0
• Conduction losses for diode:
1 Tf
PCOND , Diode
V0, Diode ro, Diode iLBD (t ) iL (t )dt
Tf 0
where BD is a curve-fitted parameter for diode. Integral across the
fundamental period Tf can be reduced to integrals on small conduction
intervals of each diode
• Conduction losses for IGBT/MOSFET:
1 Tf
PCOND , IGBT
V0, IGBT ro, IGBT iLBT (t ) iL (t )dt
Tf 0
where BT is a curve-fitted parameter for IGBT/MOSFET. Integral across
the fundamental period Tf can be reduced to integrals on small
conduction intervals of each IGBT/MOSFET
• Conduction losses are not very sensitive to gate control.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
33
4.LOSSES
-TOTAL LOSSES
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Total losses can be calculated by adding up the switching and
conduction losses while taking account of the inverter topology,
the modulation function for each device and the operation mode
or load power factor.
• This calculus can usually be done by computer programs and it
is approximate since it does not take into account parasitics and
actual gate or DC voltage levels of fluctuation.
• It can be seen that the gate drive circuit (especially Rgate)
influences the switching losses by di/dt, dv/dt, IRM, and
overvoltage.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
34
5. EMI
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• Steep switching waveforms with up to 15 V/ns or 5A/ns are
sources of EMI.
• EMI emissions can appear as:
– Conducted (towards the main supply conductors);
– Radiated (in form of E- or H-fields).
• Switching power converters are generating conducted EMI in
two modes:
– Differential (symmetrical) mode currents flowing into connecting line
due to the IGBTs/diodes switching current (di/dt);
– Common (asymmetrical) mode interference produced by the high
rate (dv/dt) and parasitic capacitances to the earth ground or
connecting lines.
• EMI performance is determined by:
– The power stage behavior;
– The influence of the gate drive with its components: processing
module, its power supply and its gate driving output block.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
35
VANCOUVER, CANADA
5. EMI
JUNE 17-21,2001
- EMI STANDARDS FOR MOTOR DRIVE APPLICATIONS
• The conducted EMI emission is regulated by different standards, for
commercial or military applications (IEC, VDE, FCC, CISPR, so on).
• VDE standards are next presented
Noise Voltage[dB]
90
80
VDE upper limit
60
VDE lower limit
45
100kHz
1MHz
10MHz
100MHz
• Various agencies are also specifying standards for radiated EMI.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
36
5. EMI
-INFLUENCE OF THE GATE DRIVER
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
• High switching dv/dt and/or di/dt power circuits produce more EMI
These depend on the shape of the gate current and voltage
Rgate; type of power supply (its regulation and -15V versus 0V for
switching-off); type of the gate driving output block.
• Diode reverse-recovery current. This is also depending on Rgate
on switching off state.
• Spreading paths depend on gate driver realization:
– Reference point on earth ground
– Reference point on DC link minus.
as well as parasitic coupling between conductors.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
37
VANCOUVER, CANADA
5. EMI
JUNE 17-21,2001
-MATHEMATICAL EXPRESSIONS OF di/dt AND dv/dt
These are approximate relationships that neglect parameters’ variations
and the complex operation modes. Example: switching at zero current !
-IGBT TURN-ON
diC/dt
di
ô c
Ödt
di
ô c
Ödt
ON
g fe
dvGE
dt
VG
ON
g fe
VMiller
ô Cies RGON
ô
Ö g fe
I gate
Cies
VG
LE
VGE ( I L
ôCies RGON
ô
Ö g fe
I RM )
LE
NOTE: The stray inductance LE is much important than the term CR/gfe
dv/dt
igate VG VGE ( I L )
dvCE
ô
RGON CGC
Ö dt ON CGC
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
38
5. EMI
- IGBT TURN-OFF
dv/dt
dv
ô GC
Ö dt
OFF
dv
ô CE
Ö dt
igate
ON
CGC
VG min VGE ( I L )
R Goff CGC
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
39
VANCOUVER, CANADA
5. EMI
JUNE 17-21,2001
- DIODE TURN-OFF
• At IGBT turn-on, the complementary freewheeling diode is turningoff and presents reverse recovery current
• Considering the load constant during switching yields:
iDiode+iIGBT=IL => (di/dt)on=-(di/dt)diode
• After diode current reaches the negative peak value, it starts to
decrease to zero with a speed (di/dt)Rec depending on the first slope
(di/dt) and the diode snap factor (ks):
di
ô
Ödt
Re c
1 di
ô
k s Ödt
Diode
di
1
absô
ks
Ödt
on
• Peak recovery current can be derived from the following eq.:
I RM
di
ô
Ödt
[
Diode
È
ô
Ù
ô IL
Ù
]
1
exp
rr
ô di
Ù
ô ô
Ù
Ö Ödt
ä
·
I RM
diode
CONCLUSION On inverter leg topology, diode recovery depends on IGBT
turn-on
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
40
PESC 2001
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5. EMI
JUNE 17-21,2001
-COMPARATIVE ANALYSIS
• The connection of the gate control to the DC minus is better than
the connection to the earth ground. When the earth ground
connection is used, the interference currents are closed through
the main line. The common mode interferences are the main
component in the EMI.
• Controlling EMI emissions requires control of the switching rate
and the form of voltages and currents based on the values of gate
resistance and the switching off voltage (-15V or 0). Active control
of the gate can reduce di/dt thus improving EMI interference.
• In general, reverse recovery dv/dt of the forward diode is large
when IGBT’s turn-on current is small instead of large currents.
Therefore, the EMI noise level is high with small current in the
cases of drive with the same resistance.
• Turn-off di/dt becomes large proportionally to the turn-off current.
The surge voltage generated at the turn-off operation is large
when the current is large as compared to small current.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
41
6. COMPUTER BASED DESIGN
PESC 2001
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• Usually, the gate driver is designed based on experiments. This
is necessary due to variation of different parameters within the
actual inverter building (Lbusbar, Cooling, s.o.)
• Computer models are available for transient analysis
• Gate control circuit can be optimized by computer calculations
to have an input value for the experimental tests. The
mathematical optimization provides a set of possible values
optimizing at different current levels. The designer should select
one gate resistor value to cover more or less the entire
operation range.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
42
6. COMPUTER BASED DESIGN
• Optimization criteria can be:
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
– Losses. Analytical expressions of the conduction and switching losses
are grouped within the PWM algorithm equation to provide a way to
optimize the gate resistors for overall loss minimization. To improve this
optimization, one can define special performance functions able to take
account of the difference between the thermal conductivity of the diode
and IGBT (there can be a difference factor of 2). The optimization
results are provided for each current level and load power factor.
– Operation Range and Cost. Low power inverters (used in appliances
or some servo applications) are more sensitive at cost. Optimization
criteria can be set-up to allow proper operation without negative gate
control voltage, snubbers, less protection at overvoltage peak due to
diode recovery. These features are achieved by imposing mathematical
constraints for: minimum obtainable (dv/dt)on at highest current,
maximum allowable peak voltage due to diode recovery, minimum
obtainable (dv/dt)off avoiding cross-conduction.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
43
7. GATE CONTROL OF SERIES CONNECTED IGBTs
• The roots of active gate control resides in control of series
connected IGBTs
• Series operation of high current IGBTs enlarges the limit of
available DC-link voltage of converters. The drawbacks are:
– Unequal voltage sharing across the IGBTs due to:
- different delay times
- small parameter deviation among different devices
- different reverse recovery behavior of the freewheeling
diodes.
– Increased dv/dt with the number of series connected devices at the
terminals of the inverter leg (larger voltage to be switched).
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
44
7. GATE CONTROL OF SERIES CONNECTED IGBTs
• Balancing is traditionally achieved by passively snubbering each
IGBT individually
• To reduce the passive component count and volume, modern active
snubbering methods have been reported. They assume an active
control of the gate in order to limit dv/dt and overvoltage.
• The direct control of the collector voltage is achieved within a local
feedback loop. Stability requirements imply design of a controller
with poles at a higher frequency than the gate circuitry which has a
pole at about 1-10MHz. Control bandwidth of 50-90MHz is achieved
by high-performance operational amplifiers.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
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JUNE 17-21,2001
45
7. GATE CONTROL OF SERIES CONNECTED IGBTs
• Active control of the voltage slope is achieved by a simple feedback
topology:
+
REFERENCE
-
POWER
DRIVER
Rg
OpAmp
• Implementation can be achieved with Op-Amp such as 5539.
• At high currents, a significant loss reduction can be achieved by
controlling the IGBT voltage in closed loop only near the peak rating. The
open-loop operation can be considered for the rest of the operation rang.
At small currents, overshoot at turn-off is not large.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
46
7. GATE CONTROL OF SERIES CONNECTED IGBTs
• Possible Drawback: At inductive loads, the IGBT voltage cannot
respond to the gate voltage turn-on control until the freewheeling
diode has turned-off. The closed loop approach would charge the
gate quickly producing a very high di/dt. Additional passive or active
di/dt control is suggested or the reference slope should be limited.
• This solution is not unique. Enabling fixed current sources is also a
possibility.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
47
8. ACTIVE PROTECTION CIRCUITS
•
•
•
•
Another application of active control consists in short-circuit protection. The
equivalent gate resistance is modified to turn-off the IGBT with soft shutdown.
This avoids the large di/dt and appropriate voltage overshoot present in a
simple protection following up a short circuit.
Examples:
– soft shutdown feature of International Rectifier IR2137
– Powerex trench gate IGBTs with RTC circuit and M57160AL gate driver
Voltage overshoot protection can be achieved by including an additional
stage in the gate driver. At turn-off, Qprot is turned-on and the gate is
discharged through it. When the collector voltage reaches the breakdown
voltage of the Zener diode, a current will flow through the gate of Qprot and will
turn it off. The remaining current would flow through Roff slowing down the
dv/dt rate.
Next solution can reduce switching losses by half while the overshoot is
limited very much.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
48
PESC 2001
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JUNE 17-21,2001
Vcc=15V
Q3
Rgate(ON)
Rgate(Off)
Q4
Qprot
• CONCLUSION: From the expertise acquired by these traditional
applications (series connection of IGBTs and gate protection),
modern gate drivers adjust di/dt and/or dv/dt independently
according to criteria such as EMI emission control.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
49
9. ADVANCED METHODS OF ACTIVE GATE CONTROL
- PRINCIPLE
• The gate resistor can be rated to reduce EMI emission, but such fixed
value would increase losses.These different constraints would lead to
different values of the gate resistors during operation. Influence of
different gate resistor values on (di/dt) is next presented:
Ic[turn-off]
Ic[turn-on]
Rg=10
Rg=100
Rg=1k
Rg=1k
Rgate
increases
Rgate
Rg=100
increases
Rg=10
t
NOTE: Numerical values are of example only.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
t
PESC 2001
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JUNE 17-21,2001
50
9. ADVANCED METHODS OF ACTIVE GATE CONTROL
- PRINCIPLE
• Different constraints shown over the switching waveforms:
Vgate
Collector
current
Collector
voltage
Need Small Rg to speedup charging to threshold
Need Small Rg to
reduce losses
Need Small Rg to
t
speed up switching
and reduce losses
Need large Rg to limit
di/dt
t
Need small Rg to
increase dv/dt
t
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
51
9. ADVANCED METHODS OF ACTIVE GATE CONTROL
- PRINCIPLE
• Active di/dt and dv/dt control is achieved in modern research by
feedback control of the gate current based on the device current
or voltage slopes.
• Sensing current or voltage slopes is carried out by:
– direct sensing [shunt resistor or Kelvin emitter]
– using an information resulted from Miller effect sensing [does not
need galvanical separation]
• The goal of this active control can be
– Reduction of the EMI emission
– Reduction of snubber circuits
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
52
9. ADVANCED METHODS OF ACTIVE GATE CONTROL
- METHODS BASED ON DIRECT SENSING
• Circuit idea for di/dt control:
Regular gate
control
Regular current
+
1/Rgate
Gate current
Feedback current
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
Isense
d/dt
PESC 2001
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JUNE 17-21,2001
53
9. ADVANCED METHODS OF ACTIVE GATE CONTROL
- METHODS BASED ON DIRECT SENSING
• Circuit idea for dv/dt control:
Feedback current
d/dt
VCsense
1/Rgate
Regular gate
control
+
Gate current
Regular current
• This method is derived from series connected IGBTs
• Main constraints against an easy implementation:
– Fast event time scale that does not allow too much delays within the
circuit
– Feedback dependence on IGBT parameters.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
54
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- THEORETICAL METHOD OF MODIFYING THE GATE
CONTROL VOLTAGE. SOLUTION 1: Idir-Franchaud-Bausiere
• Turn-on waveforms are adjusted through a gate control voltage
waveform. An intermediate voltage level is introduced in order to
decrease the gate current level on the first slope of turn-on. The
voltage level and the length of the time interval with this voltage
level can be adjusted.
Ic
Vgate
Vs=6.1V
Covers the time
interval when
current is rising
Vs
Vs=5.3V
Vs=4.6V
ts
t
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
t
PESC 2001
55
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- THEORETICAL METHOD OF MODIFYING THE GATE
CONTROL VOLTAGE. SOLUTION 1: Idir-Franchaud-Bausiere
• The collector current can be limited beyond a maximum rate of rise
by selecting an appropriate Vs. The IGBT/MOSFET would behave
as an inductor with variable inductance.
• Measured radiated EMI is proving the advantage of reducing the
di/dt slope.
• However, this simple experiment is not very easy to be implemented.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
56
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE MILLER EFFECT VOLTAGE.
SOLUTION 2: Musumeci-Raciti-Testa-Galuzzo-Melito
Vcc=15V
Can be achieved
by RC network
with C<<Ciss
Rgate(ON)
Enable at
turn-on
Kd/dt
Current
generator
Miller effect sensing
Rgate(Off)
Regular Gate Control
Enable at
turn-off
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
Current
sink
PESC 2001
57
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE MILLER EFFECT VOLTAGE.
SOLUTION 2: Musumeci-Raciti-Testa-Galuzzo-Melito
• The most difficult part consists in detection of the Miller effect and
synchronization of the appropriate current source with this moment.
– Simple solution: derivative with high gain;
– Evolved solution implies PLL circuit to synchronize the pulses on
the next pulse basis by compensation of any processing delay.
Turn-on circuit:
Kd/dt
Start current
generator after 20%
of Miller time
Vin
Delay
Threshold
voltage
SQ
R
LPF
Phase
comparator
Ramp generator
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
Miller
effect
sensing
Power
stage
buffer
PESC 2001
58
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE MILLER EFFECT VOLTAGE.
SOLUTION 2: Musumeci-Raciti-Testa-Galuzzo-Melito
• Synchronization of the current generator with the beginning of the
Miller plateau, the signal representing detection of the Miller effect is
used to set the FF. This FF is reset at turn-off to avoid incorrect
operation.
• The output of this FF is phase compared with a signal obtained by
delaying the signal enabling the current generator.
• The output of this is generating the variable threshold Vt, that is
compared with a ramp voltage synchronized with the input control
signal.
• After a small number of cycles related to the characteristics of the lowpass filter, the control signal is properly synchronized.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
59
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE SENSED COLLECTOR CURRENT
SOLUTION 3: Takizawa-Igarashi-Kuroki
• Ensures control of di/dt
• The actual implementation considers an unique control circuitry. The
presentation is herein simplified by describing two circuits for turn-on
and turn-off.
RESULTS
• The advantage of modifying the gate resistor during collector current
rise or fall in order to improve di/dt instead of keeping a single resistor
rated for a given di/dt provides advantages on total losses.
• Comparative results at 150A:
– Conventional system with snubber
=> 100% losses
– di/dt reduction by a single gate resistor rated for the given di/dt
=> 127% losses
– Proposed system with different resistor values when applied
=> 95% losses
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
60
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE SENSED COLLECTOR CURRENT
SOLUTION 3: Takizawa-Igarashi-Kuroki
TURN-ON
Sw1
VCC
• When turn-on is desired, Sw1
Sw2
is turned-on and gate is fed
through small R1
• When collector current is
rising, Sw1 is turned-off by a
Ig
R1 R2 R3
threshold comparator
• The gate resistance is thus
increased to the value of R3
Detect d/dt>0
[current rise]
• Turn-on losses are minimized
if compared to a conventional
Threshold
system.
VTH
comparator
R2||R3
Ion
R3
IGBT
S/H
R1||R3
Comparator
The goal is to limit di/dt to improve EMI.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE SENSED COLLECTOR CURRENT
SOLUTION 3: Takizawa-Igarashi-Kuroki
TURN-ON
• The di/dt control is executed only at the time of small current with
high dv/dt (see EMI description).
• The second comparator judges if supression is executed based on
the last value of the IGBT current. When this is less than Ion =>
algorithm is executed (enable AND and turn-off Sw2), otherwise
usual control is involved.
Igate
di/dt control
Ic
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE SENSED COLLECTOR CURRENT
SOLUTION 3: Takizawa-Igarashi-Kuroki
TURN-OFF
VCC
Sw4
• Turn-off di/dt of the IGBT is
R8
less when the gate
C
discharge current is small
R6
R5
• Conventionally, R7 serves
Ig
as gate discharge path
• When the collector current
R7
is falling, the threshold
Detect d/dt<0
comparator turns-on Sw4
[current fall]
• C1 is discharged through
-VCC
Threshold
R5 into the gate to
comparator
increase gate current
IoFF
• This circuit is more
IIGBT
effective at large currents
S/H
rather than small currents.
Comparator
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE SENSED COLLECTOR CURRENT
SOLUTION 3: Takizawa-Igarashi-Kuroki
TURN-OFF
• The di/dt control is executed only AT LARGE CURRENTS. The
threshold comparator establishes when di/dt control is employed.
Igate
di/dt control
Ic
VCE
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
64
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE SENSED COLLECTOR CURRENT
SOLUTION 4: V.John-Suh-Lipo
• A three stage active gate drive is proposed for high-power IGBTs
• Design is based on:
–
–
–
–
Reduced delay time at both turn-on and turn-off
Reduced turn-on di/dt and the associated reverse recovery effects
Controlled overvoltage at turn-off
Reduced total switching losses at both turn-on and turn-off
• Three intervals are defined for both turn-on and turn-off
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
65
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE SENSED COLLECTOR CURRENT
SOLUTION 4: V.John-Suh-Lipo
Vgate
Vgate
TURN-OFF
Ic
Ic,tail
Vc
Ic
Vc
I
II
III
TURN-ON
I
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
II
III
PESC 2001
66
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE SENSED COLLECTOR CURRENT
SOLUTION 4: V.John-Suh-Lipo
TURN-ON
• First interval: Follows the turn-on command. IGBT should be
charged fast by a large gate current in order to minimize the
delay time.
• Second interval: Starts when the gate voltage reaches the
IGBT’s threshold level. The current injected into the gate is
reduced to minimize the effects of the reverse recovery current,
the associated overvoltage and the generated EMI. This interval
ends when the collector current reaches the load current plus
the peak reverse recovery current.
• Third interval: Gate is again rapidly charged to reduce the tail
voltage thus reducing the power losses at turn-on.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
67
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE SENSED COLLECTOR CURRENT
SOLUTION 4: V.John-Suh-Lipo
TURN-OFF
First interval: Gate-emitter capacitor should be discharged fast until
the rising instant of the collector voltage. Turn-off delay and the
power switching loss are reduced. This large gate current pushes
the gate voltage below the threshold level producing a large dv/dt
with low powerloss
• Second interval: Starts when the collector voltage starts to rise by
reducing the gate current. The rise of the collector voltage
produces a displacement current through the gate-collector
capacitance. The gate voltage tends to go up. This reduces turn-off
di/dt and accordingly the turn-off overvoltage.
• Third interval: starts at the end of the falling of the collector
current. During this interval, the gate voltage should rapidly reach
its final negative level. This is achieved by a low gate resistance.
The switching time is reduced as well as the noise immunity during
the off-state.
NOTE:This 3-interval approach prevents from any IGBT re-turn-on
since the gate current is negative throughout the turn-off intervals
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
68
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9. ADV. METHODS OF ACTIVE GATE CONTROL
JUNE 17-21,2001
- METHOD USING THE SENSED COLLECTOR CURRENT
SOLUTION 4: V.John-Suh-Lipo
IMPLEMENTATION
Controlled at turn-on
during the intervals I
and III to feed the
gate through small
R1
Controlled at turn-on
during the second
interval, in the active
M1
region (current source)
by the instantaneous load
current
MOSFETs allow larger
gate current by
operating with rail-torail voltage
Controlled at turn-off
during the intervals I
and III to feed the
gate through small
R2
M2
Controlled at turn-off
during second interval in
the active region (current
source) by the
instantaneous load
current
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
B1
To
gate
B2
PESC 2001
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JUNE 17-21,2001
69
10. CONCLUSION
• This tutorial presents a review of the active gate drivers for
motor control applications.
• The first part of the presentation has reminded the basics of
IGBT/MOSFET operation and the base requirements for gate
driver design.
• The influence of the gate circuit and gate equivalent resistance
on losses and EMI emissions is outlined by theoretical and
mathematical considerations.
• Active gate drivers are historically emerging from applications of
series connection of IGBT/MOSFET devices or active protection
circuitry. Some examples are quoted to show the path towards
the active gate control.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
70
10. CONCLUSION
• The principle of active gate control to improving losses and EMI
emissions in power converters used for motor drive applications
is explained.
• A complete review of the most known advanced methods of
active gate control is finally included. Merits and demerits of
these methods are discussed and it is concluded that they have
a nice future in control of intelligent power modules.
• Despite their research flavor, simplified versions of these
methods are already in the phase of implementation within
industrial gate drivers.
© 2001 IEEE * ACTIVE GATE
DRIVERS FOR MOTOR
CONTROL APPLICATIONS
71
SELECTIVE REFERENCES
PESC 2001
VANCOUVER, CANADA
JUNE 17-21,2001
I.Zverev, S.Konrad, H. Voelker, J. Petzoldt, F. Klotz, “Influence of the Gate Drive Technique on the Conducted EMI
Behaviors of a Power Converter”, IEEE PESC 1997, vol. 2, pp. 1522-1528
Mitsubishi Electric - “Using IGBT modules”, Sept. 1998
E.Motto, “Gate Drive Techniquesfor Large IGBT Modules”, PCIM Magazine, 1996
N. McNeil, K. Sheng, B. W. Williams, S. J. Finley, “Assessment of OFF-State Negative Gate Voltage for IGBTs”, IEEE
Transactions on Power Electronics, vol. 13, no. 3, May 1998, pp. 436-440
A. R. Hefner, “An Investigation of the Drive Circuit Requirement for the Power Insulated Gate Bipolar Transistor”, IEEE
Transactions on Power Electronics, vol. 4, no. 2, April 1991, pp. 208-218
F. Blaabjerg, J. K. Pedersen, “Optimized Design of a Complete Three- Phase PWM-VSI Inverter”, IEEE Transactions on
Power Electronics, vol.12, no.3, May 1997, pp. 567-576
D. Neacsu, T. Takahashi, “Computer-Aided Design of a Low-Cost Low-Power Snubberless Three-Phase Inverter”,
COMPEL2000
J.P.Ferrieux, F. Forest, P. Lienart, “The Insulated Gate Bipolar Transistor: Switching Mode”, EPE Conference, Aachen,
1989, pp. 171-175
Ch. Gerster, P. Hofer-Noser “Gate Controlled dv/dt and di/dt - Limitation in High Power IGBT Converters”, EPE Journal,
vol. 5, no. 3/4, Jan. 1996
S. Musumeci, A. Raciti, A. Testa, A. Galluzo, M. Melito, “Switching Behavior Improvement of Insulated Gate-Controlled
Devices”, IEEE Transactions on Power Electronics, vol. 12, no. 4, July 1997
S. Takizawa, S. Igarashi, K.Kuroki, “A New di/dt Control Gate Drive Circuit for IGBTs to Reduce EMI Noise and
Switching Losses” IEEE Conference 1998
Hwang-Geol Lee, Yo-Han Lee, Bum-Seok Suh, Dong-Seek Hyun, “An Improved Gate Control Scheme for Snubberless
Operation of High Power IGBTs”, Industry Applications Conference, 1997, vol.2, pp. 975-982
Soonwook Hong, Yong-Geun Lee, “Active Gate Control Strategy of Series connected IGBTs for High Power PWM
Inverter”, PEDS 1999, vol. 2, pp. 646-452
C. Gerster, P. Hofer, N. Karrer, “Gate-Control Strategies for Snubberless Operation of Series Connected IGBTs”, PESC
1996, vol. 2, pp. 1739-1742
D.Heath, P.Wood, “Overshoot voltage reduction using IGBT modules with special drivers”, IR Design Tip 99-1
D.Neacsu,T.Takahashi,HHNguyen, “Using IR 2137”, IR Design Tip 00-1
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FOR A COMPLETE LIST OF REFERENCES, PLEASE CONTACT THE AUTHOR.
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