TUNING AND COMPENSATION OF TEMPERATURE EFFECTS IN ANALOG INTEGRATED FILTERS Robert Hägglund and Lars Wanhammar Department of Electrical Engineering, Linköping University SE-581 83 Linköping, Sweden roberth@isy.liu.se and larsw@isy.liu.se ABSTRACT In this paper several tuning strategies for integrated active filters are discussed. Furthermore we compare two compensation schemes to decrease the temperature dependence of the transconductance value of a differential gain stage. The compensation circuitry consists of on-chip temperature sensors and a level adjustment circuit all realized by standard CMOS transistor techniques. The temperature sensors requires small chip area and consumes a small amounts of power. The performance of the temperature compensation schemes has been evaluated in a first-order transconductance-C filter application where the temperature dependence of the bandwidth and thereby the transconductance value are measured. Simulations show that the filters relative bandwidth variation due to temperature changes can be as low as 0.07% in the temperature interval of 0 – 100°C . 1. BACKGROUND In an active filter implementation using discrete components it is important to adjust the time-constants of the filter. For example in an active RC -filter the RC products must be adjusted to their nominal values. This is a time consuming task, especially in higher order filters, but it is a straightforward operation. However it is more efficient to integrated filters in a single circuit. For this type of integration it follows that it is not possible to change the time-constants by just exchanging a component. To be able to perform the adjustment on-chip circuity must be implemented that tunes the time-constants. If we are looking at the adjustment procedure in a broader perspective it is desirable to keep the shape of the transfer function independent of the variations for example due to process variations, temperature variations, power supply variations and ageing of the integrated circuit. It is unfortunately hard to design a single feedback loop that maintains the transfer function independent of various parameter variations. It is favorable to use several independent feedback loops where each loop is minimizing or at least decreasing the impact of one or several of the variations mentioned above. To implement a high-performance integrated filter one must use several feedback loop for tuning. These loops can be divided into a hierarchy, where some of the loops just tune an individual component whereas other loops tries to tune the whole transfer function. An example of the hierarchy of the feedback loops are shown in Fig. 1. The control loop that tune the transfer function can for example use a combination of Q-tuning algorithm, frequency tuning, and tuning methods based on adaptive Frequency tuning Input signal Building block Building block Qtuning Building block Reference clock Reference clock Building block Qtuning Output signal Reference clock Figure 1. An example of a hierarchy of compensation loops. filtering. One problem with the above tuning strategies is that the tuning circuitry have to be designed so it can tune large deviations in the transfer function. To alleviate the large tuning range a local tuning scheme can be used for a group of, or a single part of, the filter. For example a local temperature compensation circuit can minimize the temperature variation of all individual component in the filter and thereby lower the temperature dependence of the transfer function. This lowered sensitivity of temperature variations can relax the specification of the outer control loops. 2. TUNING ALGORITHMS There are several tuning strategies in continuous-time filter applications. Three of the most common strategies will be discussed below. All of the tuning schemes discussed below can be used either to compensate the whole filter or it can be used to minimize the variations of an individual component. The purpose of the Q-tuning is to keep the Q-factors of each complex conjugated pole pair in the filter constant. This can often be done by tuning the phase of the integrators of the filter. Usually this type of compensation is performed by inserting a tunable resistor in series with the integrating capacitor. The control signal to the tuning signal is then generated from for example a network like the one shown in Fig. 2. External reference clock Q-reference circuit Peak detector A Peak detector Gain K Low-pass filter Control voltage Figure 2. A block diagram of the Q-tuning principle. Frequency tuning is used to minimize the variation of either the cut-off frequency of the filter or the time-constant of a subblock of the filter. The main idea, illustrated in Fig. 3, is to compare the output frequency of a block, the whole filter or a part of it, with an accurate external reference clock. The circuitry adjusts the time-constants to match the frequency to the reference clock frequency. External reference clock Phase detector Control voltage Low-pass filter Figure 3. The principle of frequency tuning. A third method to perform tuning in continuous-time filters is to use adaptive algorithms. The adaption is nearly always done in the digital domain. For this type of implementation both an analog-to-digital converter, ADC, as well as a digital-to-analog converter, DAC, are needed. There are some interesting algorithms that can be used in the digital domain, but the input capacitance of the ADC will load the analog filter and this must be considered in the design of the tuning scheme. An example of an adaptive tuning scheme is shown in Fig. 4. 16-level DAC Reference signal Tunable filter Gradient signals Coefficient signals (1) where µ ( T nom ) is the mobility at the T nom = 300 K . The temperature dependence of the threshold voltage is [2] K T 1l T V T = V T ( T nom ) + K T 1 + ----------+ K T 2 V bseff ------------ – 1 (2) T nom L eff Voltagecontrolled oscillator 4-bit PN squence plus DAC T – 1.35 µ ( T ) = µ ( T nom ) ------------- T nom Error signal Adaptive tuning circuitry Figure 4. One way to perform adaptive tuning of continuous-time filters. 3. TEMPERATURE DEPENDENCE OF MOS TRANSISTORS In an implementation of a high-performance integrated filter one must take care of the temperature effects for the transistors in the design. An increase in the temperature will cause the CMOS transistors to conduct a larger current. This means that neither the transconductance value nor the drain-source resistance will have a constant value and thereby the gain, bandwidth and phase response will vary with the temperature. These variations will then affect the transfer function. The two parameters that have the largest impact on the drain current due to temperature variations are the mobility of charge carriers, µ , and the threshold voltage, VT . The mobility of charge carriers decreases as the temperature increases, especially for temperatures around 300 K [1]. In the AMS 0.35 process the temperature dependence of the mobility µ of a PMOS transistor can be expressed as where the process parameters K T 1l = 0 . 4. TEMPERATURE MEASUREMENTS There are several ways to perform temperature compensation. There have been some work on how to implement a temperature sensor. The usual way of implementing the sensor is to use bipolar transistor techniques, but it is also possible to design a CMOS only temperature sensor. The advantage of using the bipolar approach is that the temperature can be easily extracted by measuring the base-emitter voltage of a transistor. The base-emitter voltage varies as [3] r kT kT V be ( T ) = V g ( 0 ) + ------ ln I c – ln --------- (3) q η The base-emitter voltage decreases by approximately 2 mV/K as the temperature increases. Another way of implementing the sensor for temperature measurement is to measure the difference of the base-emitter voltage from two matched bipolar transistors carrying different current or having different sizes [4] - [7]. The difference in voltage can then be expressed as kT I c1 ∆V be = V be1 – V be2 = ------ ln ------(4) q I c2 The advantage of this implementation is that the difference of the output voltage is proportional to the absolute temperature, PTAT, i.e. it does not depend on material or transistor parameters. In a CMOS process it is possible to implement bipolar transistors as lateral devices which makes it possible to use the two approaches described above. There are also ways to implement temperature sensors using only CMOS transistors. There are three parameters that changes with the temperature in the CMOS circuit. First, the polysilicon resistance has a positive temperature coefficient which is approximately linear although it displays some secondorder effects. The second parameter is the decrease in mobility with respect to temperature. The third in the fact that the threshold voltage decreases with the temperature. The two last temperature effects are used in the design of a temperature sensor [8]. Another sensor with fewer transistors uses only the temperature dependence of the threshold voltage [9], the design of this sensor is shown to the left of Fig. 5. The temperature sensing devices are often used inside a bias network [6], [10], [11]. The temperature compensation circuits are commonly realized as a bandgap reference. This type of reference uses two different temperature dependent sensors, one with positive temperature coefficient and the other with a negative one. The output of the band-gap reference is a linear combination of the temperature sensors [12]. Vdd Vdd M2 Vx M1 2.1 2.09 2.08 2.07 2.06 2.05 2.04 Vdd Vout 2.11 Output voltage (V) 5. TEMPERATURE SENSORS A sensor is needed to measure the temperature of the substrate in order to make the temperature compensation possible. In this section two different types of temperature sensors have been investigated. These two temperature sensing devices are shown in Fig. 5. Thermometer output voltage 2.12 M3 M2 2.03 0 20 40 60 Temperature in degrees Celsius 80 100 Figure 6. The output voltage from the voltage sensor as a function of the temperature Iout Thermometer output current 73 M1 72 The sensor that has an output voltage that is temperature dependent will be called the voltage sensor and the other will be named the current sensor. The voltage sensor designed with NMOS transistors is presented in [9]. Here PMOS transistors are used since they generate less flicker noise [10] which is a problem at low frequencies. Another advantage of using PMOS in the sensor is that it is possible to make a direct connection between the source and bulk. This is not possible in the NMOS implementation in a standard p-substrate process that is not a twin-well process. The connection between source and bulk will increase the linearity of the sensor since the threshold voltage will not vary with the DC operation point of the transistor. The current sensor converts the output voltage of the node V x to a current I out . In the implementation shown in Fig. 5 all the transistors are of PMOS type to generate less noise and make a direct connection of the source to the bulk possible, and thereby increase the linearity as stated above. A common property for both temperature sensors is that the temperature dependence of the output can be increased or decreased by changing the ratio of the sizes of the diode connected transistors, M1 and M2. The temperature dependence of the two temperature sensors are shown in Fig. 6 and Fig. 7. Both of these figures shows that the output quantity of the sensors are temperature dependent. The output variations can also be approximated by a straight line, especially for the voltage sensor. In these simulation results no mismatch between the transistors has been considered. If a transistor mismatch of 0.1 percent is introduced, then a deviation from the ideal temperature dependence will arise. For worst case mismatch scenario for the voltage sensor the Output current (µA) 71 Figure 5. The two temperature sensors. The voltage sensor (left) and the current sensor (right). 70 69 68 67 66 0 20 40 60 Temperature in degrees Celsius 80 100 Figure 7. Temperature dependence of the output current of the current sensor. DC-value is changed by less then 0.1% whereas the slope variation is smaller then 0.4%. On the other hand the same variations in the current sensor are about 3.5% and 1%, respectively. 6. DIFFERENTIAL GAIN STAGE The performance of the temperature compensation is to be tested in a simple filter where amplifiers are used as integrators. The differential gain stage has been chosen as the amplifier since it is a commonly used subcircuit in analog circuit, for example in operational amplifiers. The transconductance value of the differential gain stage is dependent of the bias current through the amplifier. As the current increases the transconductance value increases as well. Controlling the bias current in a proper way will decrease the temperature variations. The connection between the voltage sensor and the bias voltage of the differential gain stage is made through a level shifter used to set the correct working bias voltage. In the case where the current sensor is used the temperature dependent output current are copied to the differential gain stage trough a simple current mirror. 7. FILTER The evaluation of the performance of the temperature compensation scheme has been evaluated by checking the bandwidth of a first-order transconductor-C filter shown in Fig. 8. gm2 Vinp Iout gm1 CL Vinn Figure 8. The first-order transconductance-C filter The output of the temperature compensated filters using the voltage- and current approach are compared with the traditional way of biasing the circuit using a current mirror which is feed with a constant current. The outcome of the comparison is shown if Fig. 9. 2 Voltage compensated Current compensated Current mirror 1.95 Bandwidth (MHz) 1.9 1.85 1.8 1.75 1.7 1.65 1.6 0 20 40 60 80 Temperature in degrees Celsius 100 Figure 9. The bandwidth of the filter as a function of the die temperature. From Fig. 9 it is obvious that the temperature compensation circuits are much more efficient, in the sense of maintaining a constant bandwidth with respect to temperature variations, than the usual way of biasing the circuit. The relative bandwidth variation due to temperature changes in the interval 0 to 100 °C is defined as y max – y min ∆BW BWrel = ------------- = ----------------------------------------(5) ( y BW max + y min ) ⁄ 2 The BWrel for the current mirror approach is 14.8% whereas it is 0.072% and 0.78% for the voltage- and current sensor compensation scheme, respectively. The voltage sensor compensation scheme is then improving the temperature insensitivity by approximately 200 times, whereas an improvement of about 20 times is achieved for the current sensor. In a real chip implementation of the temperature compensation scheme the transistors suffers from mismatch due to process variations. Simulations show that a mismatch in the transistors size of the temperature compensation circuits increases the temperature dependency of the filter. These simulations shows also that the cur- rent sensor compensation scheme is more sensitive to mismatch then the voltage sensor approach. Another advantage of the voltage sensor approach is that it can be designed to consume less power than the current sensor. On the other hand, the chip area is smaller using the current sensor approach. A drawback of the temperature compensation scheme is that the control is performed in an open loop configuration. This means that all the nonlinearities must be known to get a fully temperature independent circuit, which of course is not possible. One may think that this open loop regulation is not usable due to process variations and mismatch, but these compensation methods are to be used as just one of several control loops in the filter. If the above compensation techniques just reduces the temperature dependence of the filter then the design of the outer control loops will be facilitated. 8. CONCLUSION In this paper we described tuning schemes usable for high-performance integrated active filters. To tune the filter transfer function several control loops must be applied where each loop decreases variations in the filter. Two different temperature compensation circuits has been proposed. The first one generates a temperature dependent voltage whereas the other one generates a temperature dependent current. The performance of the compensation circuits has been evaluated in a first-order transconductance-C filter. The variation of the bandwidth of the filter due to temperature variation is lowered by a factor of about 200 and 20 for the two compensation circuits. A test chip has been fabricated in the AMS 0.35 µm CMOS process. 9. REFERENCES [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] B. G. Streetman, Solid State Elecronic Devices, Prentice Hall, 1995. W. Liu, et. al., BSIM3V3.2.2 MOSFET Model Users’ Manual, 1999. P. R. Gray and R. G. Meyer, Analysis and Design of Analog Integreted Circuits, 3rd ed., John Wiley & Sons, 1993. M. Ismail and T. Fiez, Analog VLSI Signal and Information Processing, McGraw-Hill, 1994. W. M. Sansen, F. P. Eynde and M. Steyaert, “A CMOS Temperature-Compensated Current Reference,” IEEE J. Solid-state Circuits, Vol. 23 No.3, pp. 821-824, June 1988. K. Koli and K. Halonen, “A 2.5V temperature compensated CMOS logarithmic amplifier,” IEEE Custom Integrated Circuits Conf., pp. 79-82, 1997. O. Salminen and K. Halonen, “The higher order temperature compnesation of bandgap references,” IEEE Interna. Symp. on Circuits and Systems, ISCAS ’92, Vol. 3, pp. 1388-1391, 1992. V. Székely, M. Rencz and B. Courtois, “Integrating On-chip Temperature Sensors in DfT Schemes and BIST Architectures,” 15th IEEE VLSI Test Symp., pp. 440-445, 1997. M. A. Rybicki, R. L. Geiger, “A Temperature stable and process compensated mos active filter,” 1984 IEEE Interna. Symp. Circuits ans Systems, ISCAS ‘84, pp. 940-943, 1984. D.A. Johns, K. Martin, Analog Integrated Circuit Design, John Wiley & Sons, 1997. G.M Glasford, Analog Electronic Circuits, Prentice-Hall, 1986. B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001.