1618 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 8, AUGUST 2005 A 2.5-GHz Low-Power, High Dynamic Range, Self-Tuned Q-Enhanced LC Filter in SOI Xin He and William B. Kuhn, Senior Member Abstract— -enhanced LC filter technology offers a promising approach to remove the off-chip preselect filter still required in current transceivers. However, reported designs fail to meet stringent system specifications such as dynamic range and noise figure for existing wireless standards. The complexity and inaccuracy of frequency and tuning have also prevented acceptance in industry applications. This paper presents a low-power and high-performance design targeted at Bluetooth in a silicon-on-isolator (SOI) CMOS process. Drawing 5 mA from a 3-V supply, it achieves 23-dB voltage gain (14-dB power gain), approximately 6-dB noise figure, and a 153-dB Hz 1-dB compression point dynamic range, when operating with a 70-MHz bandwidth at 2.5 GHz. A simplified aptuning is also demonstrated, making proach to frequency and -enhanced LC filtering feasible in industry application for the first time. Index Terms—Active filters, bandpass filters, full integration, LC filters, RFCMOS, self-tuning, silicon-on-isolator (SOI), SOS. I. INTRODUCTION T O ACHIEVE lower cost and smaller size, the trend in wireless communication transceiver design has been toward full integration from the antenna port to the information source/sink, eliminating discrete components without compromising performance such as power consumption, selectivity, noise figure, and dynamic range. However, in current gigahertz-range receivers, a bulky and expensive off-chip bandpass filter before the LNA is still required to handle the existence of large out-of-band interference. Great efforts have been made to use an on-chip -enhanced LC filter to replace such off-chip preselect filters [1]–[11]. As shown in Fig. 1, a -enhanced filter can be applied to replace both the discrete preselect filter and the LNA, providing comparable bandwidth, front-end gain, and net noise figure performance at similar power consumption [9]. Moreover, it has been demonstrated that the filter can offer good protection against out-of-band interferers, since, with proper design in CMOS, compression occurs first at the filter output and the filter’s gain decreases outside its passband [5]. While the -enhanced filter approach is not suitable for frequency-division-duplex (FDD) transceivers without time Manuscript received August 12, 2004; revised February 8, 2005. X. He was with the Department of Electrical and Computer Engineering, Kansas State University, Manhattan, KS 66506-5204 USA. He is now with Philips Research East Asia, Shanghai 200070, China (e-mail: xin.he@philips.com). W. B. Kuhn is with the Department of Electrical and Computer Engineering, Kansas State University, Manhattan, KS 66506-5204 USA (e-mail: wkuhn@ksu.edu). Digital Object Identifier 10.1109/JSSC.2005.852043 Fig. 1. Receiver front-end designs. (a) Traditional. (b) Q-enhanced filter. regulation for transmit and receive, it is suitable for time-division-duplex (TDD) and time-division multiple-access (TDMA) transceivers as well as receive-only systems. Fortunately, many existing communication systems support TDD, such as GSM, Bluetooth, TDD/WCDMA, and WLAN. As data communication dominates future communication systems with the increasing demand for large volume multimedia transfer, TDD is becoming more popular due to its high efficiency. If a suitable on-chip tunable filter is available, it can decrease the size of future multistandard transceivers significantly by eliminating different copies of discrete filters for different bands. Unfortunately, the use of such on-chip bandpass RF filters has been prevented so far by their limited performance capabilities relative to system specifications. Stringent system requirements such as high compression point, narrow bandwidth, high dynamic range, and low noise figure have been determined based on capabilities of off-chip filters [9]. In commercial designs, an LNA typically presents a 2-dB noise figure, 20-dB gain, and a 1-dB input compression point of about 20 dBm, while consuming 15 mW [12]. Therefore, the LNA combined with a 3-dB insertion-loss discrete filter achieves a net 5-dB noise figure and 17-dBm input compression point with 17-dB voltage gain, yielding a 1-dB compression point dynamic range of 152 dB (in a 1-Hz normalized bandwidth). To date, reported -enhanced filter designs have succeeded in bandlimiting the signal sufficiently, but fail to match these stringent noise figure and dynamic range capabilities [8]. The best-documented examples present a noise figure of 19 dB and dynamic range of 137 dB Hz while drawing as much as 50 mW or more [4]–[9], far from the needed requirements, even for Bluetooth, which has very relaxed system specifications. Another obstacle for -enhanced filtering is the need for tuning. The master–slave (M/S) automatic frequency and tuning technique has dominated research endeavors in most on-chip filter research and applications due to its relative simplicity compared to self-tuning approaches such as the correlated tuning loop technique [13] and orthogonal reference tuning [14]. However, to avoid interference problems, the master-oscillator frequency must be kept away from the center 0018-9200/$20.00 © 2005 IEEE HE AND KUHN: 2.5-GHz LOW-POWER HIGH-DYNAMIC RANGE SELF-TUNED Fig. 2. Simplified Q-enhanced filter circuit-level diagram. frequency of the slave filter, which violates the assumption that master and slave resonators demonstrate the same quality factor and leads to significant inaccuracy for tuning. This leads to problems in achieving a predictable filter and bandwidth. In this paper, we present a low-power, low-noise, high-dynamic-range -enhanced LC filter with a low-complexity self-tuning technique addressing all of these problems. One reason for the poor performance in previous designs is that only low- (less than 10) inductors are available in standard CMOS or BiCMOS processes. The solution is to use an silicon-on-isolator (SOI) process with high bulk resistivity such as silicon-on-sapphire (SOS) where high- inductors are available ( 20 between 2–3 GHz). With the use of on-chip high-Q inductors and appropriate circuit topology, this filter achieves 23-dB voltage gain, approximately 6-dB noise figure, a 1-dB compression point dynamic range of 153 dB Hz, and 70-MHz bandwidth at 2.5 GHz, while drawing only 5 mA from a 3-V supply. The performance is comparable to that of a conventional LNA with an off-chip bandpass filter. A low-complexity self-tuning technique is also demonstrated which maintains frequency and bandwidth over fabrication tolerances and temperature. The paper is organized as follows. Section II presents the new -enhanced LC filter design at 2.5 GHz. The noise figure and dynamic range analysis is then given in Section III. In Section IV, we address the self-tuning technique in the RF bandpass filter. The measured results are demonstrated in Section V. Finally, the paper is wrapped up with the conclusion in Section VI. II. -ENHANCED LC FILTER DESIGN It has been shown that active LC filters can achieve a significantly larger dynamic range than inductorless active filters - filters with similar power consumption [9], [15]. such as Therefore, the -enhanced filter is a more promising approach to meet the stringent performance requirements in wireless receivers. The basic idea is to use negative resistance to boost the in a lossy LC tank. Fig. 2 shows a simplified second-order represents equiv(one-pole) bandpass filter topology, where alent parallel loss resistance from the finite tank at resonance. realizes the required negative resisNegative conductance tance to compensate for the loss in the tank. The effective quality factor of the filter at the resonant frequency can be shown to be [1] -ENHANCED LC FILTER IN SOI 1619 . Indeed, the it can be set as high as desired with appropriate filter core can be tuned to oscillate if negative transconductance . This fact, which is is sufficiently large, i.e., greater than typically viewed as a problem, can be turned into an asset as Section IV on tuning shows. Fig. 3 shows the full schematic of the new -enhanced filter in SOS targeted at Bluetooth applications. The filter is composed of an input balun L2, C2, input transconductor FETs M1a/b, cascode FETs M2a/b, and tank L1, C1, while the negative resistance is implemented by cross-coupled FETs M3a/b (plus more switched copies) and analog fine tuning using source-degenerated negative transconductor M4a/b. Frequency tuning is similarly provided by switched capacitances and MOS varactor control. Two buffers M5a/b are positioned on the differential output of the filter to isolate the LC tank from the following loads during test. M5a/b function as source followers with 200- output impedances. A 50- buffer would introduce much bigger parasitic capacitance and losses, thus degrading the of the LC tank in the filter, and was not used since 250- probes were available for test. A. LC Tank In a -enhanced LC filter, the base quality factor of the LC tank before -enhancement is critical for the performance such as dynamic range and noise figure [15]. Fortunately, high spiral inductors with of 20 are becoming available in RF-targeted SOI processes. RF-compatible SOI processes such as SOS use a high resistivity or insulating substrate, as opposed to the very low (0.02 cm) or moderate (20 cm) resistivity of standard CMOS, therefore reducing or eliminating substrate losses [16]. As an example, Fig. 4 presents a square inductor tested in the target process and its measured result. A six-element frequency-independent model of spiral inductor in SOI process has been proposed in [16]. This model, which was used during the design of the filter, includes only losses from resistance and eddy currents within the metal traces of the spiral. In the design of Fig. 3, a 1.4-nH one-turn inductor with a of approximately 30 is used in the tank. Due to finite- switched capacitors and MOS varactor, the net of the tank is around 20. Hence, the target bandwidth of 70 MHz can be achieved with a moderate enhancement factor of 1.8, allowing good dynamic range performance to be achieved [9]. B. Input Matching Network An important innovation in this filter is to adopt an LC input balun which decreases the noise figure significantly and provides additional preselect filtering [17]. A 6:1 voltage step-up balun formed by L2 and C2 is employed to convert the unbalanced 50- source to a differential source for differential input is given by stage M1a/b. The ideal upconversion ratio (1) (2) where is the base quality factor of the LC tank, which is dominated by the inductor in the low gigaherz range. Theoretically dewhere is resonant angular frequency of the balun and notes the 50- source. Due to the finite for the inductor L2a 1620 Fig. 3. Schematic of IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 8, AUGUST 2005 Q-enhanced filter. and L2b (around 20 in implementation), each one presents a se; thus the actual ratio is ries resistance of (3) and the transformed differential source impedance seen by M1a/b is (4) This conversion increases the percentage of the total output noise contributed by the source, therefore decreasing the noise figure. However, two factors limit the maximum ratio. First, series resistance increasing with the inductor impedance required in a higher upconversion ratio will degrade noise figure eventually as it becomes comparable to source impedance. Second, the size of FETs M1a/b also upper bounds the ratio. In the input balun, capacitor C2 absorbs the parasitic capacitance from gate to source and gate to drain in M1a/b to resonate L2. As the upconversion ratio increases, the capacitance of C2 gets smaller, eventually becoming comparable to the gate input capacitance. To keep the bandwidth and the noise figure impact of the input balun reasonable, the fixed capacitance C2 was set to about five times bigger than the total gate capacitance. C. Input Transconductors The differential input transconductors M1a/b use a grounded-tail configuration to provide maximum possible signal swing within the amplifier. A current-tail structure exhibits better common-mode rejection but degrades signal swing headroom. Since there may be strong out-of-band signals presented to the filter, bigger signal swing is a more important concern. M1 uses a special zero-threshold device offered by the target IC process, both to minimize the noise figure and to optimize the dynamic range performance in the filter [9], overdrive at 0.5-V bias [10]. With the resulting 0.5-V voltage, signals of up to 1-V peak differential can be tolerated at the filter input, translating to approximately 9-dBm input compression at the antenna terminals. Additional protection comes from the input balun at large frequency offsets. For example, the calculated out-of-band blocking performance at 500-MHz offset (1.9-GHz PCS band) is 3 dBm, or 7 dB above the Bluetooth requirement. Transistors M2a/b are also implemented with zero-volt threshold devices to minimize noise figure, but are three times larger than M1. This minimizes the voltage swing at the drains of M1, allowing M1’s gates to be biased at a lower voltage, maximizing signal swing within the LC resonator. D. Negative Transconductance and Tuning Components In contrast to conventional -enhanced filters, a current-reuse strategy is employed to implement negative transconductance in this design. In the filter, negative transconductor FETs M3a/b share the same dc current with input FETs M1a/b, without sacrificing dynamic range. M3a/b are implemented with low-noise, regular-threshold (0.8-V) PFET devices to provide approximately 1-V peak differential signal swing across the LC tank’s effective resistance at resonance before leaving the active region (onset of output compression). In the HE AND KUHN: 2.5-GHz LOW-POWER HIGH-DYNAMIC RANGE SELF-TUNED Fig. 4. -ENHANCED LC FILTER IN SOI 1621 A 4.6-nH inductor in the target process. (a) Die photograph. (b) Measurement result. simulation, around 0.7-V peak differential swing is achieved at the compression point, translating to a calculated output compression point of 1.5 dBm in the 350- net LC tank loss resistance and to an in-band input-referred compression point of 15.5 dBm at a voltage gain of 23 dB (14-dB power gain). The PFET negative transconductors are sized to offset losses within the on-chip spiral inductor. By increasing the negative transconductance, the filter turns into an oscillator. Due to the variation of the inductor caused by fabrication and temperature variation, this negative transconductance has to be tuned to a proper value to obtain the desired gain and bandwidth for the filter. Instead of using a fixed-size transconductor with a single tunable copy, -tuning is implemented by a bank of switched transconductors, with widths of 80, 40, 20, 10, and 5 m. This bank provides coarse digital control, while analog is achieved through controlling the fine-tuning control of input gate voltage of long-channel FETs M4a/b, which act as degenerative resistors when operated in triode region. E. Frequency-Tuning Components Since the fixed MiM capacitor C1 in the LC tank combined with parasitic capacitances from connected devices is subject to fabrication variation of about 10%, some frequency tuning is required. Usually a MOS varactor is applied to implement full-range frequency tuning. However, with the very high inductors used, normal MOS varactors exhibit relatively poor varactor with quality factor. For example, combining a inductor results in a tank of only 12. Another disada vantage of MOS varactors is variation of quality factor with the voltage difference across the gate and the drain–source, therefore increasing filter nonlinearity. A better approach is to employ a bank of digital switched capacitors for coarse tuning and a small MOS varactor for fine tuning. Another benefit of switched capacitors is that we may use simple digital control algorithm to achieve the desired frequency, as discussed later. To illustrate the design considerations in using switched capacitances, Fig. 5 shows a circuit-level model including Fig. 5. Conventional switched capacitor and its equivalent on/off model. parasitic capacitances and on-resistance. The switched capacitor is turned on by setting low and turned off by setting high. The turn-on capacitance is the capacitance from the fixed capacitor, and the corresponding series resistance mainly which determines comes from the FET channel resistance the on-state . When the capacitor is turned off by setting high, the capacitance is the fixed capacitance in series and the with the parasitic gate–drain overlap capacitance . In this state, the parasitic layout drain–source capacitance quality factor is determined by the turn-on resistance of the bottom nFET in the inverter and the parasitic series resistance in gate–drain capacitance. Hence, we need to use a large-size transistor for an inverter to keep high and the full gate–drain overlap capacitance determines the net off-state capacitance achieved. In the implemented design shown previously in Fig. 3, modified circuitry which increases the average and achieves lower off-state capacitance is employed. As shown in Fig. 6, a large-value resistor is added between the inverter and the transistor. The turn-on capacitance is the same as the conventional digital switched capacitor, but the primary turn-off capacitance ) now becomes the fixed capacitance in series with (ignoring and the gate–source the gate–drain overlap capacitance . Hence, the off-state capacitance is overlap capacitance reduced by one-half, therefore increasing the on–off ratio. 1622 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 8, AUGUST 2005 Fig. 7. Fig. 6. Proposed switched capacitor and its equivalent on/off model. Unfortunately the parasitic layout capacitance between the source and the drain cannot be neglected. To obtain the parasitic drain–source capacitance in the switch FET , we first measured the off capacitance of from the gate to the drain and the source, with the gate biased at zero voltage and drain–source . Therefore, and connected together, denoted by were given by (5) Next. we measured the off capacitance between the drain and source with the gate floated, denoted by . Since consists of the two series capacitance and together with the parallel was calculated by Simplified single-ended equivalent circuit for noise analysis. , body-effect conductance since it is absent is SOI processes, and flicker noise which has no effect for small-signal inputs within the filter passband. First we investigate the output noise contributed from different noise sources in the filter. The small-signal model of half the differential filter with thermal noise is presented in Fig. 7. From the small signal model, the , series resistance noise sources include 50- source from the inductors in the input balun, parallel resistance of half LC tank, and channel thermal noise current in the input transconductor, channel thermal noise current in the cross-coupled output transconductor. The output noise generated by the current noise in the cascode transistor can be neglected. The reason is that the noise current sees from the source assuming an infinite an impedance of drain-to-source resistance, thus inducing an opposite current in the channel which cancels out the noise current. The following equations present the single-sided output noise , and , respectively: contributed by (6) (9) The measurement shows that is comparable to half of the in the target process. Nevertheless, the new apoff-state proach still achieves higher Q and moderately improved on/off ratio compared to conventional one. (10) (11) (12) III. NOISE FIGURE AND DYNAMIC RANGE ANALYSIS (13) For a -enhanced filter to replace a discrete preselect RF filter and subsequent LNA as shown in Fig. 1, the noise figure must be minimized. In this section, we derive an approximate expression for the noise figure which leads to the tradeoffs involved to yield the desired noise performance and dynamic range. The voltage gain of the filter is composed of two parts: the in the input balun and the voltage gain upconversion ratio in the filter core. is described as (7) where is the half-circuit input transconductance and denotes the effective parallel resistance in the half LC tank enhanced by negative transconductance. can be estimated as In (9) and (10), the noise is divided by 2 as it is split between the two half-circuits in the balun. In (12) and (13), an additional comes from injection of noise from the opposite factor of half-circuit (since the noise is uncorrelated with this half-cirand are the noise factors associated with and cuit). , respectively, which are generally in short-channel tranof the intrinsic sistors. In the target process, the measured NMOS used for input transconductance is about 2, and the meaof regular PMOS used for negative transconductance sured exhibits the lowest value with around 1 [17]. can be written as Now the total rms output noise (14) (8) where denotes the effective quality factor in the LC tank, is the half LC tank’s parallel loss resistance, and is the base quality factor of the LC tank. is defined as the -enhancement factor. A complex thermal noise model for CMOS transistors is adopted in [18]. In our derivation, for simplicity, we neglect since it can be absorbed by drain-to-source conductance and the noise factor is expressed as (15) Substituting (9)–(14) into (15) yields (16), shown at the bottom of the next page. The calculated result matches the simulation of HP ADS within less than 5% inaccuracy by using HE AND KUHN: 2.5-GHz LOW-POWER HIGH-DYNAMIC RANGE SELF-TUNED , which is the noise factor in the long-channel transistor. When the input balun operates as an ideal balun, i.e., and , (16) can be simplified to (17), shown at the bottom of the page. To achieve lower noise factor and better noise rejection performance, several tradeoffs are involved in the filter and power consumpdesign. The first one exists between will tion. From (16), increasing the input transconductance decrease the noise factor of the filter. However, to handle large interference signals, we have to keep the dc overdrive voltage conon transconductor M1a/b at about 0.5 V, hence higher sumes more power. The second tradeoff is between series resisand voltage upconversion ratio in the input balun as tance discussed in previous section. The optimum ratio can now be found from (16). Once the noise figure is known, dynamic range (DR) can be calculated based on supported voltage swings at the filter output. While many definitions for dynamic range exist, a simple but useful one is given by the ratio of 1-dB input compression point to the input-referred noise floor relative to 1-Hz bandwidth, given by (18) corresponding to With respect to output peak voltage 1-dB output compression point in this filter, it can be written as (19) Substituting (16) into (19) yields (20), shown at the bottom of the page, where denotes the enhancement factor . A simplified DR defined by the ratio of 1-dB output compression point to the output noise floor in a second-order -enhanced filter has been shown in [15] (21) where represents the output noise floor, denotes the final IF bandwidth, and is the noise factor of transistors used -ENHANCED LC FILTER IN SOI 1623 is proportional to the enhancein the filter. Note that ment factor from (7) and (8), so that (20) also presents the appearing in (21). penalty of To compare circuits independent of bandwidth, the 1-dB compression DR relative to a 1-Hz bandwidth is applied to define a figure of merit (FOM) [9] (22) where is the dc power. To date, the best FOM achieved is 121 dB Hz/mW. The filter reported here achieves 141 dB Hz/mW through the use of high inductors and careful attention to noise figure issues. This value is comparable to a traditional front-ends built with a discrete preselect filter followed by a comparable-power LNA [9]. IV. SELF-TUNING TECHNIQUE As previously discussed, traditional M/S tuning is difficult to implement in -enhanced filters and consumes extra power and chip area. Self-tuning offers a better alternative for TDD/TDMA systems. However, traditional self-tuning suffers from the complexity of an additional reference generation circuit and the feedthrough caused by the switches between the signal path and reference signal. In this paper, we introduce a low-complexity self-tuning which eliminates the need for RF reference signal and switches, as shown in Fig. 8. The essential in the filter until concept of this approach is to increase it oscillates and then recover a filter with desired frequency and bandwidth from oscillation by decreasing appropriately negative transconductance inside the circuitry. The full tuning procedure is proposed as follows. 1) Turn the filter into an oscillator by increasing the control signal. 2) Tune the oscillator frequency to the desired center frequency of the filter. 3) Decrease the -tuning control and detect the transition point when oscillating dies away. (16) (17) (20) 1624 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 8, AUGUST 2005 Fig. 9. Fig. 8. Low-complexity self-tuning technique eliminating RF reference and switches. 4) Back off the control by an additional fixed amount to establish the desired final bandwidth. In this filter, the frequency tuning can be realized by a simple digital tuning algorithm with the help of a classic phase-frequency detector (PFD) which functions as a frequency detector here. The output of the PFD is applied to a counter controlling the 4-b switched-capacitor bank within the filter. First we initialize the count to the lowest frequency and maximum amplitude by turning on all 4-b switched capacitors and 5-b negative transconductance. During tuning, if the frequency after divide-by- is lower than the reference signal to the PFD, we decrease one LSB in each reference clock. The tuning is continued until the signal frequency after divide-by- is higher than the reference signal, indicated by the inverted PFD output. Assuming a moderate 1-MHz clock at the counter, this will require only a maximum of 16 s which is negligible in the system. Subsequently, the -tuning is performed to set the filter bandwidth. Note that the shift between the oscillating frequency and the center frequency of filter is small because the tank cirvalue is high and the parasitic capacitance variation due cuit to turning on/off of cross-coupled FETs is small compared to fixed capacitance in the LC tank. This is an additional benefit of using high inductors within the design. Moreover, we avoid the use of a full PLL circuit here since the center frequency does not need to be highly accurate. For tuning, the following issues must be addressed. • A transition point must be accurately detected when oscillation dies away by decreasing negative transconductance. • A constant or predictable negative transconductance variation between the filter with desired bandwidth and the transition point of oscillator must be possible in the tuning frequency range and commercial temperature range. • The minimum tuning time should be far shorter than the idle slot between transmit and receive in the target communication system. Fig. 9 plots the curve of the oscillation amplitude versus width of cross-coupled FETs with 0.5- m length in the oscillator. The FET’s size where the oscillating amplitude reaches zero is defined as the ideal transition point in this paper. From (1), the Oscillating amplitude versus negative transconductor width. theoretical negative transconductance at the transition point can be expressed as (23) From (1), the required cross-coupled transconductance is (24) and thus the variation of negative transconductance between the oscillator and the filter is found from (25) Since the inductance of is relatively immune to fabrication and temperature variation in a good RF process with high , is fixed for a given . We may consider the transistor size corresponding to a small amplitude, for example, one fifth of the maximum amplitude as the approximate transition point, which can be easily detected by a comparator working with an RF amplitude detector. The small difference between idea transition point and approximate . transition point can be factored into In actual implementation, is realized by turning off a pair of cross-coupled transistors with a fixed size. Unfortunately, the negative transconductance provided by the fixed pair may vary with temperature. The transconductance of a long channel transistor is expressed as (26) The work [19] indicates that the temperature coefficients for and are about 5000 ppm/ C and mV C , on are opposite in respectively. Since the effects of and of can be reduced to sign, the temperature coefficient 1500 ppm/ C by choosing overdrive voltage between is 0.6 and 0.3 V. From (1), the temperature coefficient of given by (27) HE AND KUHN: 2.5-GHz LOW-POWER HIGH-DYNAMIC RANGE SELF-TUNED Fig. 10. -ENHANCED LC FILTER IN SOI 1625 Simplified oscillator model. As the enhancement factor is limited to 2, 70 C temperature variation around 10%, which is acceptchange results in able in real applications. Furthermore, some first-order temperature compensation circuits may be possible by careful design variation with temperature, thus allevito further mitigate variation. ating Finally, we investigate the time issue in this tuning technique. The total tuning time consists of the time consumed by the setup of the oscillator, frequency tuning, and transition point detection, in addition to the settling time after turning the oscillator back into the desired filter. A simplified oscillator model is depicted in Fig. 10. The transfer function for this model is expressed as (28) With a zero input, the envelope of oscillation corresponding to the elapsed time is given by (29) reaches the stable amplitude. The oscillating setup before when suftime is quite short due to the small time constant ficient excess negative transconductance is used. In simulation, the setup time is less than 100 ns, negligible compared to system idle time in existing communication systems. The analysis for time cost in transition point detection is quite complicated. We decrease the negative inductance by turning off a constant-size transconductor at each step, thus increasing the negative resistance and the time constant in (29). However, we can estimate the time constant as ten times the initial time constant for the worst case, and the detection time can be on the order of microseconds by ignoring the digital switching time in searching the transition point. Frequency-tuning time in the oscillator is mainly determined the by the frequency of the reference signal in the PFD. Due to the removal of feedback, the response time to achieve the desired frequency is significantly faster than that of a traditional PLL. For quiescent time from the oscillator to the filter, the response time is also short due to the small time constant in the desired filter. For example, with and pf in the half LC tank after -enhancement, the time constant is about 2 ns. From the analysis above, the accumulated tuning time can be limited on the order of microseconds, which is significantly smaller than the idle time in existing TDD and TDMA communication systems. Fig. 11. Die photograph. V. MEASURED RESULTS The filter described above has been implemented in a 0.5- m SOS process with one poly layer and three metal layers. A photograph of the chip is shown in Fig. 11. The area consumed by the filter is approximately 2.5 mm . The one-turn spiral inductor positioned on the right of the die is the inductor in the LC tank. The single spiral inductor on the left of the die is the tail inductor. Two parallel spiral inductors next to the tail inductor are used for the input balun, in which the layout polarity of inductors is chosen to cancel coupling to other inductors. The design targeted a tuning range from 2.25 to 2.65 GHz to span the Bluetooth band and provide for tuning. The measured frequency range is from 2.45 to 2.85 GHz, due to the difference in inductor values between EM simulator and fabrication. In measurements of noise figure and dynamic range, the frequency controls were set to 2.55 GHz and the desired selectivity was achieved through manual setting of the coarse controls. Automatic tuning was then implemented with the aid of bench test equipment for measuring frequency and amplitude and software for adjusting filter tuning controls. Measured current consumption is 5 mA (excluding buffer) at a 3-V power supply. The actual filter response (S21) versus -tuning and frequency tuning are shown in Figs. 12 and 13, respectively.1 The filter response over the full range of 0–6 GHz is shown in Fig. 14. Ultimate rejections are 25 dB at most frequencies of interest (cellular/PCS/cordless). At low frequency, the observed rejection is believed be limited by the single-sided measurement at the output and/or insufficient supply bypassing. The hot/cold source method with a 15-dB ENR source was applied to measure the noise figure of the filter. The differential voltage gain of the filter was set to 23 dB (14-dB power gain) by coarse control, obtaining a bandwidth of 70 MHz . A 4.9-dB noise floor variation at resonance was observed, which gives a noise figure of 11.8 dB for the total cascaded stages including the attenuating probe and spectrum analyzer measurement system, translating to a noise figure of 5.8 dB for 1These measurements were obtained with an HP8753E network analyzer using direct probing with a model ECP18 Picoprobe on the filter input and a model-10 250- (5:1 voltage attenuating) passive probe on the buffer circuit output. Raw measurements showed a 5-dB gain after S21 calibration with both probes connected to a “through” substrate. Actual filter voltage insertion gains shown in the plots include an adjustment of +18 dB due to 6-dB loss from the output buffer voltage division, 6 dB from the single-sided sampling of the output, and approximately 6 dB due to the open-circuit source value presented to the high-impedance port-2 probe during calibration. 1626 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 8, AUGUST 2005 Q-tuning. Fig. 12. Actual filter response versus Fig. 13. Actual filter response versus frequency tuning. Fig. 15. Noise floor spectrums in hot/cold source conditions at 1% fractional bandwidth (2.541-GHz center frequency, 150-MHz span; 40-dBm reference, and 10 dB per division). 0 Fig. 16. Improvement of the compression point outside the filter bandwidth. TABLE I SUMMARY OF MEASURED PERFORMANCE Fig. 14. Filter response over 0–6 GHz. the filter.2 Operating at high gain and high mode, the filter presents slightly a higher noise figure, but the measurement can be more accurate because the gain appearing after the probe exhibits a few decibels instead of loss in the low gain mode. As 2An error analysis indicates that the actual noise figure may be up to 1 dB higher or lower than the measured value due to tolerances in the measurement. shown in Fig. 15, a noise floor power variation of 7.3 dB was recorded with a voltage gain of 32 dB and 27-MHz bandwidth, translating to a noise figure of 7 dB when operating as a tunedpreselect filter with a one percent fractional bandwidth . The measured input 1-dB compression point is 15 dBm at a voltage gain of 23 dB at 70-MHz bandwidth, resulting in a normalized DR of 153 dB Hz and a FOM of 141 dB Hz/mW. If HE AND KUHN: 2.5-GHz LOW-POWER HIGH-DYNAMIC RANGE SELF-TUNED -ENHANCED LC FILTER IN SOI 1627 TABLE II PERFORMANCE COMPARISONS BETWEEN LNA AND INTEGRATED RF FILTERS IN THE LITERATURE Fig. 17. Q-tuning over 80-MHz frequency range. a spectrum analyzer and Labview software. From the GPIB interface, the computer reads the frequency and amplitude of the oscillator and changes the setting of the negative transconductance to find the transition point. A simple constant variation of FET size between the transition point and the filter with of about 40 was found to be viable in an 80-MHz frequency range, as shown in Fig. 17. Fig. 18 demonstrates the actual filter response achieved in over a temperature range of 50 using the proposed technique. A summary of measured performance is provided in Table I for the cases of operation as a fixed-tuned prselect/LNA and a tuned-RF preselect/LNA system block. Table II presents comparisons between this design operating in the fixed-tuned mode and other reported designs. Note that, in the closest published result [7], there is no gain and the actual FOM would be significantly degraded (at least 10 dB lower) if the LNA stage is included. VI. CONCLUSION Fig. 18. Q-tuning over 50 temperature variation at 2.55 GHz. used at the narrower 27-MHz bandwidth, the compression point is 23 dBm due to the higher associated gain. As shown in Fig. 16, the compression point improves outside the filter bandwidth as the filter gain falls. This plot was produced at the nominal 70-MHz filter bandwidth. Once the compression point reaches about 6 dBm, the improvement slows as the input transconductor begins to enter the nonlinear region exceeding overdrive). of operation ( To validate the basic functionality of the self-tuning technique, automatic tuning has been performed with the help of The design described in this paper implements a practical one-pole -enhanced filter in a 0.5- m SOI process. With the help of high inductors and an on-chip voltage step-up input balun, it achieves a FOM significantly exceeding that of previous designs. The measured FOM is 12 dB higher than the best reported result, mainly due to the relatively low noise figure in this design. The filter provides 23-dB voltage gain (14-dB power gain), a noise figure of 6 dB, and a normalized 1-dB compression point DR of 153 dB Hz when operating at a 70-MHz bandwidth centered at 2.5 GHz, with 5-mA current and 3-V supply. The result is comparable to that of existing commercial front-end designs employing an off-chip bandpass filter and LNA. A simple but efficient self-tuning methodology is also introduced in the paper, which eliminates the need for complex circuits and interacting frequency and tuning loops in conventional master–slave or self-tuning techniques. With the demonstrated performance and simple tuning circuits, -enhanced filtering is shown to be practical for industry applications. ACKNOWLEDGMENT The authors would like to thank D. Nobbe and D. Kelly at Peregrine Semiconductor for collaboration on process and 1628 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 8, AUGUST 2005 inductor issues and A. Orsborn for background work on noise issues. REFERENCES [1] W. B. Kuhn, F. W. Stephenson, and A. Elshabini-Riad, “A 200-MHz CMOS Q-enhanced LC bandpass filter,” IEEE J. Solid-State Circuits, vol. 31, no. 8, pp. 1112–1122, Aug. 1996. [2] S. Pipilos, Y. P. Tsividis, J. Fenk, and Y. Papananos, “A Si 1.8-GHz RLC filter with tunable center frequency and quality factor,” IEEE J. Solid-State Circuits, vol. 31, no. 10, pp. 1517–1525, Oct. 1996. [3] R. Duncan, K. W. Martin, and A. S. Sedra, “A Q-enhanced active-RLC bandpass filter,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 44, no. 5, pp. 341–347, May 1997. [4] W. Gao and W. M. Snelgrove, “A linear integrated LC bandpass filter with Q enhancement,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 45, no. 5, pp. 635–639, May 1998. [5] W. B. Kuhn, N. K. Yanduru, and A. S. Wyszynski, “Q-enhanced LC bandpass filters for integrated wireless applications,” IEEE Trans. Microw. Theory Tech., vol. 46, no. 12, pp. 2577–2586, Dec. 1998. [6] D. Li and Y. Tsividis, “Design techniques for automatically tuned integrated gigahertz-range active LC filters,” IEEE J. Solid-State Circuits, vol. 37, no. 8, pp. 967–977, Aug. 2002. [7] T. Soorapanth and S. S. Wong, “A 0-dB IL 2140 30 MHz bandpass filter utilizing Q-enhanced spiral inductors in standard CMOS,” IEEE J. Solid-State Circuits, vol. 37, no. 5, pp. 579–586, May 2002. [8] F. Dulger, E. Sanchez-Sinencio, and J. Silva-Martinez, “A 1.3-V 5-mW fully integrated tunable bandpass filter at 2.1 GHz in 0.35-m CMOS,” IEEE J. Solid-State Circuits, vol. 38, no. 6, pp. 918–928, Jun. 2003. [9] W. B. Kuhn, D. Nobbe, D. Kelly, and A. W. Orsborn, “Dynamic range performance of on-chip RF bandpass filters,” IEEE Trans. Microw. Theory Tech., vol. 37, no. 10, pp. 685–694, Oct. 2003. [10] W. B. Kuhn, “Fully integrated bandpass filters for wireless transceivers—Problems and promises,” in Proc. IEEE Midwest Symp. Circuits and Systems, 2002, pp. 69–72. [11] X. He and W. B. Kuhn, “A fully integrated Q-enhanced LC filter with 6 dB noise figure at 2.5 GHz in SOI,” in Proc. IEEE Radio Frequency Integrated Circuits (RFIC) Symp., 2004, pp. 643–646. [12] MBC13916 General Purpose SiGe:C RF Cascode Amplifier. Motorola, Data Sheet. [13] T. L. Brooks and P. M. VanPeteghem, “Simultaneous tuning and signal processing in integrated continuous-time filters: The correlated tuning loop,” in Proc. IEEE Int. Symp. Circuits and Systems, 1989, pp. 651–654. [14] W. B. Kuhn, A. Elshabini-Riad, and F. W. Stephenson, “A new tuning technique for implementing very high Q, continuous-time, bandpass filters in radio receiver applications,” in Proc. IEEE Int. Symp. Circuits and Systems, 1994, pp. 5-257–5-260. [15] W. B. Kuhn, F. W. Stephenson, and A. Elshabini-Riad, “Dynamic range of high-Q OTA-C and enhanced-Q LC RF bandpass filters,” in Proc. IEEE Midwest Symp. Circuits and Systems, 1994, pp. 767–771. [16] W. B. Kuhn, X. He, and M. Mojarradi, “Modeling spiral inductors in silicon-on-sapphire processes,” IEEE Trans. Electron Devices, vol. 51, no. 5, pp. 677–683, May 2004. 6 [17] A. W. Orsborn, “Noise analysis and automatic tuning of Q-enhanced LC bandpass filters,” M.S. thesis, Dept. Electr. Comput. Eng., Kansas State Univ., Manhattan, KS, 2001. [18] BSIM3v3 Manual, 1999. Univ. of Calif., Berkeley. [19] Y. Wu, C. Shi, M. Ismail, and H. Olsson, “Temperature compensation design for a 2.4 GHz CMOS low noise amplifier,” in Proc. IEEE Int. Symp. Circuits and Systems, vol. 1, Geneva, Switzerland, May 2000, pp. 323–326. Xin He received the B.S. and M.E. degrees in instrumentation from the University of Science and Technology of China, Hefei, China, in 1997 and 2000, respectively, and the M.S. and Ph.D. degrees in electrical engineering from Kansas State University, Manhattan, in 2002 and 2004, respectively. In the summer of 2004, he joined Philips Research East Asia, Shanghai, China, as a Senior Research Scientist. His research interests include RF filter design, high-efficiency power amplifiers, PLLs, and modeling of spiral inductors and varactors in SOI processes. William B. Kuhn (S’78–M’79–SM’98) received the B.S. degree in electrical engineering from Virginia Polytechnic Institute and State University (Virigina Tech), Blacksburg, in 1979, the M.S. degree in electrical engineering in 1982 from the Georgia Institute of Technology (Georgia Tech), Atlanta, and the Ph.D. degree from Virginia Tech in 1996. From 1979 to 1981, he was with Ford Aerospace and Communications Corporation, Palo Alto, CA, where he designed radio receiver equipment including frequency synthesizers and bit synchronizers. From 1983 to 1992, he was with the Georgia Tech Research Institute, Atlanta, working primarily in radar signal analysis and mixed-signal circuit simulator development. In 1996, he joined Kansas State University, Manhattan, as an Assistant Professor, later becoming an Associate Professor in 2000. He currently teaches courses in communications theory, radio and microwave circuit/system design, and VLSI. His research is primarily targeted at low-power radio electronics in CMOS, BiCMOS, and SOI technologies. Dr. Kuhn was the recipient of the Bradley Fellowship in 1993 from Virginia Tech and a Faculty Early Career Development (CAREER) Award from the National Science Foundation in 1999. At Kansas State he has also been the recipient of the Hollis Award for Excellence in Undergraduate Teaching in 2001, the Eta Kappa Nu Distinguished Faculty Award in 2002 and 2003, and the Paslay Professorship in Electrical and Computer Engineering in 2004.