Flip Chip Technology & the End
Market
William T. Chen
ASE
June 21 2004
1
A Quotation
“If a man can make a better mouse-trap,
though he build his house in the woods,
the world will make a beaten path to his
door”
Att. Ralph Waldo Emerson
(1803 – 1882)
2
Brief History of Flip Chip
C4 on Ceramic Substrate in IBM 360
1965
Evaporation 95/5 PbSn Process
Solder Bump Printing by Delco
1973
Eutectic Solder
Invention of SLC on PWB in IBM
1986
Underfill Process developed in IBM
1987
High Volume Flip Chip BGA SRAM
Package shipped IBM
1996
3
Industry Forecast – 1990s
In the mid 1990’s Industry forecasts have
identified Flip Chip CSP/BGA as the package
of the future.
The “Future” is here today. More device
applications are designed into Flip Chip.
What are the industry factors that contribute to
wide implementation of Flip Chip today?
4
Outline
• Semiconductor & Industry Trend
• Flip Chip Infrastructures
• Applications & the End Market
• Wrap-Up
5
Semiconductor &
Industry Trends
6
World Semiconductor Forecast
Revenue ($B)
300
250
200
150
100
50
0
2000
2001
2002
2003
2004
2005
Source: Gartner Dataquest June 2004
2006
2007
2008
7
IC Capacity Growth & Feature Size Reduction
1600
WW Wafer production MSI/Qtr
1400
1200
65nm
1000
90nm
130nm
0.18 um
800
0.25 um
0.35um
600
> = 0.5um
400
200
0
1997
1998
1999
2000
2001
2002
2003
Source:Dataquest November 2003
2004
2005
2006
2007
2008
8
Backend Growth: IDM & Subcon
Total Back-end 03-06 CAGR = 11.5%
41
42
US$ Billion
40
34
35
27
30
23
20
24
18
18
Subcon 03-06 CAGR = 21.5%
19
21
24
23
Total Semicon
Back-end
Revenues
10
0
2000
30
Subcon Backend Share
Growth from 35% to
45%
IDM 03-06 CAGR = 5.4%
2001
2002
2003
2004
2005
IDM Back-end
Revenues
2006
Source : Dataquest
9
Paradigm shift in customer
requirement to Integrated Solution
Solution
Focus
Value
Technology
Focus
Cost
Focus
•
•
•
•
Economic scale to reduce
cost and available
capacity to meet overflow
•
demand critical
Leadframe-based
packages
•
Primarily packaging only
•
Advanced packaging and
testing capabilities
displace capacity as
primary consideration,
although cost remains
important
Integrated solution
including substrate
design and close
partnership with
complementary service
providers to reduce cycle
time becomes necessary,
together with cost
reduction and advanced
technology
•
Flip chip packages
Substrate-based
packages
•
SiP, 3D Packaging
Packaging and
increasingly testing
•
Packaging, testing and
materials required 10
Technology Evolution Changes The Value Chain
PDIP
SOJ
QFP
BGA
Flip Chip
8 Leads
32 Leads
208 Leads
256 Balls
1100 Balls
13%
25%
Other
LF/S
15%
30%
21%
23%
6%
22%
40%
6%
8%
6% WB/
Bump
Inspect/ 11%
Mold/ Test
11%UF
45%
15%
30%
4%
17%
36%
6%
13%
26%
36%
35%
Technology Evolution
Leadframe/Substrate
Inspect & Test
Mold/Underfill
Wirebond/Bump
Other
Source: Company estimates
11
Regional Shares of Semiconductor Consumption
45%
40%
35%
30%
25%
20%
15%
97
98
99
00
01
02
03
04
05
06
07
Americas
Japan
Europe
Asia Pacific
Source SIA June 2004
12
Industry Trends Summary
• Growth in volume and % of 130 nm & 90
nm devices.
• Increasing demand on SAT service
providers for solutions
• Value chain evolution in cost to substrate.
• Semiconductor consumption growth shift to
Asia Pacific.
13
Computing
Flip Chip
Fine Pitch/Low k
Wire Bonding
Wafer Level
Packaging
Flip Chip & Wire Bond
Turnkey Solution
Communication
BCC
QFN
Stacked Die
System on Chip
(SIP)
Green Solutions
MEMS &
Image
Sensor
Consumer
14
Flip Chip Infrastructure
15
Flip Chip Implementation
Bumping, Wafer Probe, Assembly,
Substrate, & Final Test Services
Final
Test
WLCSP, Module,
System Assembly
& Test
Assembly
Wafer
Bumping/Probing
Foundry
Engineering
Test Dev
IC Circuit
Design
Substrate/
Lead Frame Mfg
Substrate
Design
16
Wafer Bumping
BUMPING
WAFER SORT
SUBSTRATE
ASSEMBLY
FINAL TEST
Substantial Capex Equipment & resource investment
Traditional part of major IDM’s wafer backend
Growing capabilities & capacities in Asia Pacific SAT’s
Broadening Bumping Offerings
Eutectic, high lead & lead free solders
Au for LCD applications
150mm/200 mm/300 mm wafers from diverse foundries
Challenges in Cu-Low k & Pb free, electromigration
17
Growing application & market for WLCSP
Wafer Probe
BUMPING
WAFER SORT
SUBSTRATE
ASSEMBLY
FINAL TEST
Wafer Probing after Wafer Bumping
300/200/150 mm probing essential backend service
Few players with large probing & tester resources
Important not to be production/volume bottle neck
Challenges:
Test frequency
mixed signal/SIP/SOC
Bump pitch 150 um (array) & max bump counts
Key enabling Infrastructure with WLCSP
18
Substrate
BUMPING
WAFER SORT
SUBSTRATE
ASSEMBLY
FINAL TEST
Build Up (BU) Substrate de facto standard for Flip Chip
Trend of Laser Via to replace Photoimagible Mat &
Process
Substrate is major cost item in total package cost
BU substrate suppliers emerging outside Japan
Main users are microprocessor based companies
Design & assembly critical to package performance &
cycle time
Laminate Substrate for low cost Flip Chip & FC CSP
19
Assembly
BUMPING
WAFER SORT
SUBSTRATE
ASSEMBLY
FINAL TEST
Where “Rubber meets the Road” in FC Volume
Manufacturing
Diverse BOM & Process to tackle Diverse Device,
Bumps & Substrates
IDM inhouse s & SAT service suppliers Asia Pacific, US,
Japan & Europe
Challenges in
large dies, 90 nm Cu-low k devices,
Green Package
SIP & stacked dies & low cost CSP
20
electromigration
Final Test
BUMPING
WAFER SORT
SUBSTRATE
ASSEMBLY
FINAL TEST
Major Capex & Resource Investments : user/customers have
unique requirements
Internal to IDM & few major SAT Service Suppliers
Increasing volume requires more testers
Significant maintenance costs
Test Sockets, Handlers, Burn-in tools design & maintenances
Technical Challenges
High frequency & power
RF, Mixed signal, SIP & SOC
increase package size & ball count
21
Infrastructure
BUMPING
WAFER SORT
SUBSTRATE
ASSEMBLY
FINAL TEST
Essential Volume Manufacturing Capabilities for
Turning Wafers into finished Flip Chip Packed
devices.
Capabilities traditionally inside IDM’s
Growing Investments in Capabilities and Capacities in
SAT Services suppliers
Enabling Flip Chip Implementations for all companies
High I/O & often with large dies
Share Bumping/Wafer Probe Capabilities with WLCSP
22
FA Infrastructure
Material Lab
Thermal Lab
• TMA
• DSC
• DMA
• FT-IR
• GC-MS
• AFM
• Auger ESCA…
• Ansys
• Flotherm
• Psksi- T
• Wind Tunnel
• VXI System…
6“/8” / 12” Bumping
WLCSP
Stress Lab
• I-DEAS
• ANSYS
• LS-DYNA
• AutoCAD
• Moire
Interferometer
• Shadow Moire
• Electromigration…
Fine-Pitch Wire Bonding
6”/8”/12” Flip Chip Assembly
Electrical/System
Lab
SiP/Stacked-die
Green Technology
• Electromigration
• Ansoft Spice Link
FA Lab
• X- ray
• SAT
• TDR
• HFSS/Quad
University & R&D
Collaborations
• Hspice
• Autocad
• ITRI
• 40 GHz Network
Analyzer
•NCU
• 50 GHz Probe
•HKUST
• EMC/EMI…
• IMRE
• EDX
• AES/XPS
• SIMS…
•NTU
23
Concurrent Engineering within Infrastructure
Fast Track Product Development
Customer
Tape Out
Wafer Out
Wafer Fab
ASE
Bumping
ASE Assy
ASE MTL
ASE TEST
Bump Mask
Design
Package Customer
Design Approval
Review
Program
Engineering
Bumping/Probing
Tooling/Kit
Preparation
Package
Assembly
Substrate
Fabrication
Probe Card, Load &
Burn-in Board Mfg.
F/T
24
Four Generic Flip Chip Package Types
Performance
SiP Flip Chip
RF Module, Networking, Graphics
HFC-BGA
FC-CSP
Graphics Chipset
Network Switching
FC-BGA
Programmable Logic Device
Transmission
Chipset
Workstation
Graphics
CPU
RF Device
Power Regulator
Memory
I/O Count
25
Multi-Chip Flip Chip Examples
-
Heat Spreader
Passive Components
Memory
Flip Chip Die
26
HFC BGA Family
Computer:
PC Graphics/Chipsets, Servers and High-End
applications, Microprocessors for PCs & Servers,
PDA, PLD.
Telecom:
Networking, Switching, Transmission, Cellular
Base Stations.
27
FC BGA Family
Computer:
HighPCs &
PC Graphics/Chipsets, Server and
End applications, Microprocessors for
Servers, PLD, PDA.
Telecom:
Network products (LAN),
Switching, Transmission,
Cellular base stations.
28
Flip Chip CSP Family
Consumer:
Camcorders, Digital Cameras, PDA, DVD…
Computer:
Voltage Regulators, High-Speed Memory,
PC Cards, Peripherals…
Telecom:
Pagers, Cellular Handsets,...
29
Device Applications &
the End Markets
30
34.086bp
ATI Graphics Chip in FC-CSP
FC-CSP BY APPLICATION
Source: Prismark April 20044
2002
Analog/Power
Management
2M 20%
ASIC/LOGIC
4M 40%
2007
DSP
4M 40%
Total: 10M Units
MCU/MPU
100M 17%
Memory
100M 17%
2003
Analog/Power
Management
5M 30%
ASIC/LOGIC
15M 3%
ASIC/LOGIC
6M 35%
Analog/Power
Management
75M 13%
DSP
6M 35%
Total: 17M Units
DSP
290M 50%
WY24.086bp-flipchip
Total: 580M Units
31
FLIP CHIP − PBGA CONSUMPTION BY DEVICE TYPE
2003
2002
DSP
6M 5%
Graphics
3M 2.5%
Memory
11M 9%
Memory
14M 8%
MPU/MCU
10M 8.3%
DSP
13M 7%
ASIC/Logic
17M 14%
MPU/MCU
16M 9%
Graphics
17M 9.4%
ASIC/Logic
25M 14%
Chipset/MPR
95M 54%
Chipset/MPR
73M 61%
Total: 120M Units
2007
DSP
76M 11%
Total: 180M Units
Memory MPU/MCU
30M 4% 50M 7%
ASIC/Logic
101M 15%
Graphics
137M 20%
WY24.088bp-pbga
Chipset/MPR
288M 42%
Total: 682M Units
Source: Prismark April 2004
32
Semiconductor Growth by End Market
Other Computer,
12.9%
Cell Phone ,
12.2%
2004
Cell Phone
shipment
+15%
(units)
Industrial /
Minitary, 9.0%
Other
Comminucation,
10.8%
Automotive,
7.8%
2004
Personal Computer
shipment
+13%
(units)
Consumer,
17.1%
Personal
Computer ,
30.2%
Semiconductor revenue forecast 2004 $199B
Source SIA June 2004
2004
Digital
Camera
+20%
(units)
2004
DVD
Consumer
+35%
(units)
33
Three Flip Chip Applications End Markets
PC & Notebooks
Microprocessors already in Flip Chip
Increasing FC in Chipsets & Graphics Processors
Video Games
Game Processors with heavy computing demand
Cell Phones
FC CSP applications
WLCSP
34
Wrap UP
35
Flip Chip is now Available to All
• Flip Chip implementation requires full infrastructure
• Flip Chip infrastructure growth in SATs
• Major end market in PC & Notebook expanding from
Microprocessors to Chipsets & Graphic processor
• Projected expansion to Video Game ASIC Processors
& Cell Phone Device Applications
• Major package solution for 90 nm devices & beyond
• WLCSP leveraging FC high volume production
facilities for expanding applications and infrastructure
growth
36
Thank you for your
participation
37
Copyright © 2004 by Advanced Semiconductor
Engineering, Inc.
All rights reserved.
Other company, product, or service names may be
trademarks or service marks of others.
The materials in this presentation may not be
reproduced, in whole or in part, in any manner or in
any form or otherwise without the written permission
of Advanced Semiconductor Engineering, Inc.
38
