Dynamic Analysis of the Fixed-Frequency PWM LCC-Type Parallel
Resonant Converter using Discrete Time Domain Modeling
Vivek Agarwal
Dept. of Electrical Engineering, Indian Institute of Technology, Bombay, India 400 076.
A.K.S. Bhat, Senior Member, IEEE
Dept. of Electrical and Computer Engineering, Univ. of Victoria, B.C., Canada V8W 3P6.
Abstract - Dynamic analysis of the fixed-frequency pulse
width modulated LCC-type parallel (or series-parallel) resonant converter is presented using discrete time domain
modeling. First, the large-signal state-space model is derived and used to study the large signal behavior of the converter in the event of large, non-linear transient conditions.
The results are verified using SPICE. The steady-state
solution is obtained. Finally, the large signal equations
are linearized about the steady-state equilibrium point to
derive a linear small-signal model, which is used to study
the shall signal dynamic behavior of the converter.
I.
INTRODUCTION
Resonant Converters have been studied extensively by
many authors for over one decade. Series-parallel resonant converter (SPRC)[Fig. I], has i n particular been more
popular because of its advantages over the other configurations. Traditionally, the power control in resonant converters h a s been done by varying the operating frequency
of the converter. Although this technique is very popular,
it has many drawbacks [l].
To overcome these drawbacks, att,empt,s were made to
propose alternate control schemes based on a “fixed” o p
erating frequency. Thus came the idea of fixed frequency
pulse-width modulated resonant, converters. Many techniques have been proposed for the fixed frequency operation. The most popular technique is based on applying
phase shifted gating signals to the full bridge converter.
Some authors [l, 21 have reported the fixed frequency
operation and i t s analysis for the SPRC. Reference [l]describes the fixed-frequency PWM control of the SPRC. It
is shown that high efficiency for large load variations is
achievable along with a narrow range of duty-cycle ratio
control and protection against load short circuit conditions.
A simple analysis and design procedure based on complex
ac circuit theory w a s presented in [l]. However, this analysis uses only fundamental components of voltages and
currents. This type of analysis loses its accuracy at reduced pulse widths and can not predict the different modes
0-7803-3500-7196/$5.00 0 1996 IEEE
of operation of the converter.
In [2], state-plane technique has been used to analyse
the third order SPRC, which has been reduced to a second
order system (by transformation of variables) so that a two
dimensional state-plane analysis can be applied. Although
this technique is very useful, the transformation of the third
order system t o a second order system, makes it difficult to
understand how the various circuit variables are behaving
physically.
Dynamic analysis is very important. The large-signal
analysis determines the response of the converter when
its operating conditions undergo lorge variations in their
steady-state values and is therefore useful for choosing appropriate component ratings. Similarly the small-signal
analysis determines the converter’s response to small perturbations in its steady-state values and is required to
design the closed loop around the converter.
The large-signal analysis of the SPRC, operating in fixed
frequency, pulse-width modulated manner is not available
in the literature. The small-signal analysis, using an approximate extended describing function method was reported in [9]. Recently, a combination of extended describing
function method and state-space approach has been used
[8] to perform the small-signal analysis. In this paper, this
analysis h a s been carried out using state-space technique.
The main objectives of this paper are the following:
(1) To present a large-signal analysis using a discrete time
domain model.
(2) To present a small-signal analysis by linearizing the
large-signal equations about a steady-state operating point.
11. CONVERTER
OPERATION,
DESIGN
A N D TERMINOLOGY
A.
Operation
Phase-shifted gating signals are used to generate a pulsewidth-modulated quasi-square wave across a and b. The
gating signals for the switch pair S3 & S4 are phase shifted
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+
a combination of two events, called the kth and ( k
events [3]. Each of the events is composed of three subevents or the intervals marked in Fig. 2 as intervals T2,
T1 and A , respectively. These intervals are defined by the
following relations.
Figure 1: The full bridge version of the SPRC suitable
for fixed frequency operation. Phase-shifted gating signals
are used to generate a pulse-width-modulated quasi-square
wave across a and b.
with respect to S1 & S2, to obtain the desired zero voltage
interval ( T a l t )in v,b. It should be noted that this zero
voltage interval corresponds to the duration for which one
switch and anti-parallel diode on the other arm in the upper
limbs (or the lower limbs) are ON simultaneously. The
output voltage regulation for load (or line) variations is
obtained by adjusting Talt.
Figure 2: Typical waveforms of the F F PWM SPRC circuit
starting from the kth instant. The various intervals are
marked.
B. Design of the Converter
I n order to identify various modes of operation, initially
the design method given in [l] is used. Design is done
for the worst case loading conditions i.e. for maximum
load current with minimum input voltage. At the rated
design conditions given below, the converter operates with
full pulse width (i.e. Talt
= 0) in lagging power factor mode
and on the boundary of CCVM and DCVM. As the load
current varies due to change in load resistance, the phase
shift between gating signals is changed so as to maintain
the constant, rated value of the output voltage. The SPRC
designed has the following specifications:
Input supply voltage, Vsmin(= 2 E ) = 50 V.
Output voltage of the converter, Vd = 24 V.
Output voltage ripple, V&p-p)= ? 0.025 V.
Output current ripple, ZL-p = t 0.010 A.
Maximum output power, Po = 100 W a t t s .
Switching frequency, ft = 200 k H z .
The design values obtained are:
L = 17.74pH ; C, = 0.047pF ; Ct = n2Ci = 0.047pF.
The rated load resistance is, Ri = 5.76 $2.
It should be noted that Yk,the half period of the operating
cycle, is a constant and hence the subscript "k" will not be
used. A careful inspection reveals that the case is analogous
to the variable frequency case with (& replacing Y k as the
controlling parameter [6].
The input supply to the tank circuit is assumed constant
either at its clamped value of zero or +_ Ek, for a given
event k. The ripple i n its value is considered negligible as
compared to the large step changes it makes at iiistants
t 2 ( k ) and t O ( k + l ) (low ripple approximation [3]) The same
approximation is applied for the load current also.
111.
DISCRETESTATESPACEMODEL
The first step in arriving at the model is to write the large
signal equations representing the converter, during the various intervals of the first half of the operating cycle (called
kth event). The subscript "k" is added to give a discrete
time domain interpretation.
C . Terminology
1)
kth Eoent:
Interval T2; t O ( k ) < f
< fl(k)
Fig. 2 shows typical waveforms for one of the predominant
modes of the FF PWM SPRC in discrete time domain. The
converter operation over one cycle has been represented as
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+
+cflzk
A 3 ~ 2 * (1 ~
=
uct(t')
(6)
uc8(t0(k))
+
~ ~ ( w o t 'B)~) T z ~ . s ~ ~ ( w o ~ ' )
+C3T2r (wOt')
+
(7)
uct ( t O ( k ) )
Equations for the other two intervals, Ti and A , are of the
same form as interval Tz. For example, equation for the
parallel capacitor voltage corresponding to interval Ti is
given below:
=
vct(t")
A3Tik ( 1
- cos(w0t")) + &TIk
+C3Tlr,
.sin(wot")
+uct(tl(k))
(8)
where t" = t - t l ( k ) . All the remaining equations and
coefficients A 1 ~ ,2B1Tzk
~
etc. are defined in [lo].
2 ) (IC + l)'h Event: The (IC + l ) t h interval circuit
equations are identical to those of ICth interval with a change
in the signs of all the variables.
3)
Selection of Discrete State Variables: The following discrete state variables are chosen (corresponding t o
the storage elements in the circuit) for the ICth and (IC l)'*
events.
+
21(k)
ZZ(k)
= -vct(to(k)); Zl(k+l)
= v c s ( t O ( k + l ) ) ; 23(k+l)
Z3(k)
Z2(k+l)
= -iL(tO(k));
= -"cs(tO(k))
= iL(tO(k+l))
Vct(tO(k+l))
(9)
(10)
(11)
For the output section, two additional discrete state variables are introduced for the ICt'' event.
4)
Formulation of the Model: By using the final
values of an interval as the initial values of the immediately
occurring interval, it is possible t o express tlie initial values
ofthe ( k + l ) t hevent in terms of the initial values of the ICth
event. Inserting the state variables defined by (9) - ( l a ) , in
the resulting equations, the following discrete state-space
model is obtained;
Iv.
RESULTSOF
LARGES I G N A L
ANALYsI s
THE
The discrete time domain model described in section 111
was used in predicting the transient behavior of the designed converter operating under open loop conditions.
PRO-MATLAB was used t o solve the discrete time domain
equations on tlie computer. These results are also verified
using SPICE software. Results obtained for different transient conditions are explained next.
1) Sudden Switching ON of the S u p p l y Voltage: In
this section, the effect of sudden switching ON of the supply
voltage is studied. An operating condition is considered,
corresponding to half the rated load current and rated output voltage. The corresponding duty ratio is x 70%. Figs.
3(a) and (b) show the plots of the tank current and the parallel capacitor voltage obtained for this step change using
the large-signal model. Figs. 3(c) and (d) sliow the corresponding SPICE plots. Fig. 4(a) shows the peak component
stresses. Figs. 4(b) and (c) show the plots of tank state
variables and output state variables (current and voltage)
as obtained with the model. Fig. 4(c) also shows the corresponding SPICE plot for the switch ON transient conditions.
2) Step Change in Load: In this section the effect of
a sudden step change in load is considered. The converter
is operating at half the rated load condition with 70 % duty
cycle, when the load changes to quarter of rated load in a
step manner. For the open loop condition, the duty cycle
remains at 70 %. These results are explained next.
Fig. 5 shows the plots of the tank current and tlie parallel
capacitor voltage obtained for this step change using the
large-signal model and SPICE. Fig. G(a) shows the peak
component stresses. Figs. 6(b) and (c) show the plots of
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tank state variables and output state variables (current and
voltage), as obtained with the model. Fig. 6(c) also shows
the corresponding SPICE plot for the switch ON transient
conditions.
3) Closed Loop Example: In this section, a typical
example of closed loop operation is considered. The converter is operating at half the rated load with rated output
voltage value and 70 % duty cycle, when the load suddenly changes to quarter the rated load in a step mahner.
However, unlike in the previous section, where the open
loop operation was considered (and so the duty ratio was
not altered), the duty ratio is altered to regulate the output
voltage (as a result of closed loop operation) to x 63 %.
The results obtained for this case are discussed next. It is
assumed that the closed loop action is instantaneous. Fig.
7 shows the plots of the tank current and the parallel capacitor voltage obtained using the large-signal
model and
SPICE. Fig. 8(a) shows the peak component stresses. Figs.
8(b) and (1‘ show the Plots Of tank state
and Output state variables (current and voltage) as obtained with
the model. Fig. 8(c) also shows the corresponding SPICE
plots.
V. SMALL-SIGNAL
ANALYSIS
OF FF
PWM SPRC
In this section the small-signal modeling of FF PWM SPRC
is performed using the large-signal model obtained in section 111. As was stated earlier, the small-signal analysis is
concerned with the response of the converter to small perturbations in its steady state operating conditions.
A. Linearization of SPRC About the Equilibrium
Point
First the equilibrium point of operation is obtained by applying the symmetry condition q ( k ) = z i ( k + l ) to (13) (17) [lo]. The large-signal state-space model represented
by (13) - (17) has the following general form:
where “f,” represents some non-linear function of the relevant independent
specified on the right hand side
of the above equation and i = 1 . . .5.
A
a i^\
-7
-_
-- - -
J
P . * P - I ~ D L I Y ~ .
’$
__;O
do
W
7%”
--_--
1
“
d
;1
-Y
E
IEi
--
2x
J
/--l
i
T mn
7
2
7igure 3: (a) Resonating inductor current and (b) parallel
.apacitor voltage, for step change in input voltage supply
iom OV to 25V at half the rated load conditions. In all the
,lots the step change occurs at the origin. (c),(d): SPICE
dots corresponding to (a) and (b).
j _ _
k
2
w
*Marus
r-------
““‘WTUBI
---~---_-__
I
$1
a
m
x
o
CI
8
0
7
~
T-nUmrrm
Figure 4: (a) Peak component stresses (P.u.), (b) Tank
discrete state variables and (c) Output discrete state variables, for step change in input supply. In (c), SPICE results
are also plotted for the sake of comparison. Note that all
these plots have been obtained with discrete set of poillts
obtained one per half cycle, and connected to give an over
all continuous picture.
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These equations can be linearized using the Taylor's expansion about the equilibrium point resulting in five linearized
small-signal equations represented in the matrix form as
below:
01.1
= m.cos(y)
+[" ". I
+ r2.( 1 - 2cos(P + q ) )
8"4(k)
a21
aak
(25)
eq
+ [--
= -Z.rl.sin(y)
a"l(&)a a k
The elements aijs and 6,js of matrices A and B can be
determined using the following:
a22
= -ri.cos(y)
+ r1 - 1 +
.
eo
(26)
[*.e]
(27)
az2(k) a a k
eo
As an example, some of these elements are given below.
Others have also been derived and are given in [IO].
a11
= -cos(-/)
+
.s
5/
,
.
,
,
,
,
,
,
,
.
.
.
.
.
.
,
,
Figure 5: (a) Resonating inductor current and (b) parallel
capacitor voltage, for step change in load from half the
rated load to quarter the rated load. (c),(d): SPICE plots
corresponding to (a) and (b).
Figure 6: (a) Peak component stresses (P.u.); (b) Tank ais-.
Crete State Variables and (c) Output discrete state variables
for step change in load from half the rated load to quarter
the rated load.
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+ 2 . r l . a ) .dok
-dak
- - -(r2.Z.sin(a)
D
' -dEk
=o
ax4(k)
where
D = ( z 2 + z 3 ) s i n ( a )+ Z.(-zl
+
+r~.+4)cos(rr) Z.rl.x4
= a25 = a35 = agl = a52 = a53 = 0
b52 = 0
b13 = b23 = b33 = b43 = b51
The partial derivatives involved in the above equations are
evaluated next. For this, the parallel capacitor voltage is
equated to zero at the end of interval B, which leads to the
following equation:
rZ.(XZ(k)
(44)
dfz
8ak
af3
+ x 3 ( k ) ) . ( l - c o s ( a k ) )+ Z.%'.(-Xl(k)
+ Z.rl . r Z . z q ( k ) . a k - z 3 ( k ) = @g)
Then, using ( 3 9 ) , the partial derivatives (evaluated at the
equilibrium point) obtained are given by:
I
\
,
...b
-2
m
s sa
io
Tmn-
,m A
( b)
,;o
(40)
,a
A
+iF--G
(46)
(41)
r2.D
,w
+ +2 . ~ 1
= Z.rz.z4[2.r2.cos(q p)
(45)
Equation ( 1 9 ) , with coefficients of matrices A and B
given by ai, and b,, , respectively, represents the small signal model of the FF PWM SPRC in matrix form. This
model can be used to predict the small-signal behavior of
the F F PWM SPRC.
I
dx3(k)
= Z.rl.r2.x4[2cos(P+ q ) - 21
aak
+r2.24(k))sin(ak)
80, - --Z.Sin(CY). dak - -(I - COS(&))
-axl(k\
D
'azZfk,
D
8ak
1 - r z . ( l - cos(a))
--
(43)
Other partial derivatives are obtained from ( 1 3 ) - (17). For
example:
(37)
(38)
a15
(42)
sa
*,
hh-
,*
A *A
-M
A k
(d)
Figure 7: (a) Resonating inductor and (b) Parallel capacitor voltage for closed loop operation example where the
duty cycle changes in response to a step change in load
from half the rated load to quarter the rated load. (c),(d):
SPICE plots corresponding to (a) and (b).
Figure 8: (a)Peak component stresses (P.u.); (b) T a n k discrete state variables and (c) output discrete state variables,
for closed loop operation example where the duty cycle
changes in response to a step change in load from half the
rated load to quarter the rated load. In (c), SPICE results
are also plotted for the sake of comparison.
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VI.
DYNAMIC
PERFORMANCE
PARAMETERS
The dynamic performance parameters like the control t o
output gain, audio susceptibility and output impedance,
which are useful in evaluating the dynamic behavior of the
converter are determined in this section. These parameters can be used to design suitable cofipensation for the
closed loop system. Fig. 9(a) shows the plot of control to
output transfer function as obtained with the help of the
proposed model. Fig. 9(b) shows the corresponding plot
for the audio-susceptibility transfer function. The output
impedance transfer function plot is shown in Fig. 9(c).
50
VII.
CONCLUSIONS
A discrete state-space large signal model has been presented and used to predict the response of the converter
t o large signal disturbances. The large-signal analysis
provided the following results. During switch ON conditions, the converter enters leading p.f mode of operation
before reaching the steady state where it is designed to o g
erate in lagging p.f. mode. All the tank components are
over stressed during the switch ON transients. The closed
loop operation during the step change in load, causes reduced component stresses. All the results obtained with
the proposed model, have been verified using SPICE. A
small-signal model has also been obtained by linearizing
the large signal state space equations. More results will be
presented in a future paper.
I
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Controlled Full Bridge LCC Type Resonant Converter,
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IO‘
Id
--
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Id
cc 1
J
Figure 9: Results of the small-signal analysis: (a) The plot
of control t o output transfer function. (b) Plot of audiosusceptibility. (c) Plot of output impedance transfer function as obtained with the small-signal model obtained in
this paper.
Vivek Agarwal, “Steady-State and Dynamic Analysis of
the LCC-Type Pamllel Resonant Converter, .,PhD dissertation, University of Victoria, Canada, Oct. 1994.
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