Simple 1st-order Pole circuits

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Simple 1st-order Pole circuits
1st-order Low-Pass
R
C
Vin ( s )
H (s) 
1st-order High-Pass
C
L
Vout ( s )
1 / RC
s  (1 / RC )
R
Vin ( s )
H (s) 
Vout ( s )
R/L
s  ( R / L)
H dB
Vin ( s )
H (s) 
R
R
Vout ( s )
s
s  (1 / RC )
H (s) 
Vout ( s )
s
s  ( R / L)
H dB
p
H (s) 
( s  p)
0 dB
0 dB
+20 dB/dec
H (s) 
-20 dB/dec
p
© Bob York
L
Vin ( s )
log 
p
s
( s  p)
log 
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Simple Pole/Zero Circuits
Pole < Zero
L
C
R1
R1
R1
R2
Vin ( s )
Vout ( s ) Vin ( s )
C
1
( R1  R2 )C
1
z
R2C
R1
Vout ( s )
R2
R1  R2
L
R
z 1
L
p
p
H (s)  A
H dB
(s  z)
(s  p)
0 dB
-20 dB/dec
© Bob York
z
Vin ( s )
p
R2
Vout ( s )
R2
A
R1  R2
log 
R2
Vin ( s )
Vout ( s )
L
R1  R2
L
R
z 2
L
1
( R1  R2 )C
1
z
R1C
p
H (s) 
20log A
p
Pole > Zero
H dB
(s  z)
( s  p)
0 dB
+20 dB/dec
20log A
z
p
log 
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Second-Order LP/HP
2nd-order Low-Pass
L
R
L
1
1
LC
s2  s R  1
L
LC
s2  s 1
R C
2 L

C
R
C
C

2nd-order High-Pass
R
LC
RC
1
LC
1 L
2R C
H dB
C
L
L
s2
s2  s R  1
L
LC

R
s2
s2  s 1
R C
2 L

RC
1
LC
1 L
2R C
H dB
0 dB
0 dB
+40 dB/dec
-40 dB/dec
c 
© Bob York
1
LC
log 
c 
1
LC
log 
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Cascading Circuits
Cascading two of these together will give two simple
poles, but the loading effect of the circuits on each other
cause the poles to “split” away from s=-1:
Consider a 1st-order circuit
with a simple pole, e.g.:
1Ω
1Ω
1F
1Ω
H (s) 
H (s) 
1
s 1
1F
1F
© Bob York
3  5
2
 0.38, 2.6,
p1 , p2 
How can we combine circuits in a way that preserves the pole locations?
Introducing a unity-gain buffer
between the circuits effectively
allows each to operate under
the same conditions that we
normally use to derive the
transfer function. That is,
driving the circuit from an
ideal voltage source under
open-circuit conditions):
1
s 2  3s  1
1Ω
I 0
+
1F
Buffer amp behaves like an
open circuit from this side
1Ω
1F
H (s) 
1
( s  1) 2
Buffer amp acts like an ideal voltage source
(zero internal impedance) from this side
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Cascading Circuits, continued
In principle we can cascade any number of circuits in this manner to realize more complicated
transfer functions. Note we could also add gain in the circuit as shown below:
R1
R2
R2
A 1
R1
+
H1 ( s )
+
H 2 (s)
H 3 (s)
H ( s )  A H1 ( s ) H 2 ( s ) H 3 ( s )
This is not the most efficient way to synthesize complex transfer functions, but it is one of the most
conceptually easy and straightforward methods.
Note that the non-inverting amplifier configuration is needed here because it has an infinite input
impedance. This is not the case for the inverting op-amp configuration.
© Bob York
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Op-Amp Gain Stages
The basic op-amp configurations allow us to synthesize a variety of s-domain responses
Inverting Amplifier
Non-Inverting Amplifier
Z 2 ( s)
Z1 ( s )
Vin
For large gain
+
Z1 ( s )
Vin
Vout
AV  
Note that the output terminal acts as a DC
return. Also, it is usually assumed that the
circuit is driven by an ideal source which
also acts as a DC return path.
© Bob York
+
Vout
Vout
Z (s)
1 2
Vin
Z1 ( s )
Vout
Z (s)
 2
Vin
Z1 ( s )
Practical Issue: in general, both inputs
need a DC path to ground.
Z 2 ( s)
+
+
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Integrator/Differentiator Configurations
Simple RC Circuits Based on the Inverting Amplifier Configuration
Vin
Vin
log 
Adding an extra resistor implements a simple pole
circuit (1st-order low-pass) with gain (inverting)
H (s) 
Vin
C
+
© Bob York
log 
H ( s)  
R2
C
R2
R1
-20 dB/dec
Vin
1
R2C
Vout
Adding an extra resistor implements a
simple zero circuit with gain (inverting)
20 log
Vout
+20 dB/dec
zero at s=0
 R2 / R1
sR2C  1
|H| dB
R1
+
-20 dB/dec
pole at s=0
R2
R
C
Vout
H ( s )   sRC
log 
R1
+
|H| dB
+
|H| dB
C
R
Differentiator
|H| dB
1
H (s) 
sRC
Integrator
R2
(1  sR1C )
R1
-20 dB/dec
20 log
Vout
1
R1C
R2
R1
log 
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More 1st-Order Inverting Configurations
Find the transfer function and Bode plots!
C
R1
Vin
R2
+
C
R1
Vout
+
Vin
Vin
© Bob York
+
Vout
R3
R2
R1
R2
C
R3
R1
Vout
Vin
R2
C
+
Vout
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Circuits With Inductors
L
C
Vin
© Bob York
R
C
L
R
+
Vin
Vout
R
R
+
Vout
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