Network Theorems (Part II)-MCQs

advertisement
Network Theorems (Part II)-MCQs
1. If an impedance ZL is connected across a voltage source V with source impedance ZS’ then
for maximum power transfer, the load impedance must be equal to
(a) source impedance ZS
(c) real part of ZS
(b) complex conjugate of ZS
(d) imaginary part of ZS
[GATE 1988: 2 Marks]
Ans. (b)
According to maximum power transfer 𝒁𝑳 = 𝒁∗𝑺
2. A load, ZL=RL+jXL is to be matched, using an ideal transformer, to a generator of internal
impedance, ZS=RS+jXS . The turns ration of the transformer required is
(a) √|𝑍𝐿 /𝑍𝑆 |
(c) √|𝑅𝐿 /𝑍𝑆 |
(b) √|𝑅𝐿 /𝑅𝑆 |
(d) √|𝑍𝐿 /𝑅𝑆 |
[GATE 1989: 2 Marks]
Ans. (a)
𝒁𝑳
π’πŸ 𝟐
=( )
𝒁𝑺
π’πŸ
or
π’πŸ
𝒁𝑳
=√
π’πŸ
𝒁𝑺
3. The value of the resistance, R, connected across the terminals, A and B, (ref. Fig.) which
will absorb the maximum power, is
3K
4K
A
B
AC
R
6K
4K
(a) 4.00kΩ
(b) 4.11kΩ
(c) 8.00kΩ
(d) 9.00kΩ
[GATE 1995: 1 Mark]
Ans. (a)
For maximum power transfer 𝑹 = 𝑹𝒕𝒉 finding Thevenin’s equivalent between
point A, B replace voltage source by it’s internal impedance
𝑹𝒕𝒉 = πŸ‘π‘²β€–πŸ”π‘² + πŸ’π‘²β€–πŸ’π‘²
= πŸπ‘² + πŸπ‘² = πŸ’π‘²
4. The Thevenin equivalent voltage VTH appearing between the terminals A and B of the
network shown in the figure is given by
100 00V
a
j2
AC
3
-j6
A
j4
VTH
B
(a) j 16(3-j4)
(b) j 16(3+j4)
(c) 16(3+j4)
(d) 16(3-j4)
[GATE 1999: 2 Marks]
Ans.
(a)
The voltage at the node a is 100∠00
𝑽𝒕𝒉 =
𝟏𝟎𝟎
𝟏𝟎𝟎 × π’‹πŸ’(πŸ‘ − π’‹πŸ’)
× π’‹πŸ’ =
πŸ‘ + π’‹πŸ’
πŸπŸ“
= π’‹πŸπŸ”(πŸ‘ − π’‹πŸ’)
5. Use the data of the figure (a). The current I in the circuits of the figure (b)
R2
R2
R1
A
R3
R1
B
A
R4
10V
2A
R3
B
R4
i=?
a
20V
b
(a) -2 A
(b) 2 A
(c) -4 A
(d) +4 A
[GATE 2000: 2 Marks]
Ans.
(c)
This is a reciprocal and linear network. According to reciprocity theorem, an ideal
voltage source in loop A, produces current I in loop B. By interchanging the
positions of voltage source and ammeter produces the same current in loop A. When
voltage source is doubled and is negative current also doubles with opposite
direction π’Š = −πŸ’π‘¨
6. In the network of the figure, the maximum power is delivered to RL if its value is
i1
40
0.5 i1
20
RL
50V
(a) 16 Ω
(b) 40/3 Ω
(c) 60 Ω
(d) 20 Ω
[GATE 2002: 2 Marks]
Ans.
(a)
For maximum power delivered, RL must be equal to Rth.
I1
P
40
0.5 I1
20
50V
Writing KCL at node P, let Vth be the open circuit voltage
𝟎. πŸ“ π‘°πŸ =
π‘°πŸ =
𝑽𝒕𝒉 𝑽𝒕𝒉 − πŸ“πŸŽ
+
𝟐𝟎
πŸ’πŸŽ
𝑽𝒕𝒉 − πŸ“πŸŽ
πŸ’πŸŽ
(π’Š)
(π’Šπ’Š)
Solving equation (i) and (ii)
𝑽𝒕𝒉 = πŸπŸŽπ‘½, π‘°πŸ = −𝟏
𝑽𝒕𝒉
𝑹𝒕𝒉 =
,
𝑰𝑺π‘ͺ
𝑰𝑺π‘ͺ is short circuit current when RL is shorted
πŸ“πŸŽ
𝑰𝑺π‘ͺ = 𝟎. πŸ“ π‘°πŸ +
= 𝟎. πŸ“(−𝟏) + 𝟏. πŸπŸ“ = 𝟎. πŸ”πŸπŸ“ 𝑨
πŸ’πŸŽ
I1
40
0.5 I1
20
50V
𝑹𝒕𝒉 =
𝑽𝒕𝒉
𝟏𝟎
=
= πŸπŸ”β„¦
𝑰𝑺π‘ͺ 𝟎. πŸ”πŸπŸ“
7. For the circuit shown in the figure, Thevenin’s voltage and Thevenin’s equivalent resistance
at terminals a-b is
1A
5
i1
+
a
0.5 i1
5
b
-
10V
RL
(a) 5 V and 2 Ω
(b) 7.5 V and 2.5 Ω
Ans.
(c) 4 V and 2 Ω
(d) 3 V and 2.5 Ω
[GATE 2005: 2 Marks]
(b)
𝑽𝒕𝒉 = 𝑽𝒂𝒃
KCL at node a
𝑽𝒂𝒃 𝑽𝒂𝒃 − 𝟏𝟎
+
=𝟏
πŸ“
πŸ“
2 Vab = 7.5
For Rth deactivate independent sources (10V, voltage source by zero
impedance and 1A current source by open circuit)
𝑹𝒕𝒉 = πŸ“β„¦β€–πŸ“β„¦ = 𝟐. πŸ“β„¦
8. In the circuit shown, what value of RL maximizes the power delivered to RL ?
-
VX
+
4
Vt
- VX +
+ 100V
-
(a) 2.4 Ω
(b) 8/3 Ω
4
4
RL
(c) 4 Ω
(d) 6 Ω
[GATE 2009: 2 Marks]
Ans.
(c)
For maximum power delivered to RL, RL = Rth of the network. (deactivate
independent source Vi)
Removing RL and connecting Vtest = 1 volt supplying current I. then Rth =
impedance looking into the network
=
𝟏 𝒗𝒐𝒍𝒕
𝑰
VX
4
- +
I1
I
4
4
- +
VX
(I - I1 )
DC
1V
Rth
Using KVL in outer and inner 100p
𝟏 = πŸ’π‘°πŸ + 𝑽𝑿
𝑽𝑿 = πŸ’(𝑰 − π‘°πŸ )
𝟏 = πŸ’π‘°πŸ + πŸ’(𝑰 − π‘°πŸ )
𝒔𝒐,
𝑰=
𝟏
πŸ’
𝑹𝒕𝒉 =
𝟏
𝟏
=
= πŸ’β„¦
𝑰 𝟏⁄
πŸ’
9. In the circuit shown below, if the source voltage VS = 100 ∠ 53.130 V then the Thevenins’s
equivalent voltage in Volts as seen by load resistance RL is
j4
3
j6
3
-
+
VL1
VS
i1
AC
j40 i2
+
-
(a) 100∠900
(b) 800∠00
+
10 VL1
-
i2
RL = 10
(c) 800∠900
(d) 100∠600
[GATE 2013: 2 Marks]
Ans.
(c)
To find Vth or Voc (open circuit voltage), detach RL
π’ŠπŸ = 𝟎,
𝑽𝒐𝒄 = πŸπŸŽπ‘½π‘³πŸ
π’ŠπŸ = 𝟎 (dependent voltage source is zero),
𝑽
π‘½π‘³πŸ = πŸ‘+𝒋𝑺 πŸ’ × π’‹ πŸ’
𝟐𝟎 × πŸ’π’‹
𝑽𝒕𝒉 = 𝟏𝟎 π‘½π‘³πŸ = πŸ–πŸŽπŸŽ ∠πŸ—πŸŽπŸŽ
π’‹πŸ’πŸŽ. π’ŠπŸ = 𝟎
Download