Invited Paper
Experimental demonstration of a magnetic bipolar junction transistor
E. Johnston-Halperin*a, M. E. Flatteb and D. D. Awschalomc
a
Dept. of Physics, The Ohio State University, 191 Woodruff Ave., Columbus, OH USA 43221;
b
Optical Science and Technology Center and Department of Physics and Astronomy, University of
Iowa, Iowa City, IA 52242; cCenter for Spintronics and Quantum Computation, University of
California, Santa Barbara, California 93106, USA
ABSTRACT
The field of semiconductor spintronics has pursued the development of novel device architectures exploiting the spin
degree of freedom in addition to, or in place of, traditional charge based functionality. In particular, theoretical modeling
has predicted that the addition of a magnetic base layer to a bipolar junction transistor has the potential to serve as an
exceptionally efficient spin filter, add intrinsically non-volatile functionality and exhibit extremely fast switching. Here,
we present the experimental implementation of this scheme via the inclusion of a digitally-doped (Ga,Mn)As layer into
the p region of an n-p-n III-As heterojunction bipolar transistor. These proof of principle devices exhibit gain greater
than one, concurrent with robust ferromagnetism, which demonstrates a critical step in the development of an active spin
functional device architecture.
Keywords: spintronics, magnetic semiconductor, semiconductor, transistor, magnetism, MBE
1. INTRODUCTION
As one of the first proposals for an active spin-functional electronic device, the seminal work of Datta and Das
predicting a “spin transistor” based on a field-effect transistor architecture motivated much of the early work in
semiconductor spintronics. Since that initial proposal, further experimental work demonstrating intrinsic magnetic and
spin functionality in semiconductor heterostructures [1,2] and all-electrical spin injection and manipulation[3-7] has led
to additional device proposals[1,8-13]. Hybrid transistor devices incorporating both semiconductors and ferromagnets,
such as the spin-valve transistor[14-16], have demonstrated magnetoresistances exceeding 300%, but suffer from low
efficiency for current transport through the base to the collector. Additional hybrid systems are also under
development[17]. Of particular interest here is the proposal of a new general class of semiconductor devices, based on
bipolar (junction) transistors[18], but enhanced in functionality by the use of a magnetic semiconductor in one or more
regions of the device[19]. Although new phenomena may be achieved by this substitution for any transistor region,
(emitter, collector or base) this proposal demonstrates the potential for dramatic new functionality when a magnetic
semiconductor is used as the base of a bipolar transistor while the emitter and collector remain nonmagnetic.
Despite the significant potential inherent in this new device geometry, the experimental realization of this structure has
been hampered by the difficulty in incorporating active magnetic layers within an electronically active semiconductor
heterostructure. This difficulty in turn arises from the fundamental materials challenge that for the most well established
ferromagnetic semiconductors, (III,Mn)As, an extremely low growth temperature is required to stabilize the magnetic
phase and avoid the precipitation of MnAs secondary phases. This low growth temperature in turn results in the
incorporation of excess As, typically resulting in As interstitial and antisite defects that form deep electronic traps and
quench the electronic functionality necessary for diode or transistor functionality. Here we take advantage of advances in
the growth of high electronic quality III-As heterostructures at low growth temperature (typically 230º C) [20] to embed
a magnetically active ferromagnetic layer within the base layer of a heterojunction bipolar transistor (HBT). These proof
of principle devices exhibit gain greater than one concurrent with robust ferromagnetism, demonstrating a critical step in
the development of an active spin functional device architecture.
2. GROWTH
The growth of the heterostructures used in this study is based on the foundational work presented in Ref. [20]. That work
addressed the fundamental technical challenge inhibiting the incorporation of ferromagnetic layers into traditional III-V
Spintronics V, edited by Henri-Jean Drouhin, Jean-Eric Wegrowe, Manijeh Razeghi,
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heterostructures: the low growth temperature required to prevent phase segregation of MnAs precipitates leads to the
inclusion of As interstitial and antisite defects, which in turn completely compensates electronic doping. Using the
technique of atomic-layer epitaxy (ALE; also known as migration-enhanced epitaxy, MEE) Ref. [20] demonstrates
precise control of the As stoichiometry and hence both p- and n-type doping in magnetic heterostructures.
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Figure 1. (a) Shutter logic for ALE growth of a digitally doped MnAs layer (see text). (b) Schematic layer structure of the
low-temperature grown base layer of the spin-HBT. (c) Band diagram of the full spin-HBT, vertical lines in the base layer
indicate the position of digitally-doped MnAs layers.
A schematic of the shutter control logic employed for ALE growth and resulting heterostructure can be found in Figs.
1(a) and 1(b), while a self-consistent Poisson model of the full heterostructure can be seen in Fig. 1(c). The details of the
low-temperature ALE growth are as follows.
Samples are grown on semi-insulating GaAs (100) substrates; the oxide is thermally desorbed at 610º C and a hightemperature GaAs smoothing layer (200 nm at 580º C) is grown prior to the deposition of the collector layers via
conventional high temperature growth. The sample is then cooled to low temperature (230º C) for ALE growth in an As
atmosphere. All effusion cells are standard EPI Knudsen cells with the exception of As, which is a valved sublimator
equipped with a cracker at a temperature of ~ 800º C (resulting in an As2 dominated flux). For all samples discussed
below, the structure of the magnetic layer is comprised of 9 repeats of 20 monolayers (ML) of GaAs and 0.5 ML of
MnAs (we will adopt the notation (20,0.5)9 to denote this superlattice structure). Two distinct ALE algorithms are used
during growth, one for the growth of the GaAs spacers and a second for the growth of the MnAs magnetic layers
(unshaded and shaded regions in Fig. 1(a), respectively).
For the GaAs, the following sequence is used: 1 ML Ga/ 5 s wait/ ~1 ML As/ 10 s wait/ 1 ML Ga/ … where the Ga rate
is determined using RHEED oscillations and the As rate is determined using a calibration sample. For layers requiring
electrical doping, Be is co-deposited with the Ga at a rate determined by separately prepared calibration samples[20]. A
single ML of GaAs to either side of the MnAs layers is left undoped to minimize the diffusion of dopants into the MnAs
layer.
For the magnetic layers, there is first a 30 s As soak to eliminate any free Ga on the surface, then the following sequence:
0.5 ML Ga/ 2.5 s wait/ ~0.5 ML As/ 5 s wait/ 0.5 ML MnAs/ 5 s wait, where “MnAs” indicates traditional MBE growth
(i.e. both Mn and As shutters open concurrently). The Mn rate is determined by RHEED oscillations on a separate
calibration sample. In samples without an As soak, or when the Ga and Mn are either co-deposited or deposited
sequentially with no As deposition in between, there is a significant degradation in both the RHEED pattern and the
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magnetic properties. For all growths discussed here the RHEED showed no indication of 3-dimensional growth or phase
segregation and was streaky 3x1 during GaAs growth and streaky 2x1 during and immediately after MnAs growth. In
order to achieve the high degree of stability and accuracy required for these growths at temperatures well below the
working range of commercially available pyrometers we employ in situ band-edge thermometry, giving a typical
substrate temperature stability of ± 2.5º C at 230º C.
The fully optimized structure for the magnetic HBTs studied here is therefore: 200 nm GaAs/ 40 nm Si:GaAs (n =
1×1019 cm-3)/ 25 nm GaAs/ 3 nm Be:GaAs (p = 3×1019 cm-3) grown at 580º C via co-deposition, 5 nm Be:GaAs (p =
3×1019 cm-3)/ 50 nm Be:(20,0.5)9 (p = 3×1019 cm-3)/ 5 nm Be:GaAs (p = 3×1019 cm-3)/ 20 nm GaAs/ 120 nm
Si:Al0.3Ga0.7As (n = 1×1019 cm-3)/ 30 nm linear grade to Si:GaAs (n = 1×1019 cm-3)/ 50 nm SiGaAs (n = 1×1019 cm-3)
grown at 230º C via ALE. The doping levels are somewhat higher than is typically used for an HBT structure, but are
necessary to overcome residual As antisite doping in the base and emitter layers. The doping levels are determined from
separate calibration samples, and yield mobilities of = 291 cm2/Vs and = 17 cm2/Vs for n-type and p-type doping,
respectively.
3. MAGNETIC PROPERTIES
Figure 2 shows the zero field cooled temperature dependence of the magnetization for a representative sample
with p = 1×1020 cm-3 in the base (magnetic) layer as measured along [100]. As previously reported[20], the Be doping
suppresses TC (~ 20 K) but does not compromise the magnetic functionality. The temperature dependence is still meanfield like, is ~ 0.3 for all doping levels and shows no systematic variation. The magnetic field dependence can be seen
in the inset, revealing sharp switching and clear hysteretic behavior with a coercivity of 150 G. While the demonstration
of full spin-based functionality is beyond the scope of this work, these results are consistent with the data reported in
Ref. [20] and demonstrate the successful integration of magnetic functionality into an electrically active device.
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20
30
40
50
60
70
80
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Figure 2. Magnetic characteristics of a representative Be-doped (Ga,Mn)As base layer. Main Panel: Zero-field cooled
temperature dependence of the magnetization indicating a TC of 20 K. The black arrow indicates the temperature at which
the hysteresis loop (inset) is measured. Inset: Hysterisis of the same sample indicating sharp switching between well-defined
magnetization states and low-field saturation.
4. DEVICE FABRICATION AND ELECTRONIC CHARACTERIZATION
The heterostructures described in section 3 are processed into a multi-tiered mesa structure via photolithography and
calibrated reactive ion-etching. As this etch process can potentially result in residual surface damage, the Ohmic nature
of the contacts is immediately verified for each device layer (emitter, base and collector) via two terminal resistance
measurements between redundant contacts. The result is a nearly linear current-voltage (IV) characteristic with typical
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resistance of ~300 . From these results, it is apparent that the relatively high doping level necessitated by the excess As
incorporation has the added benefit of passivating any residual surface damage due to the fabrication process.
The next step in the electronic characterization is to contact both base-emitter (BE) and base-collector (BC) diodes
independently to evaluate their individual diode characteristics. Representative IV curves for such a measurement can be
found in Fig. 3(a). First, it is evident that the transition from high temperature (580º C) to low temperature (230º C)
growth in the BC diode does not result in a significant degradation of the diode characteristic. The device is strongly
rectifying and has an ideality factor, , of 4.1 (consistent with the high doping levels in the n- and p-regions). In contrast,
the BE diode shows little rectification and no linear region on a semilog plot from which an effective can be extracted.
Independent doping calibrations verify the efficacy of the n-doping in the low-temperature ALE growth mode[20], so the
lack of rectification is likely due to some leakage pathway in the BE diode. For example, it is possible that residual As
impurities form deep trap states in the intrinsic region of the BE diode that act to significantly enhance tunneling in the
reverse-bias configuration[21]. While this does limit the figure of merit achievable for the devices presented here, since
the BE diode is operated under forward bias for device operation it does not prevent a proof of principle demonstration
of transistor functionality.
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Figure 3. (a) Diode characteristics for base-emitter (BE) and base-collector (BC) diodes in a representative spin-HBT
structure. While the BC diode is strongly rectifying with an ideality, , of 4.1 the BE diode is quite leaky (see text). (b)
Gummel plot of the base and collector current (Ib and Ic, respectively) during transistor operation. Unity gain is achieved for
a base-emitter bias of roughly 1.25 V.
Finally, the transistor devices are wired in the standard Gummel configuration and the current gain (ratio of the base
current, IB, to the collector current, IC) is monitored as a function of base-emitter voltage. Representative data can be
found in Fig. 3(b). While this response is far from an optimized III-As HBT, it is important to note the transition from
IB/IC, for this device is roughly 10 at VBE = 2.50 V). This
loss to gain at roughly VBE = 1.25 V (the maximum gain,
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report marks the first time gain larger than one has been reported for a magnetically active semiconductor
heterostructure.
5. CONCLUSIONS
In summary, we report here the first demonstration of transistor functionality in a magnetically active semiconductor
heterostructure. While the figures of merit for the constituent diodes and the full transistor device are well below the
current state of the art for high-temperature grown heterostructures, they mark a critical step in the development of a
fully spin-functional electronic architecture. For example, it is worth noting that little effort was made in this initial study
to optimize device geometry, and when combined with other recent advances in growth control of excess As
incorporation[22] it is likely that these figures of merit can be improved significantly in the near term.
The authors would like to acknowledge the assistance of S. Mack in collecting and analyzing data. This work was
partially supported by NSF-MRSEC DMR-0820414, NSF DMR-0071888, DAPRA/ONR N00014-99-1-1096, AFOSR
F49620-02-10036 and ARO DAAD19-01-1-0541.
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