Understanding and designing wideband
output networks for high speed D/A
converters.
By Jarrett Liner, RF Systems Application Engineer, I&I Segment, Mil/Aero Group, Analog
Devices - March 19, 2014
Today the demand for new IC components and technology continues to grow at alarming rates. The
commercial and defense industry are leaders in this charge. Most new specifications dispatched to
the semiconductor industry today revolve around reduced size, weight and power or SWaP. Here in
the semiconductor industry we meet those requirements by ever improving technology and clever
designs. However, performance is still a key demand as well, especially for Digital to Analog
Converters (DAC) technology in the GSPS space. To keep this pace, the analog output matching
network is often overlooked as a key element.
In order to provide more clarity, high frequency is considered to be over 1 GHz, high speed is
considered to be over 1GSPS; most importantly the end user may incorporate an amplifier after the
DAC therefore useable signals are less reliant on signal level, and more on noise and fidelity. In this
paper, the matching component and their interconnectivity will be discussed. Particular attention
will be given to the key specifications to consider when selecting a transformer or balun along with
connection configuration techniques. Finally, ideas and optimization techniques will be provided to
show how to achieve a wideband smooth impedance transformation for DACs operating in the GHz
region.
Setting the stage
DACs have wide range of uses; some of the most obvious uses include complex waveform generation
at high frequency for commercial and military communications, wireless infrastructure, Automatic
Test Equipment (ATE), and RADAR and military jamming electronics. Once the system architect has
found the right DAC, the output matching network must be considered to preserve the signal
constructed. The component selection and topology become even more important as the GSPS DACs
applications require operation in the super-Nyquist, where the desired spectral information is in the
2nd, 3rd or 4th Nyquist zone.
Intellectual Prerequisites
First let us consider the role of the DAC and its position in the signal chain. A DAC functions much
like a signal generator. It can provide single tone to complex waveforms at a range of center
frequencies (Fc). Historically the Fc max is in the first Nyquist zone, or half the sample frequency.
Newer DAC designs have internal clock doublers to effectively double the first Nyquist zone; we can
refer to this action as ‘mixed-mode’ operation. The natural output frequency response curve of a
DAC using mixed-mode takes on the shape of a sinX/e^(X^2) curve, see Figure 1.
System architects can consult the product datasheet to understand component performance. Often
performance parameters such as power level and Spurious Free Dynamic Range (SFDR) will be
listed at various frequencies. The clever system designer can extend the use of the same DAC into
the super-Nyquist zones mentioned earlier. It’s noteworthy to mention the expected output level will
be significantly lower at higher frequencies (zones), for which many signal chains might include the
additional gain block or driver amplifier after the DAC to compensate for this loss.
Figure 1: DAC Sinx/x Output Frequency Response vs. Mix Mode
Component Considerations, i.e.-Choosing the Output Balun
Component Considerations, i.e.-Choosing the Output Balun
The best performing GSPS DAC is only as good as the end user designs and measures it. To shine
the best light on a good DAC, only the best components should be selected to support the
performance. Key circuit decisions have to be made at the beginning. Does the datasheet
performance of the DAC provide enough output power? Will an active device be needed? Does the
signal chain need to transfer from the DACs differential output to a single ended environment? Will
there be a transformer or balun? What is the proper impedance ratio for a balun? For this paper the
use of a balun or transformer will be the focus here.
When choosing a balun phase and amplitude imbalance should be carefully considered when
selecting a balun 1. Impedance ratio (I.e.-voltage gain), bandwidth and insertion loss, and return loss
are other important performance considerations. Designing with baluns is not always
straightforward. For example, balun characteristics change over frequency, thus complicating the
expectation. Some baluns are sensitive to grounding, layout and center tap coupling.
The system designer should never assume full datasheet performance of the balun to be the sole
basis on which to choose it. Experience can play a huge role here as the balun takes on a new form
when pcb parasitics, external matching networks; the converter’s internal impedance (load) also
become part of the equation.
There are many important characteristics of choosing a balun and are not the basis of this paper.
However, for more information on this and how to choose the right transformer or balun see
following references 1 and 2.
For achieving the widest bandwidth, Anaren, Hyperlabs, Marki Microwave, MiniCircuits and
Picosecond are some of the best solutions on the market today. These have patented designs that
use special topologies allowing for extended bandwidth in the gigahertz region providing a high
level of balance which only employs a single device to do the job.
One final note on when using a single balun or multiple balun topology, layout plays an equally
important role in phase imbalance as well. Keeping performance optimized at higher frequencies
means, keeping the layout as symmetric as possible. Otherwise, slight mis-matches in traces on the
frontend designs that uses a balun can be proven useless and even order dynamic range limiting.
Output Match
Frequency dependent components will always limit bandwidth, i.e. - shunt capacitors and series
inductors. That said, it may be more useful to consider the term optimization rather than match.
Ultra-wide bandwidths of today’s baluns would be nearly impossible to ‘match’ across a multi-octave
spectrum. Optimization of the above mention parameters requires an in-depth understanding of the
system end use. For example, does the circuitry need to provide the maximum transfer of power
with less concern given to SFDR? Or is the highest linearity design needed with high emphasis on
SNR and SFDR and less focus on output drive strength from the DAC? This means each parameter
should have a particular weight of importance per the application.
Here in this example, the output network for the AD9129 GSPS DAC is shown, see Figure 2. Each
resistor and the balun in the network was varied, however as each of the resistor values are varied
the performance parameters will change as shown in Table 1.
Figure 2: AD9129 DAC Output Frontend Block Diagram
Table 1: Case data definition
Very little difference in optimization component values
The reader should note there is very little difference in the optimization component values. The most
significant variant is the balun component. The data below in figure 3 reveals the optimization in the
broadband noise output mode of the DAC, in this mode; the DAC simply generates tones in the full
available spectral bandwidth.
The original case shows reduced available power in the first Nyquist zone and great potential for
alias tones in the 2nd, 3rd and 4th Nyquist zones. Case 2 show increased output levels in the first and
second Nyquist zones and less power available in the upper Nyquist regions. Finally, optimization
case 3 appears to have good output power available in the first and second Nyquist zones while
keeping the available power in zones 3 and 4 to a minimum as compared to case 1.
Figure 3: DAC performance in broadband noise mode
Figures 4 and 5 show the data recorded when the DAC is single tone mode. Figure 5 shows the
output power level at various frequencies across multiple Nyquist zones. Figure 4 shows the SFDR
of the various cases versus the DAC output frequency. The reader should develop a better
understanding of the trade-offs or weighted parameter planning that needs to be understood and
optimized at the onset of the design process. It should be clear that Case 1 can be improved upon by
replacing it with a wider band balun solution, Case 2.
Yielding increased power levels in the 2nd Nyquist zone and improved SFDR. Additionally, when the
1:2 wideband balun is implemented, Case 3, the improved power levels are maintained, while further
improving the SFDR of the system. Other noteworthy findings are the existence of an SFDR ‘sweetspots’ near 1900MHz. This performance is independent to the output components and is due to the
internal impedance of the DAC.
Figure 4: SFDR performance comparison
Figure 5: Output power level comparison
Conclusion
The recent development of GSPS DACs allow designer to skip multiple mixing stages in the transmit
signal chain and proceed directly to the desired RF bands. When using a GSPS DAC, careful
consideration must be given the output network. It is not easy to cover all the specifics when
designing a high speed, high resolution converter layout. When transforming from the differential
environment of the DAC output to the single ended RF output, special attention should be given to
the balun selection.
Additionally, designing the output network of a GSPS DAC attention should be given to the layout
and topology of the network; trace widths and lengths are very important parameters to optimize.
Remember, there are many parameters that need to be met in order to satisfy “match” for your
particular application.
References
1 Designing Wideband Frontends for GSPS Converters
2 Transformer-Coupled Front-End for Wideband A/D Converters – Analog Dialogue, April 2005
3 Designing an ADC Transformer-Coupled Front End- AN-935
4 Driving a Center-Tapped Transformer with a Balanced Current-Output DAC- AN-912
3) 5 Kester, Walt. 2004. Analog-Digital Conversion: Seminar Series, Analog Devices, ISBN 0916550-27-3. (Also available as The Data Conversion Handbook, 2005, Elsevier/Newnes, ISBN 07506-7841-0)
4) 6 Optimizing Data Converter Interfaces – Training and Tutorial.2006
5)
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