From Fundamental Detector
Research to Industrial
Embedded Power Device
Technology Development
Joint Instrumentation Seminar
DESY, Hamburg University and XFEL
Colloquium in honor of Prof. Gunnar
Lindström's 80th birthday
Dr. Henning Feick
Senior Staff Engineer
Device Development (ESD & Latch-up Expert)
Infineon Technologies Dresden GmbH
June 10th, 2011
Abstract
n Following the "More than Moore" paradigm, restructuring of parts of the semiconductor
industry is currently taking place: Added value generation is being sought in the chip-level
integration of devices offering unique functionality with dense CMOS logic, as opposed to the
former shrink approach towards ever smaller structure sizes (Moore's Law).
n An example is presented in the area of embedded power devices that are capable of
handling voltages up to several times 10 Volts in a 1.5 Volt core voltage analog/mixed-signal
logic platform. Key aspects to be considered in the technology development are device
performance factors like specific on-resistance, robustness (e.g. safe operating area and
electrostatic discharge), reliability, latch-up, and substrate noise effects. Results from TCAD
process and device simulation, device characterization, and statistical data analysis are
presented.
n The speaker gives account of the knowledge and qualifications acquired during his diploma
and PhD time in Prof. Gunnar Lindström's group on "Detector Research & Development"
(formerly "Gruppe Nukleare Meßtechnik") whenever useful reference to his current field of
work can be made. An industry perspective is thus provided on the value of fundamental
research and the qualifications required for a successful career in the semiconductor
industry.
Copyright © Infineon Technologies 2011. All rights reserved.
Page 2
Contents
n Infineon: The Company
n Embedded-Power Device Development at Infineon Dresden
n Anecdotal References to “Good Old Times” at Nukleare
Meßtechnik
Copyright © Infineon Technologies 2011. All rights reserved.
Page 3
Source: Infineon company presentation
Source: Infineon company presentation
May 3rd, 2011, www.infineon.com
May 3rd, 2011, www.infineon.com Page 4
Copyright © Infineon Technologies 2011. All rights reserved.
Source: Infineon company presentation
Source: Infineon company presentation
May 3rd, 2011, www.infineon.com
May 3rd, 2011, www.infineon.com Page 5
Copyright © Infineon Technologies 2011. All rights reserved.
Source: Infineon company presentation
Source: Infineon company presentation
May 3rd, 2011, www.infineon.com
May 3rd, 2011, www.infineon.com Page 6
Copyright © Infineon Technologies 2011. All rights reserved.
Source: Infineon company presentation
Source: Infineon company presentation
May 3rd, 2011, www.infineon.com
May 3rd, 2011, www.infineon.com Page 7
Copyright © Infineon Technologies 2011. All rights reserved.
Infineon Technologies Dresden (IFD)
12/93
Siemens AG decided to build a first-class semiconductor fab
in Dresden
10/95
Production start 200mm fab
02/98
Joint Venture with Motorola for first 300mm pilot-line
worldwide
04/99
Carve-out of Semiconductor division from Siemens
=> Foundation of Infineon AG:
Siemens Microelectronics Center Dresden becomes
Infineon Technologies Dresden
05/00
Laying of the cornerstone for first 300mm fab worldwide
05/05
Opening of Infineon Research and Development Center (RDC)
Opening of Center Nanoelectronic Technologies (CNT),
Public Private Partnership (PPP) between
FraunhoferGesellschaft, AMD and Infineon
05/06
Infineon carved-out its Memory Products Business
=> Foundation of Qimonda
03/08
Infineon Dresden becomes an entire Logic site
Source:
Infineon Dresden site presentation Page
2010
Copyright © Infineon Technologies 2011. All
rights reserved.
8
Source:
Infineon Dresden site presentation 2010
Front-End Production at Infineon Dresden
State-of-the-artsemiconductor
semiconductorprocessing
processing
State-of-the-art
linefor
forlarge-scale
large-scaleintegration
integrationof
ofelectronic
electronic
line
circuitson
on200
200mm
mmsilicon
siliconwafers
wafers
circuits
0.25µm
µmto
to90
90nm
nmtechnology
technologynodes
nodes
0.25
Aluminumand
andcopper
coppermetallization
metallization
Aluminum
Researchand
anddevelopment
developmentsite
site
Research
Picture
source:
www.infineon.com media for journalists
Copyright © Infineon Technologies
2011.source:
All
rights reserved.
Page 9
Picture
www.infineon.com media for journalists
Production Complexity
Several hundred process steps for each wafer
FURNACE
IMPLANT
DD
ETCH
PVD / MCVD
IN/OUT
TEST
CMP
WET
METROLOGY
LITHO
CVD
Example: Pilot-Line featuring all necessary tools and processes for a product cycle
Infineon
Copyright © Infineon Technologies 2011. All Source:
rights reserved.
Dresden site presentation 2010
10
Source: Infineon Dresden site presentation Page
2010
„More than Moore“
Memory: Shrinking
Moore‘s Law
Logic: broad technology and product portfolio
More than Moore
0,25/0,24 µm
CMOS
BiCMOS
0,20/0,22 µm
eFlash
170 nm
140/130 nm
CMOS
EmbeddedPower:
Power:
Embedded
Monolithicintegration
integration
Monolithic
ofhigh-density
high-densitysignal
signal
of
processingblocks
blocks
processing
withhigh-voltage
high-voltage
with
and/orpower
power
and/or
handlingcapability
capability
handling
RFCMOS
Power
110 nm
90 nm
CMOS
eFlash
Source:
Infineon Dresden site presentation 2010
Copyright © Infineon Technologies 2011. All
rights reserved.
11
Source:
Infineon Dresden site presentation Page
2010
Value Proposition for Embedded Power @ IFD
a): Gate Density
o Address the industry trend towards higher on-chip
functionality as a key differentiator in the IC market
o Re-use of intellectual-property (IP) blocks for reduced
time-to-market
o Area shrink (e.g. by realizing analog functions in the
digital domain)
Digital switchedcapacitor based
replacement of an
analog control circuit
Ralf Rudolf et al.,
„Automotive 130 nm
Smart-Power-Technology
including embedded Flash
Functionality“, proceedings
of the ISPSD2011
Copyright © Infineon Technologies 2011. All rights reserved.
Page 12
Value Proposition for Embedded Power @ IFD
b): Deep-Submicron Process Line
o Feature size, process tolerances
o Yield stability / defect density control
o All-copper metalization for optimum thermal management
BEOL stack cross section
Ralf Rudolf et al., „Automotive
130 nm Smart-PowerTechnology including embedded
Flash Functionality“, proceedings
of the ISPSD2011
Copyright © Infineon Technologies 2011. All rights reserved.
Page 13
Fields of Application for Embedded-Power
Technologies
Example: Regulated-voltage generation using
buck converter and/or synchronous rectification (SR)
Control
HS
driver
Control
Power
FET
IC
LS
driver
Sync
Power
FET
Partitioning A
Partitioning B
Partitioning C
Depending on cost factors, performance factors, and target
market requirements, the choice of the appropriate system
partitioning decides on the competitiveness of the product.
Copyright © Infineon Technologies 2011. All rights reserved.
C. Dahl, 20.Oct. 2010
Page 14
IFD Research and Development Activities
for Embedded-Power Technologies
n TCAD (Technology Computer Aided Design)
o detailed representation of the IFD process flows with in-
depth unit-process background information
o delivering reliable pre-silicon electrical device characteristics
n Highly automated testchip layout and characterization
n Shared reticle program, dual/quad multi-level reticle mask
options
n Efficient unit process development
n Competitive flow-factor for development lots
n Various lab characterization capabilities including high-power
SMUs and TLP/SOA set-up
Copyright © Infineon Technologies 2011. All rights reserved.
Page 15
Process Blocks and Features of C11HV
C11HV process module
p-type substrate
shallow trench isolation
HV isolation
HV devices
logic wells
gate stack (oxide and poly)
extension/halo implants
spacer
source/drain implants
silicide formation
4 levels Cu metallization
top metal and passivation
Overview High Voltage Devices
- 12V HVNMOS/PMOS Power Transistors for HighCurrent Applications, Rdson 4 mOhm*mm²
- 24V HVNMOS/PMOS Power Transistors for Gate
Driver Applications
- 24V HVNMOS/PMOS w separate Body for analog
and level shifter applications. HVNMOS fully
isolated
- 20V pnp Transistor
- HV ESD concept based on self protecting power
devices, Diodes and active clamps
- passive Elements (Poly Resistors and Metal
Capacitors)
- Well Isolation for floating Low Voltage circuitry
Determining the recipes for the newly introduced
process modules is the main deliverable of the
technology development group!
Copyright © Infineon Technologies 2011. All rights reserved.
Page 16
Lateral High-Voltage (HV) Device Concepts
24V Drain-Extended MOSFET
Source
MOSFET
channel
Drain
Gate
Body
n-type Silicon
STI
p-type Silicon
Extended drain
Deep body
A 2.5 V gate-oxide from the
base process is used for the
channel region (5.2 nm).
Buried layer, connected to drain
Therefore, the high drain
potential (24V) must be well
shielded from the gate!
Copyright © Infineon Technologies 2011. All rights reserved.
Page 17
Basic HV Device Operating Conditions
On-State
Source
0V
Drain
Gate
2.5V
0.2V
The on-state resistance is
determined by the doping in
the drain extension.
-> minimizing the on-state
switching resistance requires
maximum doping in the drain
extension.
R
0.2V
Copyright © Infineon Technologies 2011. All rights reserved.
Page 18
Basic HV Device Operating Conditions
Off-State
Source
Drain
Gate
0V
0V
-
+
28V
-
However, high doping in the
drain extension limits the
breakdown voltage!
Mirror space-charge principles
are used to reduce the electric
field strength in the drain
extension region.
If charge matching is
optimized the horizontal drain
/ body region mimics a p-i-n
diode, allowing minimum
lateral extent of the structure.
+
28V
Copyright © Infineon Technologies 2011. All rights reserved.
Page 19
Drain-Extended MOSFET
On-Resistance Benchmark
C11HV
24V
C11HV
12V
Very good
good Ron*A
Ron*A performance
performance is
is
Very
achieved in
in C11HV.
C11HV. However,
However, in
in
achieved
reality the
the device
device optimization
optimization is
is
reality
mainly concerned
concerned with
with device
device
mainly
robustness aspects
aspects and/or
and/or safesaferobustness
operating area
area (SOA).
(SOA).
operating
Source: T.R Efland „Trends in Power Devices“,
Source: T.R Efland „Trends in Power Devices“,
presented at Dongbu Tech Day 10 2009
© Infineon Technologies 2011. All rights reserved.
presented at Dongbu Tech DayCopyright
10 2009
Page 20
Basic HV Device Operating Conditions
Hot-switching State
V *I
ds
Source
0V
Drain
Gate
3.6V
28V
jh
ds
≈ kW/mm²
This switching state should be
kept as short as possible since
a lot of power is dissipated
-> poor energy efficiency
-> thermal failure
High electric fields in the drift
region lead to impact-ionization
(II) carrier multiplication
-> hole currents are biasing
the inherent npn
-> hot-carrier effects, device
parameter drift / reliability
je
jh
28V
Safe operating areas (SOA) for
Vds and Ids can be defined
based on
-> thermal failure
-> electrical npn triggering
-> reliability
Copyright © Infineon Technologies 2011. All rights reserved.
Page 21
Lattice Temperature after 100 ns
(Thermal SOA, medium switching times)
Source
Drain
Gate
Thermal
failure is
imminent
Electro-thermal TCAD
simulations are quite
helpful for optimizing
the device robustness.
The metallization plays a
vital role in heat
conduction away from
the active device region.
Copyright © Infineon Technologies 2011. All rights reserved.
Page 22
Transmission-Line Pulse Characterization
(Electrical SOA, short switching times)
↓ Vgs
1.4
30119_12\Nx12s1w50\SOA_100_10_0v0_b
30119_12\Nx12s1w50\SOA_100_10_1v5_b
30119_12\Nx12s1w50\SOA_100_10_2v5_b
30119_12\Nx12s1w50\SOA_100_10_3v3_b
30119_12\Nx12s1w50\SOA_100_10_5v0_b
TLP Current (A)
1.2
1
1st silicon
Transmission-line pulsing (TLP) is
typically a 100-ns square-wave
pulsed IV characterization. This is a
good indication of device behavior
under ESD stress.
ESD qualification must be withstood
at any pin of the IC (e.g. humanbody model: 100 pF charged to 2 kV
discharge through 1.5 kOhm).
0.8
0.6
The failure is due to electrical
triggering of the parasitic npn.
0.4
0.2
0
0
10
20
30
TLP Voltage (V)
40
Maximizing the failure current is an
optimization target for output
drivers.
Copyright © Infineon Technologies 2011. All rights reserved.
Page 23
1st silicon, ZA030119#06
Ron Drift
(Reliability SOA, life-integrated switch time)
Rondrift
driftisisone
oneof
ofthe
themost
most
Ron
difficultproblems
problemsto
tohandle
handlein
in
difficult
thistype
typeof
ofdevice.
device.Values
Valuesless
less
this
than10%
10%at
atfull
fulllifetime
lifetimeare
are
than
targeted.
targeted.
80%
70%
(Ron - Ron(0)) / Ron(0)
60%
50%
40%
Device layout
improvement
30%
20%
10%
0%
0.1
1
10
100
1000
10000
100000
time [s]
Copyright © Infineon Technologies 2011. All rights reserved.
Page 24
Lessons Learnt at “Nukleare Meßtechnik”
Lifetime Projections, Customer Orientation
7m beam, 0oC
30
no beam, 0oC
500
o
1m no beam, 20 C
Vdep
400
300
I [ µA ]
Vdep [ V ] d = 300 µm
Results for the Strip Layer at Radius 30 cm
Φeq = 1.7×1013 cm-2 per year at full luminosity.
I
20
Year 10
200
10
100
0
0
2
4
6
8
LHC Operational Year
Source: H. Feick, PhD thesis
Source: H. Feick, PhD thesis
0
10
Our efforts to predict the
operating lifetime of silicon
detectors in the LHC
experiments clearly
addressed the customer’s
need for a solid decision
basis in planning the
overall experiment.
Such type of customer
orientation is also
paramount for business
success in the
semiconductor industry.
Copyright © Infineon Technologies 2011. All rights reserved.
Page 25
Lessons Learnt from Gunnar: Part 1
Large Statistics Improve Prediction Quality
If only
only we
we had
had better
better
If
statistics -statistics
Those guys
guys from
from industry
industry
Those
must have
have incredibly
incredibly large
large
must
databases containing
containing all
all
databases
the knowledge
knowledge we
we seek…
seek…
the
This is how we tried to maximize our statistical
database at „Nukleare Meßtechnik“ around 1997
Copyright © Infineon Technologies 2011. All rights reserved.
Page 26
Statistical Modeling and Optimization
of the C11HV 24V Device
Predicted Response Graph
0.8
5
0.6
1.5
0.4
Vbd
Isat,lo
0.433804
4
Geometry
variations
and
Geometry
variations
and
1.8
1 2.06
process variations
variations of
of the
the
process
device electrical
electrical parameters
parameters
device
are analyzed
analyzed simultaneously
simultaneously
are
using multivariable
multivariable regression
regression
using
(DoF ≈≈ 100000)
100000)
(DoF
->
->
Vth,lin
Very rapid
rapid device
device optimization
optimization
Very
Vth,sat
Ron drift
Ilin
Isat,hi
0.5 1 1.5
d_DD
4.5 5 5.5
DD2 Dose
0.5 0.6
N_a
1.5 2
N_dext
0.5 1
N_l
0 0.2 0.6 4.2 4.6
1.2 1.6 0.6 0.8
2 3 4 5
N_s_BF_P NE1 Dose NE2 Dose NE3 Dose VN3 Dose
It is true, we can generate and analyze tremendous amounts of
data. Still, I am not aware of information in our databases explaining
the mysterious type inversion and annealing effects in Silicon
Copyright © Infineon Technologies 2011. All rights reserved.
Page 27
detectors.
C11HV Device Layout View
A lot of space is needed for
isolating high voltages.
An area-saving technology
requires careful optimization of
the edge termination. This is
often more difficult than the
actual core device development.
Coredevice
devicecross
cross
Core
sectionconsidered
consideredin
in
section
theTCAD
TCADsimulations
simulations
the
shownso
sofar.
far.
shown
Copyright © Infineon Technologies 2011. All rights reserved.
Page 28
Lessons Learnt at “Nukleare Meßtechnik”
Edge Effects in Silicon Detectors
101
100
Zone
Merging
102
10-2
Diffusion
Current
101 -2
10
10-1
100
I [ µA ]
C [ pF ]
G [ µS ]
PunchThrough
Guard Ring
Floating | Grounded
CV
IV
GV
10-1
Full
Depletion
10-1
Volume
Current
10-2
100
101
102
V [ Volts ]
Source: H. Feick, PhD thesis
Source: H. Feick, PhD thesis
Copyright © Infineon Technologies 2011. All rights reserved.
Although problems
relating to diodes are
rarely regarded as
sufficiently appealing
for a publication,
mastering edge
terminations and
bipolar effects is
considered a high art.
And Silicon detectors
were my first steps in
this direction.
Page 29
Lessons Learnt from Gunnar: Part 2
Goal Orientation and Risk Awareness
Conductive
silver glue
Copper
wire
Detector
Al2O3
Gold
metallizations
Let‘s just
just copy
copy the
the
Let‘s
BNL sample
sample
BNL
holder –
– it
it does
does aa
holder
perfectly good
good job
job
perfectly
for them!
them!
for
Solder
a) Reaching a goal is often much easier by copying a
working solution from somebody else – this is very
much true for the semiconductor industry.
b) Even barely noticeable details can endanger the
entire project: Gunnar went to long ends to determine
that the center line resistance to the backplane
contact would be too high for high-frequency
capacitance measurements. The layout was thus
adjusted, the investment secured J.
There might be a little bit of over-engineering at work
here, which is not so commonplace anymore, though.
Copyright © Infineon Technologies 2011. All rights reserved.
Page 30
Latch-up Risks in HV Technologies
p-Well
n-Well
p-Isolation
n sinker
p-Isolation
n buried-layer
Substrate
Isub (majority carriers)
Irev
(minority carriers)
Powerswitching
switchingcan
canintroduce
introducesignificant
significantsubstrate
substratenoise,
noise,especially
especiallyifif
Power
inductiveloads
loadsare
aredriven
driven
inductive
->reverse
reversecurrent
currentwhen
whenminority
minoritycarriers
carriersare
areinjected
injected(n-type
(n-typeregion
region
->
dropsbelow
belowsubstrate
substrateground
groundpotential)
potential)
drops
->substrate
substratecurrents
currentswhen
whenforward-biased
forward-biasedp-n
p-njunction
junctioninjects
injectsmajority
majority
->
carriersinto
intothe
thesubstrate
substratecausing
causingsubstrate
substratepotential
potentialvariations
variations
carriers
High-voltageisolation
isolationrequires
requiresmany
manyparasitic
parasiticbipolar
bipolarpaths
pathsto
tobe
be
High-voltage
minimizedsince
sincethey
theycould
couldpotentially
potentiallylead
leadto
tolatch-up
latch-upproblems.
problems.
minimized
Copyright © Infineon Technologies 2011. All rights reserved.
Page 31
Lessons Learnt from Gunnar: Part 3
Soft Skills: Dealing With Personnel
Well, well,
well, there
there will
will
Well,
be aa lot
lot of
of neutron
neutron
be
scattering from
from this
this
scattering
sample holder…
holder… But
But
sample
have it
it your
your way,
way, for
for
have
heaven’s sake.
sake.
heaven’s
Yes, true, the neutron dose was probably
a little off. But then, the radiation meter
wouldn’t show anywhere nearly as crazy
numbers as for the old Aluminum sample
holder, with all its bolts and nuts.
In order to avoid mutiny, it is always a
good idea to listen and react to the
wishes of your personnel – this is very
much true for a company with many
levels of hierarchy.
Copyright © Infineon Technologies 2011. All rights reserved.
Page 32
Lessons Learnt from
Gunnar: Part 4
Leadership
Forming coalitions, joining
forces, motivating people, and
taking the leading role is key to
a successful career.
And Gunnar has always been a
true master at this.
Copyright © Infineon Technologies 2011. All rights reserved.
Page 33
Copyright © Infineon Technologies 2011. All rights reserved.
Page 34