Proposal for IEC 62700 Identification
and Communication Method for
Notebook Computer supporting Class
1-3 ID
Wolfgang Furtner, Infineon Technologies AG
Version 2014-04-02, DKE/K724
Overview
 IEC62700 Requirements
 Low Cost Adapter Identification
 Smart Adapter Identification
 Communication Protocol
 References
Set date
Copyright © Infineon Technologies 2011. All rights reserved.
Page 2
IEC62700 – Communication Protocol
related Questions
 Is ID PIN communication mandatory for functionality?
 When should it be acceptable for a computer to reject certain models of AC
adapter?
 What communications standard to use?
 What should the system do in the event of a failure of the communications?
 Can a scalable system of both low cost analog and higher function
digital approaches be devised?
 Should communication be bidirectional, or support networking of multiple
devices?
 What is the minimum information that shall be provided by the AC
adapter?
 What obligations does the Notebook Computer have to the AC adapter?
 What mechanism will allow for OEM specific innovation? To gain acceptance
the Technical Specification should not exclude innovative or proprietary
solutions from manufacturers.
 What roadmap can be provided for future innovation in communication
method, or what process can be used for standardizing new data?
2013-05-24
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Page 3
Identification for Low Cost Adapter
AC Adapter
Cable
Notebook Computer
Charger, Power
Management
19V
AC
ACDC
Converter
ID
RID
IMEAS
VID
GND
Identification
Resistor
2013-05-24
Copyright © Infineon Technologies AG 2013. All rights reserved.
Measurement
Circuit
Page 4
Identification for „Smart Adapter“
AC Adapter
VDC
AC
ACDC
Converter
Cable
Notebook Computer
GND
Charger, Power
Management
Controll
RX
TX
ID
RID
IMEAS
Digital
Interface
Digital
Interface
2013-05-24
RX
TX
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Page 5
Adapter Identification
RID
Adapter Type
Value
>750 KΩ
No Adapter present
330 KΩ ±30%
Smart Adapter
 Digital Identification
180 KΩ ±5%
Power Class 0
120 KΩ ±5%
Power Class 1
82 KΩ ±5%
Low Cost
Adapter
Power Class 2
56 KΩ ±5%
Power Class 3
39 KΩ ±5%
Power Class 4
Resistor values chosen from IEC60063 E12 series
2013-05-24
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Page 6
Bidirectional Communication
3.3V
Cable
VDC
V
VDC
V
ID
t
ID
GND
t
GND
3.3V
Cable
V
VDC
VDC
V
t
ID
GND
2013-05-24
ID
GND
Copyright © Infineon Technologies AG 2013. All rights reserved.
t
Page 7
Infineon Single Wire Interface (SWI)
Time Distance Coding
>= 5tSWI
tSWI
3tSWI
0
1
Stop
2tSWI
4tSWI
2013-05-24
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Page 8
SWI Data Word
Data Word
17 Bit total
Stop
0
MSB
1 00
Training
2 Bit
1
0 000
1 00
1
Payload =
10 Bit Data
+ 4 Bit Parity
LSB
00 1 0
Stop
Inversion
1 Bit
Time
MSB = Most Significant Bit
LSB = Least Significant Bit
2013-05-24
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Page 9
Practical Performance Demo
3.3V
Cable l=1.6m
47k
VDC
ID
TX
RX
GND
VPU = 3.3V
tSWI = 10µs
50KBit/s peak
RPU=47k
1.60m cable
2013-05-24
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Page 10
Merits of Infineon Single Wire Interface
Smart Adapter
Cable
Notebook Computer
ACDC
Comm.
AC
No accuract
time base
required
<2KGate
Transceiver
2013-05-24
ID
Comm.
In Band
Interrupt
No External
Components
No Software
Stack needed
Charger,
Power
Manage
ment
Software Protocol
Engine + GPIO
possible
Robust
Communication
over ONE wire,
GND referenced
Copyright © Infineon Technologies AG 2013. All rights reserved.
Page 11
“Smart” Functions
 Identification of Adapter
Vendor, Product Number, Serial Number, …
 Query Adapter Capabilities
Power Class, Output Voltages, Current Supply
Capabilities, …
 Cryptographic Authentication of Adapter
 Adapter Output Voltage and Current Control
 Telemetry of Adapter Parameters
Temperature (Know thermal shut-down in advance),
AC Voltage, Output Voltage, Output Current,
Instantaneous Power
2013-05-24
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Page 12
SWI used in MIPI ® Battery Interface
 Digital Battery Interface for
mobile phones/terminals

Efficiently charging modern
batteries

Authentication

Sensors inside battery
Comm
IC
 Infineon Single Wire Interface
used as Link Layer
 Final BIF standard V1.0 released
by MIPI board Feb. 2012,
Presented at World Mobile
Congress 2012
 V1.1 to be released in June 2014
 Implemented in most Smart
Phone / Tablet chipsets
April 2, 2014
http://www.mipi.org/specifications
/battery-interface
Copyright © Infineon Technologies 2012. All rights reserved.
Page 13
SWI Resources
 SWI related Patents

Communication Protocol - US7636806

Device Discovery Mechanism - US8099469

Master PHY Circuit - US20120105051
 IFX Products using SWI / MIPI BIF

Battery Authentication Origa™
2. April 2014
Copyright © Infineon Technologies 2012. All rights reserved.
Page 14
Communication Interface Comparison
SWI
PLC*
I2C /PMBUS
UART
1
0
2
1/2
<2KGate RXTX YES
NO
YES
YES
±30% Slave
Clock
YES
NO
YES
NO
HW only Slave
YES
NO
YES
YES
In-band
Interrupt
YES
NO
NO
NO
SW only
Master
YES
NO
YES
YES
External
Components
Non
LC - Filter
Non
Non
Robustness
High
High
Not for Wire!
Medium
# of Comm.
Wires
* Power Line Communication, FSK (Frequency Shift Keying)
2013-05-24
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Page 16
Other Features of SWI
 Remote Powering of Adapter for Wakeup
 Strong Error Protection with Hamming Parity
 Flexible Data Rate up to 500kBit/s

Slow speed for 32.768kHz Host Operation

High Speed for fast Authentication

Adaptive speed depending on cable length
 Multiple Slaves supported
 Device Discovery Mechanism
 Customizable Address space (e.g. 64K x 8 Byte)
 Vendor specific Extensions supported
2013-05-24
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Page 17
Authentication
PRIVATE
SECRET
Challenge
Random
SECRET
PUBLIC
Encrypt
Decrypt
Verify
Notebook Computer
2013-05-24
Adapter
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Page 18
SWI Bus Transactions Elements
2013-05-24
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Page 19
SWI Bus Transactions
Slave
Master
Master
Slave
Master
Slave
Slave
Master
SDA
SDA
SDA
SDA
WRA
RRA
WRA
RRA
WD
RD
WR
RD
WR
RD
8 Bit Write to 8 Bit
Address Space with
Device Adressing
Master
Slave
8 Bit Read from 8 Bit
Address Space with
Device Adressing
Slave
Master
16 Bit Write to 8 Bit
Address Space with
Device Adressing
Slave
Master
16 Bit Read from 8 Bit
Address Space with
Device Adressing
Slave
Master
SDA
ERA
SDA
EINT
ERA
RRA
DASM
INT
WRA
RD
SDA
SDA
WD
RD
WRA
SRA
WD
RD
WD
RD
RD
DACL
32 Bit Read from 16
8 Bit Write to 8 Bit
Address Space with
two Slave devices
Addressed
16 Bit Write to 16 Bit
Address Space with
Device Adressing
Bit Address Space
Bus Interrupt with
following 8 Bit Read 8
Bit Address Space
SWI_Transactions.vsd
2013-05-24
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Page 20
SWI Error Protection
BCF BCF
D9
D8
D7
D6
D5
D4
P3
D3
D2
D1
P2
D0
P1
P0
INV
=0
BCF BCF
D9
D8
D7
D6
D5
D4
P3
D3
D2
D1
P2
D0
P1
P0
INV
=1
SWIDataProtection.vsd
 15 bit Hamming Code (11 bit payload, 4 bit parity)

Repair 1-bit errors

Detect multi-bit errors
2013-05-24
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Page 21
SWI Master PHY Circuit (Example)
V_PU
T4
T1
V_SNS
1:b
I_MAX/b
a:1
T2
V_BIF
RX
TX
2013-05-24
V_MAX
I_PU
T3
+
-
BCL
T5
Copyright © Infineon Technologies AG 2013. All rights reserved.
Page 22