IEICE TRANS. ELECTRON., VOL.E88–C, NO.6 JUNE 2005
1133
PAPER
Special Section on Analog Circuit and Device Technologies
A Novel Approach for Parameter Determination of HBT
Small-Signal Equivalent Circuit
Han-Yu CHEN† , Kun-Ming CHEN††a) , Guo-Wei HUANG†† , and Chun-Yen CHANG† , Nonmembers
SUMMARY
Direct parameter extraction is believed to be the most accurate method for equivalent-circuits modeling of heterojunction bipolar
transistors (HBT’s). Using this method, the parasitic elements, followed by
the intrinsic elements, are determined analytically. Therefore, the quality
of the extrinsic elements extraction plays an important role in the accuracy
and robustness of the entire extraction algorithm. This study proposes a
novel extraction method for the extrinsic elements, which have been proven
to be strongly correlated with the intrinsic elements. By utilizing the specific correlation, the equivalent circuit modeling is reduced to an optimization problem of determining six specific extrinsic elements. Converting
the intrinsic equivalent circuit into its common-collector configuration, all
intrinsic circuit elements are extracted using exact closed-form equations
for both the hybrid-π and the T-topology equivalent circuits. Additionally,
a general explicit equation on the total extrinsic elements is derived, subsequently reducing the number of optimization variables. The modeling
results are presented, showing that the proposed method can yield a good
fit between the measured and calculated S parameters.
key words: HBT’s, small signal modeling, T-topology, hybrid-π equivalent
circuit
1.
Introduction
Heterojunction bipolar transistors (HBT’s) have been extensively adopted in digital, analog, and power applications
owing to their excellent switching speed and high-current
driving capabilities [1], [2]. An accurate HBT model is vital for designing a circuit, assessing the process technology
and optimizing the device design. Recently, much effort has
been devoted to analytical approaches of HBT equivalentcircuit parameter extraction [3]–[9]. A direct extraction
was presented in [3], where special test structures were designed for de-embedding extrinsic circuit elements. The
frequency dependence of the equivalent circuit parameters
was discussed in [4], allowing most equivalent circuit parameters to be directly evaluated. Another direct extraction procedure for HBT’s was developed in [5], where the
measured S -parameters under open-collector bias condition
were used to determine the extrinsic parameters. More recently, many closed-form representations of intrinsic circuit
elements have been derived to extract equivalent circuit elements directly, if the extrinsic elements can be extracted
accurately [6]–[8].
Manuscript received October 29, 2004.
Manuscript revised January 12, 2005.
†
The authors are with Department of Electronics Engineering,
National Chiao Tung University, Hsinchu, 30050 Taiwan.
††
The authors are with National Nano Deivece Laboratories,
Hsinchu, 30050 Taiwan.
a) E-mail: kmchen@ndl.gov.tw
DOI: 10.1093/ietele/e88–c.6.1133
Current methods for determining the extrinsic resistance and inductance often require measurements at opencollector conditions [5], at low frequencies [4], or with a
special test structure [3]. The extracted extrinsic elements
under a high base current or under the low and high frequency approximations may make a small difference over
their actual values operating in a real bias condition, often
optimizing their values after completing the equivalent circuit modeling [9]. This study proposes a novel method for
HBT equivalent circuit modeling. The proposed method,
which is based on the strong correlation between the extrinsic and intrinsic elements, is analogous to the method developed for MESFET by Shirakawa et al. [10] and can be
considered as an extension of [10], [11], since it derives a
general equation to further reduce the number of extrinsic
optimization parameters, and adopts linear least square algorithms to reduce the number of error functions in the optimization procedure.
The complete extraction procedure of the small-signal
equivalent circuit is conducted in several steps. The rest
of this paper is organized as follows. Section 2 presents
the scheme of deriving the exact formulation for the biasdependent elements (Rbi , Cbcx , Rbe , Cbe , Rbc , Cbci and α for
the T-topology, or Rbi , Cbcx , Rπ , Cπ , Rbc , Cbci and Gm for the
hybrid-π equivalent circuits) in terms of the four measured
S -parameters. Once the closed-form equation is obtained,
any error in the extrinsic elements appearing in the outer
layer of the circuit raises the error in the extracted values
of the bias-dependent elements. As the extrinsic elements
are in their actual values, all intrinsic elements are independent of frequency [10], [11]. Based on this strong correlation between the intrinsic elements and extrinsic elements,
the complete parameter extraction algorithm is discussed in
Sect. 3. Section 4 presents and discusses the extraction results for an InGaP/GaAs HBT device. Conclusions are finally drawn in Sect. 5.
2.
Closed Form Representation of Intrinsic Circuit Elements
2.1 T-Topology Equivalent Circuit of the HBT Transistor
A general HBT equivalent circuit was used in this study.
Figure 1(a) shows the adopted T-topology HBT equivalent
circuit in common-emitter configuration, which is divided
into three parts. The intrinsic bias-dependent parts shown
within the dashed box of Level2 excludes the elements RE ,
c 2005 The Institute of Electronics, Information and Communication Engineers
Copyright IEICE TRANS. ELECTRON., VOL.E88–C, NO.6 JUNE 2005
1134
The transformation between the Y-parameters of the
common-emitter configuration (Ye ) and of the commoncollector configuration (Yc ) are given as [12]
Y11,e
−(Y11,e + Y12,e )
Yc =
(4)
−(Y11,e + Y21,e ) Y11,e + Y12,e + Y21,e + Y22,e
The extrinsic part of the HBT, located outside Level2, is
linked to Level2 through the following equations:
(5)
ZLevel2 = ZLevel1 − Zext
RE + jw (LE )
R + RB + jw (LE + LB )
Zext = E
RE + jw (LE )
RE + RC + jw (LE + LC )
(6)
(a)
where ZLevel1 and Zext are the overall and extrinsic Zparameters, respectively.
2.2 Analytical Determination of the T-Topology Equivalent Circuit Elements
(b)
Fig. 1 (a) T-topology equivalent circuit of a typical HBT. The equivalent
circuit is divided into three parts. The part of Level2 excludes the elements
RE , LE , RB , LB , RC , and LC from Level1, while the part of Level3 excludes
the element Cbcx from Level2. (b) Equivalent circuit of Level2 in common
collector configuration.
LE , RB , LB , RC , and LC from Level1, while Level3 excludes
the base-collector capacitance, Cbcx , from Level2.
Figure 1(b) shows the equivalent Level2 circuit in the
common-collector configuration. The respective ABCDparameters, ALevel2 , are described as [7]
A11,Level2 A12,Level2
ALevel2 =
(1)
A21,Level2 A22,Level2
Like conventional FET modeling, once the extrinsic elements are known, along with the equivalent circuit shown
in Fig. 1(a), the intrinsic elements can be determined analytically. First, the overall S -parameters are converted to Zparameters, then the Z-parameters in common-emitter configuration of Level2 are obtained using Eqs. (5) and (6). After a series of standard network parameter transformations,
the ABCD-parameters in common-collector configuration
of Level2, Alevel2 , are determined.
Consider the A11,Level2 and A21,Level2 shown in (2a) and
(2c). Re-arranging both equations gives
A11,Level2 − 1
Ybc
A21,Level2 − Ybc
Yex =
A11,Level2
Rbi =
and, therefore,
A12,Level2
1
(1 + Rbi Ybc )
= Rbi (1 − α) +
Ybe
= Ybc + Yex (1 + Rbi Ybc )
= (1 − α) (1 + Rbi Yex )
A21,Level2
A22,Level2
1
+
[Ybc + Yex (1 + Rbi Ybc )]
Ybe
(2a)
(2b)
(2c)
(2d)
with
1
Ybc =
+ jwCbci
Rbci
1
+ jwCbe
Ybe =
Rbe
Yex = jwCbcx
α0 exp (− jwτT )
α=
.
w
1+ j
wα
(8)
A11,Level2 − 1
=0
(9)
Im [Rbi ] = Im
A21,Level2 − Yex A11,Level2
A21,Level2 Rbi − A11,Level2 + 1
Re [Yex ] = Re
= 0. (10)
A11,Level2 Rbi
where
A11,Level2 = 1 + Rbi Ybc
(7)
Normalizing (9) and (10), leads to
Im A11,Level2 − 1 A21,Level2 − Yex A11,Level2 ∗ = 0 (11)
Re A21,Level2 Rbi − A11,Level2 + 1 A∗11,Level2 = 0. (12)
(3b)
From the above equations, Yex and Rbi can be determined as
− jIm A11,level2 − 1 A∗21,level2
(13)
Yex =
Re A11,level2 − 1 A∗11,level2
(3c)
and
(3a)
(3d)
Re A11,level2 − 1 A∗11,level2
Rbi =
Re A21,level2 A∗11,level2
(14)
CHEN et al.: A NOVEL APPROACH FOR PARAMETER DETERMINATION
1135
respectively. Then, Ybc can be derived as
A11,level2 − 1
Ybc =
.
Rbi
(15)
According to Fig. 1(b), the chain matrix Alevel2 can be divided into two separate sub-networks, A1 and A2 , connected
in cascade with their elements:
1 + Rbi Ybc
Rbi
A1 =
(16a)
Ybc + Yex + Rbi Yex Ybc 1 + Rbi Yex
1
0
A2 =
(16b)
Ybe 1 − α
(16c)
ALevel2 = A1 · A2
Since |ALevel2 | = |A1 ||A2 | and |A1 |=1, the current gain α can
be derived as
α = 1 − |ALevel2 |
= 1 − A11,Level2 A22,Level2 − A12,Level2 A21,Level2
(17)
The symbol | | denotes the determinant of a given matrix.
By subtracting A22,Level2 with Yex × A12,Level2 , Ybe can be derived as
Ybe = Ybc
A22,level2 − Yex A12,level2 + α − 1
(18)
The equivalent circuit elements in Level2 at each frequency
point are derived from Eqs. (13)–(15) and (18). The detail
expressions are given as follows:
1
Re (Ybc )
1
Rbe =
Re (Ybe )
Im (Ybc )
Cbc =
w
Im (Ybe )
Cbe =
w
Im (Yex )
Cbcx =
w
Rbc =
(19a)
(19b)
(19c)
(19d)
(19e)
At this step, the closed-form representation of most
bias dependent elements has been derived. However, the
closed form representations of α0 , τT and wα are difficult to
find only from (17). Therefore, the three parameters, α0 , τT
and wα , are determined directly from the frequency dependence of Eq. (17) using linear least square algorithms. First,
α0 and wα are extracted from |α(w)|2 , leading to the linear
least-squares problem [13], [14]
2
N w2 |α (wn )|2
∂ − α20 = 0
(20a)
|α (wn )|2 + n 2
∂α0 n=1
wα
2
N w2n |α (wn )|2
∂ 2
2
− α0 = 0
(20b)
|α (wn )| +
∂wα n=1
w2α
where w and N denote the angular frequency and the number
Fig. 2 Hybrid-π equivalent circuit of a typical HBT. The equivalent circuit is divided into two parts. The part of Yint excludes the elements RE ,
LE , RB , LB , RC , and LC from the overall equivalent circuit.
of measured frequency, respectively. The transit time, τT , is
then computed using the mean value of
w
1
τT = − ∠α + tan−1
(21)
w
wα
2.3 Hybrid-π Equivalent Circuit
For the hybrid-π equivalent circuit shown in Fig. 2, a similar
analysis yields the same equations for Yex , Rbi and Ybc as
shown in Eqs. (13)–(15). The equations for extracting Yπ
and Gm are listed as
|Aint | A11,int − 1
Yπ =
(22)
Rbi A22,int − A12,int Yex − |Aint |
(1 − |Aint |)
Yπ
Gm =
(23)
|Aint |
where Aint denotes the ABCD-parameters of Yint in
common-collector configuration, and Yπ and Gm are defined
as
1
Yπ =
+ jwCπ
(24)
Rπ
(25)
Gm = Gm0 exp (− jwτπ )
From (24), (25),
1
Re (Yπ )
Im (Yπ )
Cπ =
w
−1
−1 Im (G m )
tan
τπ =
w
Re (Gm )
Re (Gm )
Gm0 =
.
cos (wτπ )
Rπ =
(26a)
(26b)
(26c)
(26d)
Since the T-topology is more closely related to the original derivation of the common-base Y-parameters of bipolar
transistors [12], [15], it is used in this study to extract extrinsic circuit parameters.
IEICE TRANS. ELECTRON., VOL.E88–C, NO.6 JUNE 2005
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ZLevel3 =



= 

Z11,Level3 Z12,Level3
Z21,Level3 Z22,Level3
1
1
Rbi +
Ybe
Ybe
1
1
α
1
(1 − α)
−
+
Ybe Ybc Ybe Ybc





(28)
where Ybe and Ybc are defined in (3b) and (3a) respectively.
Since the imaginary part of Z11,Level3 -Z12,Level3 equals zero
[8], [16], a general analytic equation in terms of the equivalent circuit elements can be obtained as follows:
Rbi RB Rbi −
Re Z11,Level1 − Z12,Level1
ζ
ζ
−Im Z11,Level1 − Z12,Level1 = 0
wLB +
Fig. 3 Frequency characteristics of the intrinsic T-topology parameter
Cbe with LC as parameter. The HBT is biased at VCE =1.5 V, IB =600 µA
and IC =40 mA.
where
ζ=
2.4 Effect of Extrinsic Elements on Determining Intrinsic
Elements
As mentioned in Sect. 2.2, once extrinsic elements are
given, the bias-dependent elements are determined uniquely
through Eqs. (13)–(15) and (17)–(19). Notably, at millimeter wave frequency, a slight change in any of the extrinsic
elements can lead to drastic changes in some intrinsic elements values. Figure 3 plots the frequency characteristic of
Cbe with respect to LC , showing that a small change in LC ,
heavily affects the intrinsic element Cbe . Therefore, the intrinsic elements can be written as functions of the extrinsic
elements, Zext and the angular frequency as follows:
Rbi = f1 (wi , Zext )
Cbci = f2 (wi , Zext )
Rbe = f3 (wi , Zext )
Cbe = f4 (wi , Zext )
Rbc = f5 (wi , Zext )
Cbcx = f6 (wi , Zext )
(27a)
(27b)
(27c)
(27d)
(27e)
(27f)
If the extracted intrinsic lumped-circuit elements are
valid at each measured frequency, then the elements values
show negligible frequency responses. By finding the specific extrinsic elements, RB , RC , RE , LB , LC , LE , minimizing
the frequency dependence of intrinsic elements, the equivalent circuit modeling is reduced to an optimization problem.
2.5 Derivation of General Analytical Equations
This section introduces an additional relation to further reduce the number of extrinsic elements needed for equivalent
circuit modeling. As shown in Fig. 1(a), the Z-parameters of
the part of level3 can be written as follows:
(29)
Cex + Cbc
wCexCbc
(30)
Equation (29) shows that the extrinsic elements, LB can be
expressed in terms of the other elements and is shown as
LB = f0 (wi , LC , LE , RB , RC , RE ) = f0 (wi , Zext − LB )
(31)
The term Zext -LB denotes all the extrinsic elements except the base inductance. Therefore, once the values of RB ,
RC , RE , LC and LE are known, LB can be determined. By
substituting (29) into (27), in this way, Zext in Eq. (27) can
be expressed as Zext -LB . Therefore, the equivalent circuit
modeling is further reduced to an optimization problem of
finding the specific five extrinsic elements.
3.
The Complete Parameter Extraction Algorithm
Figure 4 shows the complete parameter extraction algorithm. First procedure, the extrinsic parameters are initialized to their appropriate range determined from opencollector measurements [5], making them close to the physically meaningful minimum of the optimization error function.
Second, the extrinsic elements are optimized so that the
intrinsic elements exhibit smaller frequency dependences.
The objective function for this condition is presented as
1
E1k (RB , RC , RE , LC , LE ) =
N−1
2
N−1
N−1
ρk fk (wi , Zext − LB ) −
×
ρk fk w j , Zext − LB i=0
j=0
(32)
where k varies from 1 to 6; N denotes the total number of
measured frequency points; the over bar denotes the mean
values, and ρk denotes a normalizing factor to make fk vary
between zero and one.
Furthermore, to refine the modeling results, (33) is considered as a loose constraint.
CHEN et al.: A NOVEL APPROACH FOR PARAMETER DETERMINATION
1137
4.
Fig. 4
Flow chart of the parameter extraction algorithm.
E2k (RB , RC , RE , LC , LE ) =
2 N−1
2 W pq
p=1 q=1 i=0
2
× S cpq (wi , Zext − LB ) − S mpq (wi , Zext − LB )
(33)
where the superscripts c and m denote the calculated and
measured S parameters, respectively, and W pq denotes the
weighting factor of S pq . The mean values of intrinsic elements are used for computing S Cpq and LB . The extended
error vector then comprises
ε (wi , RB , RC , RE , LC , LE )
 6
 k
E1 (RB , RC , RE , LC , LE )

= 
 k=1
E2k (RB , RC , RE , LC , LE )





(34)
Figure 4 presents the detail parameter extraction steps.
Initially, the values of extrinsic parameters RB , RC , RE , LC
and LE are selectively assigned from the first procedure.
The extrinsic inductance LB , and all the parameters within
Level2, are evaluated from Eqs. (29) and (19)–(21). Notably, some error functions (α0 , τT and wα ), which determine the extrinsic elements, are cleverly eliminated using
linear least square algorithms as described in Sect. 2. The
complexity of the optimization routine is thus reduced to
only seven error functions as compared to ten without using
the linear least square algorithms. Then, the process is conducted iteratively to obtain the lowest possible error vector
value from Eq. (34). If the error vector (34) is below the designed error criteria, the extrinsic and intrinsic elements are
extracted, completing the equivalent circuit modeling.
Results and Discussion
To validate and assess the accuracy of the proposed extraction method, several 4 × 20 µm2 InGaP/GaAs common emitter HBT devices fabricated in-house [17] were investigated.
The measurements were performed with an HP8510C network analyzer and Cascade Microtech probes with a frequency sweep from 1 GHz to 20 GHz. The flowchart depicted in Fig. 4 was implemented on Agilent IC-CAP. Some
details of implementation are considered in the Appendix.
Figure 5(a) compares the measured and calculated S parameters based on the T-equivalent circuit for the bias
point at VCE =1.5 V, IC =17.3 mA, and IB =300 µA. There was
good agreement between the results. Table 1 gives the
small-signal model parameter’s values for some bias points.
By applying the extracted extrinsic elements into
hybrid-π equivalent circuits, the frequency dependence of
the model parameters was obtained. As shown in Fig. 6,
the frequency variation is negligible for the circuit elements,
Gm0 and τπ , while the circuit elements, Rπ and Cπ exhibit
noticeable frequency dependence.
The circuit elements Rπ , Cπ , Gm0 and τπ were derived in
terms of the T-topology equivalent circuit elements by comparing the Y parameters of Level2 in T-topology equivalent
circuit and Yint in hybrid-π equivalent circuit. The detailed
expressions was given as
α0 1 + (wRbeCbe )2
Gm0 =
2
Rbe
1 + wwα
α0 if wwα and wRbe Cbe 1
≈
(35a)
Rbe
wτT − tan−1 (wCbe Rbe ) + tan−1 wwα
τπ =
w
1 if wwα and wCbe Rbe 1
(35b)
≈ τT − Cbe Rbe +
wα
sin (wτπ )
Cπ = Cbe + Gm0
≈ Cbe + Gm0 τπ if wτπ 1
(35c)
w
Rbe
Rbe
if wτπ 1
(35d)
≈
Rπ =
1 − Gm0 Rbe cos (wτπ ) 1 − Gm0 Rbe
Clearly, the parameters Gm0 , τπ , Cπ and Rπ have the
nature of frequency dependence, as been observed by many
authors [18], [19]. However, according to (35c) and (35d),
the frequency dependence of Cπ and Rπ is negligible if
wτπ 1 (i.e. τT is small). Therefore, the proposed method
may be applicable in the hybrid-π equivalent circuit in stateof-the-art HBT’s with the values of τT that are sufficiently
low.
Here, the bias-dependent elements of the hybrid-π
equivalent circuit are derived directly from the optimization method with a tight search domain according to the
extraction results after removing the extrinsic elements.
Figure 5(b) compares the measured and calculated S parameters based on the hybrid-π equivalent circuit for the
bias point used in Fig. 5(a). Table 1 lists the modeling results
IEICE TRANS. ELECTRON., VOL.E88–C, NO.6 JUNE 2005
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(a)
(b)
Fig. 5 Comparison between the measured and calculated S -parameters for the bias point of
VCE =1.5 V, IC =17.3 mA and IB =300 µA. Square and line represents the measured and calculated S parameters, respectively. (a) T-equivalent circuit (b) Hybrid-π equivalent circuit.
Table 1 Extracted model parameters for both T-Topology and the Hybrid-π equivalent circuit. The
VCE is biased at 1.5 V.
CHEN et al.: A NOVEL APPROACH FOR PARAMETER DETERMINATION
1139
(a)
be due to the Early effect.
The base-emitter capacitance Cbe includes the terms
related to the base-emitter junction depletion capacitance
and the base-emitter diffusion capacitance. Since the baseemitter junction depletion capacitance does not vary much
with VBE [21], the increase in Cbe is mainly contributed by
the base-emitter diffusion capacitance. The diffusion capacitance is the variation in the minority carrier charge in the
quasi-neutral emitter and in the quasi-neutral base with respect to the change in VBE . As IC increases (i.e. VBE increases), the minority carrier both in the emitter and base region also increases. Therefore, Cbe increase as IC increases.
Table 1 shows that the delay time τT decreases with increasing IC . The modeling result in this study is consistent
with that in [22], [23]. The delay time τT (=τB /6+τC ) contains two components: τB , the base transit time, and τC , the
collector depletion region delay time [21]. For a uniformly
doped base, τB and τC can be written as
WB2
WB
+
2DnB vn,avg
WC
τC =
2vn,avg
τB =
(b)
Fig. 6 Intrinsic Hybrid-π model parameters computed from intrinsic Ttopology model parameters. (a) Gm0 and τπ (b) Cπ and Rπ .
of the hybrid-π equivalent circuit for some bias points.
Table 1 shows that some modeling parameters can be
correlated to the physical principle of HBT operation. Cbcx
models the extrinsic component of base-collector junction
capacitances where the collector current flow is negligible.
For HBT’s biasing in the forward active mode, the basecollector junction is reverse-biased, and the diffusion capacitance is negligible. The slight decrease in (Cbcx +Cbci ) with
increasing IC is attributed to the current-induced broadening of the base/collector depletion layer, and to the variation
of space charge with VCB due to electron velocity modulation [20]. The intrinsic base resistance Rbi splits the basecollector capacitance into intrinsic (Cbci ) and extrinsic components (Cbcx ). The reduction of Rbi at higher currents is
caused by emitter current crowding [21].
The saturation of α0 with collector current reflects a
similar trend for the variation of the common-emitter DC
current gain, β, with current. The dynamic resistance Rbe
models the variation in the emitter current resulting from
base-emitter voltage changes. The reduction in Rbe with increasing IC follows the inverse current relationship Rbe =
nbe KT/qIE , where nbe denotes the ideality factor of the baseemitter junction and is around 1.33–1.54 in the modeling
HBT. The reduction of the base-collector resistance Rbc may
(36)
(37)
where WB denotes the neutral base width; DnB denotes the
diffusion constant in the base region; vn,avg denotes the average velocity of electrons at the base end of the base/collector
depletion region, and WC denotes the base/collector depletion width. Since base region of the HBTs is heavily doped,
their base width modulation effect is small. The WC variation was also neglected in this study, since the reduction
of (Cbcx +Cbci ) is less than 10% (∼10 fF). Therefore, the reduction of τT at a higher IC may be due to the higher vn,avg
caused by a higher applied voltage in the base/emitter junction and thus a lower base/emitter potential barrier.
For the hybrid-π equivalent circuit, some circuit parameters are the same as that in the T-topology equivalent
circuit. The bias information of the other parameters, Gm ,
τπ , Rπ and Cπ can be explained from the relationships between T-topology and hybrid-π equivalent circuits depicted
in Eq. (35).
5.
Conclusion
This study presents a novel method for small-signal HBT
equivalent circuit modeling. The exact formulation for the
bias-dependent elements both for T-topology and hybrid-π
equivalent circuits is derived in terms of the four-measured
S -parameters, reducing the small-signal modeling of HBT’s
to accurately determining the extrinsic element values. Assuming that the equivalent circuit is valid over the whole
frequency range of the measurements, the extrinsic elements
are iteratively determined by minimizing the variance of the
intrinsic elements as an optimization criterion. One general
equation for the total extrinsic elements has been derived, reducing the number of optimization variables. Additionally,
linear least square algorithms are adopted to cut the num-
IEICE TRANS. ELECTRON., VOL.E88–C, NO.6 JUNE 2005
1140
ber of error functions involved in the optimization procedure, reducing the optimization routine’s complexity. Consequently, the proposed method leads to a good fit between
the measured and calculated S -parameters.
[17]
Acknowledgments
[18]
The authors would like to thank Prof. Edward Yi Chang in
NCTU for providing the HBT’s used in this study and the
staff members of NDL for measurement support. This work
was supported in part by the Taiwan National Science Council through contract number NSC-94-2215-E-492-003.
[19]
[20]
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Appendix
This section describes the implementation of the proposed
algorithm in Agilent’s ICCAP.
• The netlist of both the T-topology and hybrid-π equivalent circuits are written in the “Test Circuit” window in
ICCAP.
• Equation (4) for transformation between common-emitter
Y-parameters and common-collector Y-parameters; (6)
for obtaining the Z-parameters of Level2; (13)–(15) and
(17)–(21) for obtaining the T-topology circuit parameters,
and (24)–(26) for the hybrid-π equivalent circuit parameters, are written in the “Extract/Optimize” Window.
• An “Optimize function” is written in the “Extract/Optimize” Window. The optimization parameters are the extrinsic resistance and inductance with the
searching range obtained from the open-collector measurement. Equation (34) gives the error function used in
the optimization.
CHEN et al.: A NOVEL APPROACH FOR PARAMETER DETERMINATION
1141
Han-Yu Chen
received the B.S. degree in
electrical engineering from National Sun YetSen University, Kaohsiung, Taiwan, in 2000.
Since 2001, he has been a Ph.D. student in the
Department of National Chiao Tung University,
Hsinchu, Taiwan. His research interests include
microwave device process and characterization.
Kun-Ming Chen
received the M.S. degree
and the Ph.D. degree in electronics engineering
from National Chiao Tung University, Hsinchu,
Taiwan, in 1996 and 2000, respectively. He
joined the National Nano Device Laboratories,
Hsinchu, Taiwan, in 2000 as an Associate Researcher. He was engaged in research on the microwave device process and characterization.
Guo-Wei Huang
received the B.S. degree in electronics engineering and the Ph.D.
degree from National Chiao Tung University in
1991 and 1997, respectively. He joined National
Nano Device Laboratories, Hsinchu, Taiwan, in
1997 as an Associate Researcher and became a
Researcher in 2004. His current research interests focus on microwave device design, characterization and modeling.
Chun-Yen Chang
received the B.S. degree
in electrical engineering from Cheng Kung University, Taiwan, in 1960, and the M.S. degree in
tunneling in semiconductor-supercondutor junctions and the Ph.D. degree in carrier transport across metal-semiconductor barrier, both
from National Chiao Tung University (NCTU)
Hsinchu, Taiwan, in 1969. He has devoted
himself to education and academic research for
more than 40 years. He has contributed profoundly to the areas of microelectronics and
optoelectronics, including the invention of the method of low-pressureMOCVD-using tri-ethyl-gallium to fabricate LED, laser, and microwave
transistors, Zn-incorporation of SiO2 for stabilization of power devices,
and nitridation of SiO2 for ULSIs, etc. From 1962 to 1963, he fulfilled
his military service by establishing at NCTU Taiwan’s first experiment TV
transmitter that formed the founding structure of today’s CTS. In 1963, he
joined NCTU to serve as an instructor establishing a high vacuum laboratory. In 1964, he and his colleague established the semiconductor research center (SRC) at NCTU with a very up-to-date, albeit homemade,
facility for silicon device processing, where they made the nation’s first
Si Planar transistor in April 1965, and subsequently the first IC in August
1966. In 1968, he published Taiwan’s first-ever semiconductor paper in the
international journal Solid State Electronics. In 1969, he became a Full
Professor, teaching solid state physics, quantum mechanics, semiconductor
devices and technologies. From 1977 through 1987, he single-handedly established a strong electrical engineering and computer science program at
NCKU where GaAs, α-Si, poly-Si researches were established in Taiwan
for the first time. Since 1987 he served consecutively as Dean of Research
(1987–1990), Dean of Engineering (1990–1994), and Dean of Electrical
Engineering and Computer Science (1994–1995). Simultaneously he was
serving as the founding president of National Nano Device Laboratories
(NDL) from 1990 through 1997. In 1997, he became Director of the Microelectronics and Information System Research Center (MIRC), NCTU
(1997–1998). Many of his former students have since become founders of
the most influential Hi-Tech enterprises in Taiwan, namely UMC, TSMC,
Winbond, MOSEL, Acer, Leo, etc. In August 1, 1998, he was appointed
as the President of NCTU. As the National-Chair-Professor and President
of NCTU, his vision is to lead the university for excellence in engineering,
humanity, art, science, management and bio-technology. To strive forward
to world class multidisciplinary university is the main goal to which he and
his colleagues have committed. Dr. Chang received the IEEE third millennium medal in 2000. He is a member of Academia Sinica and a Foreign
Associate of the National Academy of Engineering.