ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
ATM SWITCH USING S/UNI-ATLAS, QRT,
AND QSE
REFERENCE DESIGN
PRELIMINARY
ISSUE 2: JUNE 1999
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
PUBLIC REVISION HISTORY
Issue
No.
Issue
Date
Details of Change
1
Apr 1999
Document created.
2
July 1999
Added implementation description
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ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
CONTENTS
1
DEFINITIONS ........................................................................................... 1
2
FEATURES ............................................................................................... 2
3
REFERENCES ......................................................................................... 3
4
DESCRIPTION ......................................................................................... 4
5
FUNCTIONAL DESCRIPTION ................................................................. 5
6
5.1
SUBRACK MECHANICAL SPECIFICATION ................................. 5
5.2
CUSTOM HIGH SPEED BACKPLANE .......................................... 6
5.3
QSE SWITCH CARDS, PMC-981288............................................ 7
5.4
SPORT CARD REFERENCE DESIGNS, PMC-980585 ................ 7
5.5
TIMING CARD ............................................................................... 8
5.6
CPCI BACKPLANE ........................................................................ 8
5.7
CPCI PROCESSOR CARD ........................................................... 8
IMPLEMENTATION DESCRIPTION ....................................................... 10
6.1
SUBRACK.................................................................................... 11
6.2
CUSTOM HIGH SPEED BACKPLANE ........................................ 11
6.2.1 SHEET 1, ROOT DRAWING ............................................. 11
6.2.2 SHEETS 2 – 6, SPORT CARD ......................................... 12
6.2.3 SHEET 7, POWER SUPPLY ............................................. 12
6.2.4 SHEETS 8 & 9, QSE CARD.............................................. 12
6.2.5 SHEET 10, TIMING CARD INTERFACE ........................... 12
6.2.6 BACKPLANE BILL OF MATERIALS.................................. 13
6.3
TIMING CARD ............................................................................. 13
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ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
6.3.1 SHEET 1, TIMING ROOT DRAWING................................ 13
6.3.2 SHEET 2, CPLD................................................................ 13
6.3.3 SHEET 3, ROBOCLOCKS ................................................ 14
6.3.4 SHEET 4, BACKPLANE INTERFACE ............................... 17
6.3.5 TIMING CARD BILL OF MATERIALS ............................... 19
7
NOTES ON BUILDING LARGE FABRICS.............................................. 21
7.1
INCREASE THE NUMBER OF CARDS PER SHELF.................. 21
7.2
RAISING THE BANDWIDTH OF THE PORT CARDS ................. 21
7.3
BEYOND A SINGLE SHELF ........................................................ 22
7.4
40G THREE STAGE SWITCH...................................................... 22
7.5
80G THREE STAGE SWITCH...................................................... 25
7.6
160G THREE STAGE SWITCH.................................................... 29
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ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
LIST OF FIGURES
FIGURE 1 - SUBRACK LINE DRAWING ........................................................... 6
FIGURE 2 - SWITCH FABRIC BACKPLANE ..................................................... 7
FIGURE 3 - TIMING CARD ................................................................................ 8
FIGURE 4 - 5G SWITCH WITH 16 OC-3 PORTS............................................ 10
FIGURE 5 - 5G SINGLE STAGE SWITCH....................................................... 21
FIGURE 6 - 40G THREE STAGE SWITCH ...................................................... 22
FIGURE 7 - 80G THREE STAGE SWITCH ...................................................... 25
FIGURE 8 - 160G THREE STAGE SWITCH .................................................... 29
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iii
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
LIST OF TABLES
TABLE 1
- SUBRACK BILL OF MATERIALS ................................................. 11
TABLE 2
- BACKPLANE BILL OF MATERIALS............................................. 13
TABLE 3
- ROBOCLOCK SELECT................................................................ 15
TABLE 4
- PAIR SELECT............................................................................... 15
TABLE 5
- PROGRAMMABLE SKEW CONFIGURATIONS .......................... 16
TABLE 6
- BACKPLANE INTERFACE CONNECTOR ................................... 17
TABLE 7
- TIMING CARD BILL OF MATERIALS........................................... 19
TABLE 8
- SWITCH CARDS.......................................................................... 23
TABLE 9
- PORT CARDS .............................................................................. 24
TABLE 10 - SWITCH CARDS.......................................................................... 26
TABLE 11 - PORT CARDS .............................................................................. 27
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iv
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
1
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
DEFINITIONS
CPCI
Compact PCI. The PCI Industrial Computer Manufacturers
Group (PICMG) defines a set of standards for the use of PCI
in industrial applications. The standards can be found at
http://www.picmg.org.
Eurocard
IEEE 1101.1 specifies the mechanical requirements for rack
mounted cards. The standard is referred to commonly as the
eurocard standard.
HP
Horizontal Pitch. Refers to horizontal increments in card
width. One HP is 0.2 inches. A 4HP card occupies 0.8
inches of rack width.
SPort Card
The SPort Card reference design is a switch port card based
on the S/UNI-TETRA, S/UNI-ATLAS, and QRT devices from
PMC-Sierra. This design is detailed in document PMC980583, available from PMC-Sierra’s website.
U
Unit. Refers to height increments in card sizes in the
euorocard standard. One U is 1.75 inches. A 6U card, then,
is 10.5 inches in height.
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1
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
2
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
FEATURES
•
Demonstrates interoperability between QSE and SPort Card reference
designs
•
Modified CPCI form factor improves portability
•
Centralized switch fabric timing
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2
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
3
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
REFERENCES
•
PMC-Sierra, Inc. “Switch Port Card Reference Design” PMC-980583
•
PMC-Sierra, Inc. “QSE Reference Design”, PMC-981288
•
PCI Industrial Computer Manufacturer’s Group, “CompactPCI
Specification”,September 1997
•
IEEE Computer Society, “IEEE Standard for Mechanical Core Specifications
for Microcomputers using IEC 60603-2 Connectors”, IEEE 1101.1-1998
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3
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
4
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
DESCRIPTION
This reference design describes a 5G ATM switch using the SPort Card and QSE
reference designs. The SPort Card reference design is a 4xOC-3 switch port
card using the PM5351 S/UNI-TETRA, PM7324 S/UNI-ATLAS, and PM73487
QRT devices. The QSE reference design is a 10Gbps switch core building block
using two PM73488 QSE devices. These two boards are designed to be housed
in a 9U subrack, using a 3U 8-slot Compact PCI backplane for microprocessor
access and a 6U custom backplane for card interconnect.
For simplicity, this design uses an eight slot compact PCI backplane. Since the
processor card takes up two slots, the chassis will support 6 cards. The chassis
will then be able to support multiple switch fabric configurations. The
components of the system described in this document are:
•
Subrack mechanical specification
•
Custom high speed backplane
•
QSE Switch Cards, PMC-981288
•
SPort Card reference designs, PMC-980585
•
Timing card
•
cPCI backplane
•
cPCI Processor card
•
Custom backplane
The design guidelines used in this design may be scaled to very large fabrics, as
the serialiser and deserialiser components greatly reduce the required
interconnection through the backplane. Section 7 attempts to describe how a
large system might be designed by extending the design practices.
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4
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
5
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
FUNCTIONAL DESCRIPTION
The components that make up the ATM Switch are detailed in the subsections
that follow.
5.1
Subrack Mechanical specification
A 19 inch, 9U rack conforming to the eurocard standard is used to house SPort
cards, QSE switch core cards, timing card, processor card, and backplane
interconnect. The following is a non-exhaustive list of features:
•
19 inch width with brackets for rackmounting
•
Support for 6 IEEE 1101.1 ‘Eurocard’ format 9U, 160mm deep, 4HP cards
each with access to the cPCI bus.
•
Mounting area for 3U cPCI Backplane
•
Mounting area for 6U Custom backplane
•
Support for 6U, 160mm deep, 8HP cPCI processor card
•
Support for a single 3U, 160mm deep, 4HP card. No micrprocessor access is
given to this card.
•
Mounting area for Power supply, which connects to the cPCI backplane as
well as the custom backplane.
A line drawing of the subrack is shown below in Figure 1.
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5
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
Figure 1
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
- Subrack Line Drawing
Top
View
Timing
Card
Power
supply
mounting
area
Card
Guides
Front
View
Side
View
QSE or
SPort Card
reference
designs
6U
Processor
Card
Custom
Backplane
cPCI
Backplane
5.2
Custom high speed backplane
The backplane is a 6U height passive backplane using AMP HS3 controlled
impedance connectors. The backplane routes high-speed signals beteen the
QSE switch cards and ATLAS/QRT port cards. The backplane also carries timing
information from the timing card to the switch cards and port cards. Power for
the timing card is also sourced from the backplane. Depending on the power
required by each of the cards, the analog power supply for each of the port cards
and switch cards may also be sourced from the backplane. A block diagram of
the backplane is illustrated below in Figure 2. The leftmost slot, slot 6, is
intended to loopback a port card in order to test the analog portion of the board.
Slot 5 is a QSE card slot. Slots 4 through 1 are port card slots. Slot 0 is for the
timing card, above the processor card. Each port card connects to one of the 16
available ports on the QSE card. Unused ports on the QSE card are looped
back in order to test the analog portion of the board.
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6
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
- Switch Fabric Backplane
5.3
SPort Card
SPort Card
SPort Card
SPort Card
QSE Card
SPort Card Loopback
SE_CLK, CELL_START, CELL_24_START
Timing Card
Figure 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
QSE Switch Cards, PMC-981288
The QSE switch card reference design (PMC-981288) is used as a building block
for the scalable switch fabric. The QSE switch card reference design has 16
bidirectional ports, each of which can interface to a single SPort Card reference
design. The QSE switch card is 9U in height. For more information, refer to
document PMC-981288.
5.4
SPort Card reference designs, PMC-980585
The SPort Card reference design (PMC-980585) is used as a 4xOC-3 rate port
card. 4 port cards are used, providing a total of 16 OC-3 ports. The SPort Card
is 9U in height.
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ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
5.5
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
Timing card
The timing card provides switch fabric timing information to each of the port
cards and switch cards. This is a 3U card using an AMP HS3 connector. The
reference clock may be sourced from an on-board oscilator or alternately from an
external source. Since the card does not require microprocessor access, it does
not use a compact PCI slot. Rather, it will be connected only to the custom high
speed backplane. A block diagram is shown below in Figure 3.
Figure 3
- Timing Card
66.66
MHz
Backplane
Interface
SMA
CPLD
5.6
cPCI backplane
The cPCI backplane is an off-the-shelf 3U design to provide microprocessor
access to each of the SPort Cards and QSE cards. For this design, the
backplane must be eight slots, with a right-hand system slot.
5.7
cPCI Processor Card
A 6U cPCI Intel-based processor card is an off-the-shelf component used to
provide software control to each of the SPort Cards and Switch Cards. Because
it is 6U, and the subrack is 9U, there is 3U of space above to mount the timing
card. The processor card supports multiple operating systems, including
VxWorks and Windows 95/NT.
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ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
6
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
IMPLEMENTATION DESCRIPTION
A 5G single stage switch is constructed using 1 QSE reference design and up to
5 SPort Card reference designs, thus using all the available slots. One of the
QSEs on the card will not be used in this case. A block diagram of the switch is
shown below in Figure 4.
Figure 4
- 5G switch with 16 OC-3 Ports
Backplane
SPort Card
SPort Card
QSE 1
SPort Card
QSE 2
(Not used)
SPort Card
SPort Card
Timing Card
To all cards
Processor Card
To all cards
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ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
6.1
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
Subrack
The subrack was constructed using the bill of materials in Table 1.
Table 1
No.
6.2
- Subrack Bill of Materials
Description
Schroff Part
No.
Qty.
1 9Ux280mm deep lab side plate
30825-592
2
2 9U 19" Mounting angles
30847-816
2
3 84HP Front Rails with extended lip
30846-465
2
4 84HP Rear Rails for top and bottom
30819-241
2
5 84HP Centre rear rail.
30825-356
2
6 20HP Centre rail for guide rail mounting
30825-082
2
7 Vertical splitter for 9U
30897-203
1
8 Screw kit for securing rails to splitters
21100-575
1 pkg
9 Screw kit for securing splitters
21100-148
1 pkg
10 Screw kit for securing rails to sideplates
21100-457
1 pkg
11 Screw kit for securing 19" mounting angles
21100-739
1 pkg
12 Guides for 160mm boards
60817-103
16
13 Threaded Inserts 84HP
30819-594
8
14 Insulating strips for backplane mounting
60817-061
4
Custom High speed backplane
The schematics for the high speed backplane are included in Appendix A for
reference.
6.2.1 Sheet 1, Root Drawing
This sheet shows the top-level inconnection between each of the SPort Card
reference designs with the QSE reference design and the timing card. This
backplane forms a single stage fabric using only one of the QSEs on the QSE
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ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
reference design. Unused ports on the QSE reference design are looped back
on themselves. Slot 6 provides external loopback for the SPort Card.
6.2.2 Sheets 2 – 6, SPort Card
Each of these sheets is identical, and reflects the interface to the SPort Card
reference design. Refer to PMC-980583 for more information on this interface.
6.2.3 Sheet 7, Power supply
J17 provides power to the backplane. The SPort Cards and QSE Cards both
have the ability to source analog power through the backplane. Additionally, the
timing card (slot 0) must be powered through this connector. Terminal 1 is for
analog power (if required) and should be connected to 3.3V. Terminal 2 is for
power to the timing card and should be connected to 3.3V. Terminal 4 should be
connected to ground.
6.2.4 Sheets 8 & 9, QSE Card
These sheets make up the interface to the QSE reference design. Refer to PMC981288 for more information on this interface.
6.2.5 Sheet 10, Timing Card Interface
This sheet shows the interface to the timing card. Refer to section 6.3 for more
information on this interface.
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ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
6.2.6
ISSUE 2
Backplane Bill of Materials
Table 2
No.
- Backplane Bill of Materials
Description
1 6 row HS3 connector
Male vertical
2 10µF tantalum Capacitor,
6.3V
3 Surface mount fuse, 3A
4 Green surface mount LED
5 300 Ω resistor, 5%, 805
6.3
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
Manufacturer/Part
No.
Ref Des
Qty
AMP 97-8522-25
J1-J16
16
DIGI-KEY
C1, C2
PCS1106CT-ND
DIGIKEY F1228CT-ND F1
NEWARK -- 95F9373
U1, U2
R1, R2
2
1
2
2
Timing Card
The schematics for the timing card are included in Appendix B for reference.
6.3.1 Sheet 1, Timing Root Drawing
This sheet provides an overview of the design. The general layout of the main
blocks and interfacing signals are shown on this sheet. The design is divided into
three sections: CPLD, RoboClocks, and Backplane Interface. They are described
in the sections that follow.
6.3.2 Sheet 2, CPLD
A low voltage, 100-pin, CPLD is used to generate nine CELL_START
(RX_CELL_START) signals, six CELL_24_START signals, and 24 RoboClock
control signals.
All CELL_START and CELL_24_START signals are connected to two
input/output pins of the CPLD. This increases the output drive current for each
signal and utilization of the CPLD. The VCCIO power pins are connected to 3.3V
giving the output drivers 3.3V operation.
The CPLD serves two functions. The first function is to supply CELL_START and
CELL_24_START signals. One 66.66 MHz clock signal is taken from RoboClock
U3 and is connected to the global clock pin of the CPLD. This clock is then
connected to an 8-bit counter with an enable. The enable is connected to Vcc,
thus making the counter increment on every clock pulse. Three AND gates are
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ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
used to determine when the counter reaches 117. Once 117 has been reached,
a logic one is sent to a D flip-flop which uses the same timing as the counter.
This allows a logic one to remain for one clock pulse. The 8-bit counter is reset
to zero when its output reaches 117. The result of this is a CELL_START signal
that becomes high on the rising edge of every 118th cycle of SE_CLK. A 4-bit
counter with enable is used to count each CELL_START signal. When the 8-bit
counter reaches 117, it enables the 4-bit counter to increment once. A 4-bit AND
gate is used to determine when the 4-bit counter reaches 4. At this point, a logic
one is outputted and the counter is reset on the next clock pulse. The result is a
CELL_24_START signal that goes high every four CELL_START pulses and
remains high for one clock cycle.
The second purpose of the CPLD is for control of the RoboClocks. Nine
switches are connected to the CPLD as input for configuring the RoboClocks.
The first four switches can be used to select one output pair. The value of both
pins in this pair is denoted by the configuration of the next four switches. The last
switch is used as an enable switch to change the values of the selected output
pins. This is done by first loading the switches into three registers. These
registers are clocked on the global clock signal. The first four switches are
connected to the load lines of each register and the next four switches are
connected to the data lines of each register. The last switch is connected to the
set line of each register. All three registers contain four 5-input AND gates that
determine what output pair (if any) is to be changed. If a proper pair is selected
and set is high, then the data lines are loaded into four D flip-flops. The output of
the D flip-flops are connected to tri-state output buffers, which allows the output
to be either low, high, or high impedance.
JTAG pins are connected to a right angle header located on the faceplate.
6.3.3 Sheet 3, RoboClocks
Three Cypress CY7B991V low voltage programmable skew clock buffers are
used to buffer and drive nine SE_CLK signals.
The reference clock to the first RoboClock can be supplied from either a local
66.66 MHz crystal oscillator or an external clock source. An external source may
be connected to the right angle SMA located on the faceplate. The output of the
SMA is balanced with a BALUN transformer. A dual differential LVPECL to TTL
translator is then used to convert the signal to TTL logic. A jumper must be used
to connect pins two and three of header J3 if using an external clock, otherwise
pins one and two must be connected.
Nine switches located on the faceplate can be used to vary the skew of each
SE_CLK signal. The switches are coded to allow one input pair of a RoboClock
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ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
to be changed at a time. Decoding the switches is done by the CPLD. The first
four switches are used to select which RoboClock and pair to modify. See Table
3for the configuration of the first two switches (switch 0 and switch 1).
Table 3
- RoboClock Select
Switch 01
Description
00
Last RoboClock (U4)
01
Middle RoboClock (U2)
10
First RoboClock (U3)
11
Not Used
Once the RoboClock has been selected, the pair that requires modification must
be selected. Each RoboClock contains four input pairs. See Table 4 for the
configuration of the next two switches (switch 2 and switch 3).
Table 4
- Pair Select
Switch 23
Selected Pair
00
1F0, 1F1
01
2F0, 2F1
10
3F0, 3F1
11
4F0, 4F1
After the RoboClock and pair have been selected, the value of the pair can be
set. Each function input is tri-state. In each pair, there is a XF0 pin and a XF1
pin where X stands for either 1, 2, 3, or 4 depending on the pair that was
selected. Switch 4 and switch 5 control the value of the XF1 pin in the pair. If
switch 4 = switch 5 = 0, then XF1 is LOW. If switch 4 = 0 (or 1) and switch 5 = 1
then the XF1 pin is MID (high impedance). And finally, if switch 4 = 1 and switch
5 = 0 then the XF1 pin is HIGH. A similar configuration follows for switch 6 and
switch 7, which control pin XF0. Switch eight must be asserted for at least one
clock pulse to load the value into the selected pair.
The input configuration of each pair determines the amount of skew the
corresponding output pair will have with respect to the reference clock.
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ATM SWITCHING
PRELIMINARY
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PMC-990330
ISSUE 2
Table 5
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
- Programmable Skew Configurations
1F1, 2F1,
1F0, 2F0,
1Q0, 1Q1,
3Q0, 3Q1
4Q0, 4Q1
3F1, 4F1
3F0, 4F0
2Q0, 2Q1
(ns)
(ns)
(ns)
LOW
LOW
-4tU
Divide by 2
Divide by 2
LOW
MID
-3tU
-6tU
-6tU
LOW
HIGH
-2tU
-4tU
-4tU
MID
LOW
-1tU
-2tU
-2tU
MID
MID
0tU
0tU
0tU
MID
HIGH
+1tU
+2tU
+2tU
HIGH
LOW
+2tU
+4tU
+4tU
HIGH
MID
+3tU
+6tU
+6tU
HIGH
HIGH
+4tU
Divide by 4
Inverted
Notes on Programmable Skew Configurations:
1. tU can be calculated by the following formula tU = 1/(16fNOM)
2. fNOM is the operating frequency between 40MHz and 66.67MHz. Using a
66.66MHz clock, is approximately 0.94 ns.
When using the local 66.66 MHz crystal oscillator as the reference clock to
RoboClock U3, both input pins 3F0 and 3F1 must equal MID. This allows all
other output pins to run at the required frequency of 66.66 MHz. 2Q0 and 2Q1
provides the reference clock for the middle RoboClock and the last RoboClock
respectively. Adjusting input pins 2F0 and 2F1 on the first RoboClock will skew
all output signals from the middle and the last RoboClocks equally. Adjusting
input pins 1F0 and 1F1 on the first RoboClock will affect all CELL_START and
CELL_24_START signals equally.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
15
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
6.3.4 Sheet 4, Backplane Interface
The backplane interface is a HS3 6 x 10 right angle connector. Nine SE_CLK,
nine CELL_START and six CELL_24_START signals are delivered through the
connector. Six 3.3V power pins are supplied from the backplane to the board.
Table 6
- Backplane Interface Connector
Pin Name
Type
Pin No.
Function
SE_CLK_1
Output
A1
Switch Element Clock is the 66.66
MHz switch fabric clock for the
QSE and QRT.
SE_CLK_2
A2
SE_CLK_3
A3
SE_CLK_4
A4
SE_CLK_5
A5
SE_CLK_6
A6
SE_CLK_7
A7
SE_CLK_8
A8
SE_CLK_9
A9
CELL_START_1
Output
A10
CELL_START_2
C1
CELL_START_3
C2
CELL_START_4
C3
CELL_START_5
C4
CELL_START_6
C5
CELL_START_7
C6
CELL_START_8
C7
CELL_START_9
C8
Cell Start indicates the SOC for
the QSE and QRT. It is driven
high every cell time (118
SE_CLKs) and remains high for 1
clock cycle.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
16
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
Pin Name
Type
Pin No.
Function
C24S_1
Output
C9
Cell 24 Start indicates the 4th cell
time. It is driven high every 4
CELL_START assertions and
follows CELL_START when driven
high.
C24S_2
C10
C24S_3
E1
C24S_4
E2
C24S_5
E3
C24S_6
E4
NC
NC
B1 -
Not Connected
B10,
D1 D10,
F1 F10
+ 3.3V
Input
E5 -
+ 3.3 Volt supply
E10
GND
Input
AB1 -
Ground
AB10,
CD1 CD10,
EF1 EF10
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
17
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
6.3.5 Timing Card Bill of Materials
Table 7
- Timing Card Bill of Materials
No.
Description
Manufacturer/Part
No.
Ref Des
Qty
1
AMP HS3 6x10 Female
Right Angle Connector
AMP 97-8522-24
J5
1
2
BALUN Transformer
TOKO 617DB-1024
T1
1
3
Capacitor 0.1uF, 50V,
X7R_805
KEMET
C0805C104K5RACTR
C1-C6, C8- 28
29
4
Capacitor 4.7uF, 6.3V,
TANT TE, SMD
Panasonic – ECG
ECS-T0JY475R
C7, C30
2
5
Low Voltage Programmable Cypress CY7B991VSkew Clock Buffer
5JC
U2-U4
3
6
Fuse 2A 125V Fast Nano 2
SMF
Littelfuse Inc. R451002
F1
1
7
Header-4
Sullins Electronics
Corp. PZC36SAAN
J2
1
8
Switch 10 pos. DIP
Grayhill 78B10S
J1
1
9
Header-3
Sullins Electronics
Corp. PZC36SAAN
J3
1
10
LED 5mm Green PCB
Right Angle
Lumex
Opto/Components Inc.
SSF-LXH100MLGD
D1
1
11
Dual Differential PECL to
TTL Translator
Motorola
Semiconductor
MC100ELT23
U1
1
12
Oscillator 66.6667MHz,
HCMOS, 8-PIN, 3.3V
MMD Components
MB3100H66.6667MHz
Y1
1
13
Resistor 1.0 Ohm, 1/8W,
5%, 1206, SMD
Panasonic – ECG
ERJ-8RQJ1R0V
R8, R9
2
14
Resistor 1.00k Ohm,
1/10W, 1%, 0805, SMD
Panasonic – ECG
ERJ-6ENF1001V
R12
1
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
18
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
No.
Description
Manufacturer/Part
No.
Ref Des
Qty
15
Resistor 10.0k Ohm,
1/10W, 1%, 0805, SMD
Panasonic – ECG
ERJ-6ENF1002V
R4, R6
2
16
Resistor 100 Ohm, 1/10W,
5%, 0805, SMD
Panasonic – ECG
ERJ-6GEYJ101V
R7
1
17
Resistor 20 Ohm, 1/10W,
5%, 0805, SMD
Panasonic – ECG
ERJ-6GEYJ200V
R2, R13R34, R36R39
27
18
Resistor 20k Ohm, 1/10W,
5%, 0805, SMD
Panasonic – ECG
ERJ-6GEYJ203V
R5, R11
2
19
Resistor 25.5 Ohm, 1/10W,
1%, 0805, SMD
Panasonic – ECG
ERJ-6ENF25R5V
R3, R10
2
20
Resistor 300 Ohm, 1/10W,
5%, 0805, SMD
Panasonic – ECG
ERJ-6GEYJ301V
R1
1
21
Resistor 49.9 Ohm, 1/10W,
1%, 0805, SMD
Panasonic – ECG
ERJ-6ENF49R9V
R35
1
22
Resistor Network 10k
Ohm, 16pin, 15Res, SMD
CTS Corporation
Resistor Products
766161103G
RN1
1
23
SMA PCB Right Angle
Johnson Components,
Inc. 142-0701-301
J4
1
24
XC95144XL High
Performance CPLD,
TQFP100
Xilinx XC95144XL5TQ100C
U5
1
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
19
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
7
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
NOTES ON BUILDING LARGE FABRICS
This document showed how to use the QSE reference design and the SPort
Card reference design to build a single stage switch with 16 OC-3 ports. The
design could easily be scaled to 32 OC-3 ports by simply providing more slots in
the backplane. The logical interconnection is shown below in Figure 5. For
simplicity, the QRT input and output ports are drawn seperately, though they are
in fact part of the same physical device.
Figure 5
- 5G Single Stage Switch
PM73487
QRT
x4
PM73488
QSE
PM73487
QRT
x4
x4
Where larger fabrics are desired, the design practices used to create a 5G switch
can be extended to create scalable fabrics up to 40G, 80G, and 160G.
Suggested strategies for reaching these rates are detailed in the sections that
follow.
7.1
Increase the Number of Cards Per Shelf
A larger number of cards per shelf is recommended. A 19 inch rack is wide
enough to house 16 cards quite comfortably, with enough room to spare for
processor card, timing card, and power supply.
7.2
Raising the bandwidth of the port cards
The bandwidth of the port cards could be raised to OC-48 rates. The SPort Card
is on a 100mm x 9U card. The design practices used on that card could be
extended to build a card using 4 OC-12 PHYs, 4 ATLASs, and 4 QRTs. This
would significantly reduce the number of slots dedicated to port cards.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
20
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
7.3
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
Beyond a Single Shelf
A good strategy for building multiple shelf designs would be to place all the QSE
cards within the same rack. In this way, the most dense interconnection between
the QSEs would be contained within the shelf, reducing the interconnect
between shelves. The Port cards, having less interconnect to the QSEs, could
then be housed in other shelves. The shelves could then be interconnected
using a transition card using miniature coax or twinax cables.
7.4
40G Three Stage Switch
A 40G three stage switch can be constructed using 24 QSEs and 64 QRTs. The
logical interconnection is illustrated in Figure 6 below.
Figure 6
QRT
In
#1
- 40G Three Stage Switch
QSE
#1
x4
QSE
#9
QSE
#10
x4
QSE
#17
QRT
Out
#1
QSE
#15
QSE
#8
QSE
#16
QSE
#24
QRT
In
#64
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
QRT
Out
#64
21
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
Clearly a design such as the one in Figure 6 would require multiple shelves. The
number of shelves required depends on the density of the cards. Using the
recommendations of section 7.1, we will assume that each shelf can
accommodate 16 cards. Using the recommendation of section 7.2, we will
assume that each port card has four PM73487 QRT devices. Thus, 64 QRTs
could fit onto 16 cards. The 24 PM73488 QSE devices could fit onto 12 cards,
assuming two QSEs per card. Since the most dense interconnect is between
QSEs, it is recommended that all the switch cards be placed in one shelf, while
all the port cards are placed in the second shelf.
Table 8 below describes how each of the switch cards corresponds to QSEs in
Figure 6. Table 9 describes how each of the port cards corresponds to QRTs in
Figure 6.
Table 8
- Switch Cards
Switch Card Number
QSE#s (From Figure 6)
1
#9, #10
2
#11, #12
3
#13, #14
4
#15, #16
5
#1, #17
6
#2, #18
7
#3, #19
8
#4, #20
9
#5, #21
10
#6, #22
11
#7, #23
12
#8, #24
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
22
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
Table 9
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
- Port Cards
Port Card Number
QRT#s (from Figure 6)
Connects to switch
card number
1
#1 - #4
#5
2
#5 - #8
#5
3
#9 - #12
#6
4
#13 - #16
#6
5
#17 - #20
#7
6
#21 - #24
#7
7
#25 - #28
#8
8
#29 - #32
#8
9
#33 - #36
#9
10
#37 - #40
#9
11
#41 - #44
#10
12
#45 - #48
#10
13
#49 - #52
#11
14
#53 - #56
#11
15
#57 - #60
#12
16
#61 - #64
#12
The design is scaleable from 2.5G to 40G, in increments of 2.5G. The initial
installation of the switch would use switch cards 1 through 5 and port card 1 to
create a 2.5G switch. Additional port cards can be added, with the
corresponding switch cards to allow cost linearity in expanding the switch up to
its maximum capacity of 40G.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
23
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
7.5
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
80G Three Stage Switch
An 80G design can be constructed using 48 QSEs and 128 QRTs in the as
described in Figure 7 below. Note that in the figure, QRT/QSE ports are grouped
in twos, rather than in fours as was done in previous sections. This requires a
change in the backplane serialization strategy, but is required to create an 80G
fabric.
Figure 7
QRT
In
#1
- 80G Three Stage Switch
x2
x2
QSE
#1
x2
QSE
#17
QSE
#18
x2
QSE
#33
QRT
Out
#1
QSE
#31
QSE
#16
QSE
#32
QSE
#48
QRT
In
#128
QRT
Out
#128
Maintaining the assumptions of section 7.4, the above switch would require 24
switch cards and 32 port cards. Therefore, the entire switch would fit into 4
shelves. The QSEs would be grouped onto cards in the same manner as in
section 7.4, as illustrated in below.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
24
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
Table 10
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
- Switch Cards
Switch Card Number
QSE#s (from Figure 7)
1
#17, #18
2
#19, #20
3
#21, #22
4
#23, #24
5
#25, #26
6
#27, #28
7
#29, #30
8
#31, #32
9
#1, #33
10
#2, #34
11
#3, #35
12
#4, #36
13
#5, #37
14
#6, #38
15
#7, #39
16
#8, #40
17
#9, #41
18
#10, #42
19
#11, #43
20
#12, #44
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
25
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
Switch Card Number
QSE#s (from Figure 7)
21
#13, #45
22
#14, #46
23
#15, #47
24
#16, #48
Table 11
- Port Cards
Port Card Number
QRT#s (from Figure 7)
Connects to switch
card number
1
#1 - #4
9
2
#5 - #8
9
3
#9 - #12
10
4
#13 - #16
10
5
#17 - #20
11
6
#21 - #24
11
7
#25 - #28
12
8
#29 - #32
12
9
#33 - #36
13
10
#37 - #40
13
11
#41 - #44
14
12
#45 - #48
14
13
#49 - #52
15
14
#53 - #56
15
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
26
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
Port Card Number
QRT#s (from Figure 7)
Connects to switch
card number
15
#57 - #60
16
16
#61 - #64
16
17
#65 - #68
17
18
#69 - #72
17
19
#73 - #76
18
20
#77 - #80
18
21
#81 - #84
19
22
#85 - #88
19
23
#89 - #92
20
24
#93 - #96
20
25
#97 - #100
21
26
#101 - #104
21
27
#105 - #108
22
28
#109 - #112
22
29
#113 - #116
23
30
#117 - #120
23
31
#121 - #124
24
32
#125 - #128
24
The design is also scaleable from 2.5G to 80G, in increments of 2.5G. The initial
installation of the switch would use switch cards 1 through 9 and port card 1 to
create a 2.5G switch. Additional port cards can be added, with the
corresponding switch cards to allow cost linearity in expanding the switch up to
its maximum capacity of 80G.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
27
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
7.6
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
160G Three Stage Switch
A 160G design can be constructed using 96 QSEs and 256 QRTs in the as
described in Figure 7 below. Note that in the figure, QRT/QSE ports are not
grouped as was done in previous sections. This requires a change in the
backplane serialization strategy, but is required to create a 160G fabric.
Figure 8
QRT
In
#1
- 160G Three Stage Switch
QSE
#1
QSE
#33
QSE
#34
QSE
#65
QRT
Out
#1
QSE
#63
QSE
#32
QSE
#64
QSE
#96
QRT
In
#256
QRT
Out
#256
Using the assumptions of the previous section, this switch would require 64 port
cards and 48 switch cards, and would occupy 7 shelves.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
28
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
APPENDIX A: BACKPLANE SCHEMATICS
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
29
A
B
C
D
E
F
G
H
SLOT 0
10
POWER
9
CELL_24_START<5..0>
CELL_START<8..0>
SE_CLK<8..0>
PAGE 7
PAGE 10
CELL_24_START<5..0>
CELL_START<8..0>
SE_CLK<8..0>
TIMING_CARD_INTERFACE
9
SE_CLK
SE_CLK<1>
1
CELL_START
CELL_START<1>
1
CELL_24_START
CELL_24_START<1>
1
8
PAGE 8,9
BPACKIN0<31..0>
BPACKOUT0<31..0>
BPACKIN1<31..0>
BPACKOUT1<31..0>
TX17+
TX17RX17+
RX17-
TX16+
TX16RX16+
RX16-
TX15+
TX15RX15+
RX15-
TX14+
TX14RX14+
RX14-
TX13+
TX13RX13+
RX13-
TX12+
TX12RX12+
RX12-
TX11+
TX11RX11+
RX11-
TX10+
TX10RX10+
RX10-
TX07+
TX07RX07+
RX07-
TX06+
TX06RX06+
RX06-
TX05+
TX05RX05+
RX05-
TX02+
TX02RX02+
RX02TX03+
TX03RX03+
RX03TX04+
TX04RX04+
RX04-
TX00+
TX00RX00+
RX00TX01+
TX01RX01+
RX01-
SW_CARD1_INTERFACE
SLOT 5
8
7
BPACKIN<31..0>
BPACKOUT<31..0>
BPSCLOOP1<31..0>
TX15P
TX15N
TX14P
TX14N
TX13P
TX13N
TX12P
TX12N
TX11P
TX11N
TX10P
TX10N
TX9P
TX9N
TX8P
TX8N
TX7P
TX7N
TX6P
TX6N
TX5P
TX5N
TXD2P
TXD2N
RXD2P
RXD2N
TXD3P
TXD3N
RXD3P
RXD3N
TX4P
TX4N
TXD0P
TXD0N
RXD0P
RXD0N
TXD1P
TXD1N
RXD1P
RXD1N
7
31..16
BPSCLOOP0<31..16>
10
24
25
26
27
28
29
30
31
25
26
27
28
29
30
31
21
21
23
20
20
22
19
19
24
18
18
23
17
17
22
16
16
6
6
31..16
15..12
11..8
7..4
3..0
BPSCLOOP0<31..16>
5
5
15..12
11..8
7..4
3..0
6
5
4
3
2
SE_CLK<4>
CELL_START<4>
BPACKOUT<11..8>
BPACKIN<11..8>
SE_CLK<3>
CELL_START<3>
BPACKOUT<7..4>
BPACKIN<7..4>
SE_CLK<2>
CELL_START<2>
6
5
4
SE_CLK<6>
CELL_START<6>
BPPCLOOP<3..0>
SE_CLK<5>
CELL_START<5>
BPACKOUT<15..12>
BPACKIN<15..12>
4
3
2
BPACKOUT<3..0>
BPACKIN<3..0>
4
PAGE 6
SLOT 6
SLOT 1
SLOT 2
SLOT 3
3
DATE
1
2
PAGE:1
ENGINEER:
APPR
1
OF 10
99/05/03
DATE:
TITLE: ATM SWITCH BACKPLANE
ROOT DRAWING
SA / GW
ISSUE: 1
DOCUMENT NUMBER: PMC-990330
PMC-Sierra, Inc.
DRAWING:
TITLE=LOOPBACK_ROOT
ABBREV=LOOPBACK_ROOT
LAST_MODIFIED=Tue May 18 16:19:20 1999
SE_CLK
CELL_START
PAGE 5
PORT_CARD5_INTERFACE
TX+
TXRX+
RXBP_ACK_IN<3..0>
BP_ACK_OUT<3..0>
SE_CLK
CELL_START
PAGE 4
PORT_CARD4_INTERFACE
TX+
TXRX+
RXBP_ACK_IN<3..0>
BP_ACK_OUT<3..0>
SE_CLK
CELL_START
PAGE 3
PORT_CARD3_INTERFACE
TX+
TXRX+
RXBP_ACK_IN<3..0>
BP_ACK_OUT<3..0>
SE_CLK
CELL_START
PAGE 2
SLOT 4
DESCRIPTION
PORT_CARD2_INTERFACE
TX+
TXRX+
RXBP_ACK_IN<3..0>
BP_ACK_OUT<3..0>
SE_CLK
CELL_START
2
REVISIONS
PORT_CARD1_INTERFACE
REV
TX+
TXRX+
RXBP_ACK_IN<3..0>
BP_ACK_OUT<3..0>
ZONE
3
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
10
10
2E10>
10G10<
TX+\I
RX+\I
9
CELL_START\I
BP_ACK_OUT<3..0>\I
9
3
2
1
0
8
8
6
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
7
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
J2
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J2
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
ROW 4 (BOTTOM)
J2
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
MALE_V
J1
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
MALE_V
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
MALE_V
J1
J1
ROW 2 (TOP)
VDD_A
6
3
2
1
0
TX-\I
RX-\I
5
5
SE_CLK\I
BP_ACK_IN<3..0>\I
SLOT 4 SPORT CARD
7
4
4
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
MALE_V
J1
DESCRIPTION
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
J2
GND PINS FOR HS3 CONNECTORS
REV
2
REVISIONS
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
3
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
J2
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
MALE_V
J1
DATE
1
2
PAGE:2
ENGINEER:
APPR
1
OF 10
99/05/03
DATE:
TITLE: ATM SWITCH BACKPLANE 1
SPORT CARD SLOT
SA / GW
ISSUE: 1
DOCUMENT NUMBER: PMC-990330
PMC-Sierra, Inc.
DRAWING:
TITLE=PORT_CARD1_INTERFACE
ABBREV=PORT_CARD1_INTERFACE
LAST_MODIFIED=Mon May 10 10:21:34 1999
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
J2
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
MALE_V
J1
ZONE
3
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
10
10
2E10>
10G10<
TX+\I
RX+\I
9
CELL_START\I
BP_ACK_OUT<3..0>\I
9
3
2
1
0
8
8
6
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
7
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
J4
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J4
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
ROW 4 (BOTTOM)
J4
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
J3
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J3
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
J3
ROW 2 (TOP)
VDD_A
6
3
2
1
0
TX-\I
RX-\I
5
5
SE_CLK\I
BP_ACK_IN<3..0>\I
SLOT 3 SPORT CARD
7
4
4
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
J3
DESCRIPTION
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
J4
GND PINS FOR HS3 CONNECTORS
REV
2
REVISIONS
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
3
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
J4
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
J3
DATE
1
2
PAGE:3
ENGINEER:
APPR
1
OF 10
99/05/03
DATE:
TITLE: ATM SWITCH BACKPLANE 1
SPORT CARD SLOT
SA GW
ISSUE: 1
DOCUMENT NUMBER: PMC-980330
PMC-Sierra, Inc.
DRAWING:
TITLE=PORT_CARD2_INTERFACE
ABBREV=PORT_CARD2_INTERFACE
LAST_MODIFIED=Mon May 10 10:21:51 1999
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
J4
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
J3
ZONE
3
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
10
10
2E10>
10G10<
TX+\I
RX+\I
9
CELL_START\I
BP_ACK_OUT<3..0>\I
9
3
2
1
0
8
8
6
5
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
7
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
J6
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J6
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
ROW 4 (BOTTOM)
J6
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
J5
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J5
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
J5
ROW 2 (TOP)
VDD_A
6
3
2
1
0
TX-\I
RX-\I
5
SE_CLK\I
BP_ACK_IN<3..0>\I
SLOT 2 SPORT CARD
7
4
4
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
J5
DESCRIPTION
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
J6
GND PINS FOR HS3 CONNECTORS
REV
2
REVISIONS
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
3
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
J6
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
J5
DATE
1
2
PAGE:4
ENGINEER:
APPR
1
OF 10
99/05/03
DATE:
TITLE: ATM SWITCH BACKPLANE 1
SPORT CARD SLOT
SA / GW
ISSUE: 1
DOCUMENT NUMBER: 990330
PMC-Sierra, Inc.
DRAWING:
TITLE=PORT_CARD3_INTERFACE
ABBREV=PORT_CARD3_INTERFACE
LAST_MODIFIED=Mon May 10 10:22:10 1999
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
J6
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
J5
ZONE
3
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
10
10
2E10>
10G10<
TX+\I
RX+\I
9
CELL_START\I
BP_ACK_OUT<3..0>\I
9
3
2
1
0
8
8
6
5
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
7
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
J8
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J8
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
ROW 4 (BOTTOM)
J8
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
J7
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J7
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
J7
ROW 2 (TOP)
VDD_A
6
3
2
1
0
TX-\I
RX-\I
5
SE_CLK\I
BP_ACK_IN<3..0>\I
SLOT 1 SPORT CARD
7
4
4
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
J7
DESCRIPTION
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
J8
GND PINS FOR HS3 CONNECTORS
REV
2
REVISIONS
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
3
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
J8
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
J7
DATE
1
2
PAGE:5
ENGINEER:
APPR
1
OF 10
99/05/03
DATE:
TITLE: ATM SWITCH BACKPLANE 1
SPORT CARD SLOT
SA / GW
ISSUE: 1
DOCUMENT NUMBER: PMC-990330
PMC-Sierra, Inc.
DRAWING:
TITLE=PORT_CARD4_INTERFACE
ABBREV=PORT_CARD4_INTERFACE
LAST_MODIFIED=Mon May 10 18:16:43 1999
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
J8
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
J7
ZONE
3
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
10
10
2E10>
10G10<
TX+\I
RX+\I
9
CELL_START\I
BP_ACK_OUT<3..0>\I
9
3
2
1
0
8
8
6
5
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
7
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
J10
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J10
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
ROW 4 (BOTTOM)
J10
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
J9
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J9
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
J9
ROW 2 (TOP)
VDD_A
6
3
2
1
0
TX-\I
RX-\I
5
SE_CLK\I
BP_ACK_IN<3..0>\I
SLOT 6 SPORT CARD
7
4
4
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
J9
DESCRIPTION
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
J10
GND PINS FOR HS3 CONNECTORS
REV
2
REVISIONS
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
3
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
J10
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
J9
DATE
1
2
PAGE:6
ENGINEER:
APPR
1
OF 10
99/05/03
DATE:
TITLE: ATM SWITCH BACKPLANE 1
SPORT CARD SLOT
SA / GW
ISSUE: 1
DOCUMENT NUMBER: PMC-990330
PMC-Sierra, Inc.
DRAWING:
TITLE=PORT_CARD5_INTERFACE
ABBREV=PORT_CARD5_INTERFACE
LAST_MODIFIED=Mon May 10 10:22:20 1999
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
J10
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
J9
ZONE
3
A
B
C
D
E
F
G
H
9
8
7
6
5
4
REV
DRAWING:
PLACE CAP NEAR TIMING CARD CONNECTOR
ZONE
3
2
DESCRIPTION
REVISIONS
DATE
1
APPR
E
F
G
H
A
3
2
PAGE:7
ENGINEER:
1
OF 10
99/05/03
DATE:
TITLE: ATM SWITCH BACKPLANE 1
POWER SUPPLY SECTION
SA / GW
ISSUE: 1
DOCUMENT NUMBER: PMC-990330
PMC-Sierra, Inc.
TITLE=POWER
ABBREV=POWER
LAST_MODIFIED=Mon May 10 18:17:20 1999
A
B
10
U2
3.3 V
4
B
SUPER_GREEN
C
5.000A
R1
C
1
2
3
4
F1
U1
1
2
300
1 CAP PER QSE SLOT
PLACE NEAR CONNECTOR
5
R2
D
J17
VDD_A
10UF
6
10UF
D
E
7
C1
F
8
SUPER_GREEN
G
9
300
2
1
H
10
C2
A
B
C
D
E
F
G
H
10
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
10
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
MALE_V
J11
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
9
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
MALE_V
J11
GROUND FOR ROW 1
9
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
8
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
MALE_V
J11
RX14+\I
RX15+\I
RX16+\I
RX17+\I
RX10+\I
RX11+\I
RX12+\I
RX13+\I
TX14+\I
TX15+\I
TX16+\I
TX17+\I
TX10+\I
TX11+\I
TX12+\I
TX13+\I
RX04+\I
RX05+\I
RX06+\I
RX07+\I
RX00+\I
RX01+\I
RX02+\I
RX03+\I
TX04+\I
TX05+\I
TX06+\I
TX07+\I
TX00+\I
TX01+\I
TX02+\I
TX03+\I
8
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
6
7
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
MALE_V
J12
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
MALE_V
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
MALE_V
J12
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
MALE_V
J12
J12 ROW 2
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
MALE_V
J11
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
MALE_V
J11
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
6
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
MALE_V
J12
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
MALE_V
J11 ROW 1 (TOP)
GROUND FOR ROW 2
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
SLOT 5 QSE
7
5
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
MALE_V
J12
5
RX14-\I
RX15-\I
RX16-\I
RX17-\I
RX10-\I
RX11-\I
RX12-\I
RX13-\I
VDD_A
TX14-\I
TX15-\I
TX16-\I
TX17-\I
TX10-\I
TX11-\I
TX12-\I
TX13-\I
RX04-\I
RX05-\I
RX06-\I
RX07-\I
RX00-\I
RX01-\I
RX02-\I
RX03-\I
TX04-\I
TX05-\I
TX06-\I
TX07-\I
TX00-\I
TX01-\I
TX02-\I
TX03-\I
4
4
REV
2
DESCRIPTION
REVISIONS
3
DATE
1
2
PAGE:8
ENGINEER:
APPR
1
OF 10
99/05/03
DATE:
TITLE: ATM SWITCH BACKPLANE 1
SWITCH CARD HIGH SPEED
SA / GW
ISSUE: 1
DOCUMENT NUMBER: PMC-990330
PMC-Sierra, Inc.
TITLE=SW_CARD1_INTERFACE
ABBREV=SW_CARD1_INTERFACE
LAST_MODIFIED=Mon May 10 10:22:30 1999
DRAWING:
ZONE
3
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
10
10
SE_CLK\I
CELL_START\I
BPACKIN1<31..0>\I
BPACKIN0<31..0>\I
9
9
8
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
24
25
26
27
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
F6
E6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
MALE_V
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
28
29
30
31
7
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
D9
C9
C10
D10
AMP_HS3_6X10
J15MALE_V
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
24
25
26
27
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
MALE_V
J15
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
16
17
18
19
20
21
22
23
12
13
14
15
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
J15 ROW 5 (BOTTOM)
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
F6
E6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
MALE_V
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
8
9
10
11
4
5
6
7
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J14MALE_V
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
MALE_V
J14
J14 ROW 4
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
F6
E6
E7
F7
E8
F8
E9
F9
E10
F10
AMP_HS3_6X10
MALE_V
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
J13MALE_V
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
MALE_V
J13
J13 ROW 3
0
1
2
3
28
29
30
31
20
21
22
23
7
6
6
SLOT 5 QSE
16
17
18
19
12
13
14
15
8
9
10
11
4
5
6
7
0
1
2
3
8
28
29
30
31
24
25
26
27
16
17
18
19
20
21
22
23
14
15
10
11
12
13
8
9
6
7
2
3
4
5
0
1
30
31
26
27
28
29
24
25
22
23
18
19
20
21
16
17
14
15
10
11
12
13
8
9
6
7
2
3
4
5
0
1
BPACKOUT0<31..0>\I
5
CELL_24_START\I
BPACKOUT1<31..0>\I
5
4
4
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
REV
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
MALE_V
3
2
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
MALE_V
J13
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
MALE_V
J14
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
MALE_V
J15
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
MALE_V
J14
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
MALE_V
J13
ENGINEER:
SA / GW
2
APPR
1
PAGE:9
OF 10
99/05/03
DATE:
TITLE: ATM SWITCH BACKPLANE 1
SWITCH CARD BACKPRESSURE SIGNALS
PMC-Sierra, Inc.
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
MALE_V
J15
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
DATE
1
ISSUE: 1
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
GROUND FOR ROW 5
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
GROUND FOR ROW 4
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
GROUND FOR ROW 3
DESCRIPTION
REVISIONS
DOCUMENT NUMBER: PMC-990330
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
MALE_V
J15
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
MALE_V
J14
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
J13
ZONE
3
A
B
C
D
E
F
G
H
5
4
4
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
J16
REV
2
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
DESCRIPTION
REVISIONS
GROUND FOR HS3 CONNECTOR
ZONE
3
J16
DATE
1
APPR
9
8
A
7
6
E1
F1
E2
F2
E3
F3
E4
F4
E5
F5
E6
F6
E7
F7
E8
F8
E9
F9
F10
E10
AMP_HS3_6X10
MALE_V
J16
C1
D1
C2
D2
C3
D3
C4
D4
C5
D5
C6
D6
C7
D7
C8
D8
C9
D9
C10
D10
AMP_HS3_6X10
MALE_V
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
5
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AMP_HS3_6X10
MALE_V
DRAWING:
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD1
CD2
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
AMP_HS3_6X10
MALE_V
J16
EF1
EF2
EF3
EF4
EF5
EF6
EF7
EF8
EF9
EF10
AMP_HS3_6X10
MALE_V
D
E
F
3
2
PAGE:10
ENGINEER:
1
OF 10
99/05/03
DATE:
TITLE: ATM SWITCH BACKPLANE
TIMING CARD INTERFACE
SA / GW
ISSUE: 1
DOCUMENT NUMBER: PMC-980330
PMC-Sierra, Inc.
TITLE=TIMING_CARD_INTERFACE
ABBREV=TIMING_CARD_INTERFACE
LAST_MODIFIED=Mon May 10 10:21:23 1999
A
B
3.3 V
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
J16
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B
0
1
2
3
4
5
0
1
2
3
4
5
6
7
8
J16
A1
B1
A2
B2
A3
B3
A4
B4
B5
A5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
AMP_HS3_6X10
MALE_V
C
10
CELL_24_START<5..0>\I
CELL_START<8..0>\I
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
C
D
E
F
SE_CLK<8..0>\I
G
0
1
2
3
4
5
6
7
8
6
SLOT 0 TIMING CARD
7
G
8
H
9
H
10
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
APPENDIX B: TIMING CARD SCHEMATICS
The schematics for the timing card are in two groups; the first is the schematics
for the timing card pcb. The second is for the CPLD.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
30
A
IPAD
INV
INV
INV
IBUF
IBUF
IBUF
N3
N4
N5
IPAD
IPAD
1
INV
IBUF
N2
IPAD
INV
INV
INV
INV
IBUF
IBUF
IBUF
IBUF
N6
N7
N8
IPAD
IPAD
IPAD
IPAD
INV
CLKAA
IBUF
BUFG
N1
N0
CLK
IPAD
IPAD
P22
P49
P46
P43
P42
P41
P40
B P39
P37
P36
C
D
E
F
G
H
1
2
2
CELL_24_START
CELL_START
SW_SET
SW7
SW6
SW5
SW4
SW3
SW2
SW1
SW0
ROBO_A[7:0]
ROBO_B[7:0]
3
CEE
INT_C[7:0]
ROBO_C[7:0]
ROBOCONTROL
SET
SWITCH_7
SWITCH_6
SWITCH_5
SWITCH_4
SWITCH_3
SWITCH_2
SWITCH_1
SWITCH_0
CLK
U1
CLK_COUNT
CLK
H2
3
OPAD
OPAD
OPAD
INT_B3
INT_B4
4
INT_A7
INT_A6
INT_A5
INT_A4
INT_A3
INT_A2
INT_A1
INT_A0
INT_A[7:0]
INT_B7
INT_B6
5
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
INT_B2
INT_B5
OPAD
INT_B1
OPAD
OPAD
INT_B0
INT_B[7:0]
INT_C7
INT_C6
OPAD
OPAD
INT_C4
INT_C5
OPAD
INT_C3
OPAD
OPAD
INT_C1
INT_C2
OPAD
5
INT_C0
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
4
P53
P52
P50
P86
P85
P82
P81
P80
P63
P61
P60
P59
P58
P56
P55
P54
P72
P71
P70
P68
P67
P66
P65
P64
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
OBUF
6
6
Date: 99/03/10
Page: 1 of 7
PMC-Sierra Inc.
CELL_24_START12
CELL_24_START11
CELL_24_START10
CELL_24_START9
CELL_24_START8
CELL_24_START7
CELL_24_START6
CELL_24_START5
CELL_24_START4
CELL_24_START3
CELL_24_START2
CELL_24_START1
CELL_START18
CELL_START17
CELL_START16
CELL_START15
CELL_START14
CELL_START13
CELL_START12
CELL_START11
CELL_START10
CELL_START9
CELL_START8
CELL_START7
CELL_START6
CELL_START5
CELL_START4
CELL_START3
CELL_START2
CELL_START1
7
7
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
OPAD
8
Document Number: 990330
Issue: 1
Title: Timing Card CPLD
Drawing Title: CPLD Root
P33
P34
P87
P89
P90
P91
P92
P93
P94
P95
P96
P97
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P6
P7
P8
P9
P28
P29
P30
P32
8
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
1
1
2
2
CLK
3
3
VCC
TC
C
R
CEO
CE
Q[7:0]
CB8RE
4
4
CEO
TC
C
Q3
Q2
Q1
Q0
CE
R
CB4RE
Q[7:0]
Q7
Q6
Q5
Q4
Q3
Q1
Q0
Q2
Q[7:0]
5
AND4B3
AND4B1
AND4B3
5
AND2
6
6
C
D
Q
Date: 99/03/10
Page: 2 of 7
PMC-Sierra Inc.
FD
7
C
D
7
Q
CELL_START
B
C
D
E
F
G
H
8
Document Number: 990330
A
Issue: 1
Title: Timing Card CPLD
Drawing Title: CLK_COUNT
CELL_24_START
FD
8
A
B
C
D
E
F
G
H
1
DATA_3
SWITCH_7
REG_3
DATA_3
DATA_2
DATA_1
DATA_0
LOAD_3
LOAD_2
LOAD_1
CLK
REG3_Q[15:0]
LOAD_0
U28
SET
REG_2
DATA_3
DATA_2
DATA_1
DATA_0
LOAD_3
LOAD_2
LOAD_1
CLK
REG2_Q[15:0]
LOAD_0
SET
U23
REG_1
DATA_2
SET
DATA_1
LOAD_3
LOAD_2
LOAD_1
CLK
REG1_Q[15:0]
LOAD_0
U14
SET
SWITCH_6
4
4
SWITCH_5
3
3
DATA_0
2
2
SWITCH_4
SWITCH_3
SWITCH_2
SWITCH_1
SWITCH_0
CLK
1
C[15:0]
A15
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
C0
5
B[15:0]
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
A[15:0]
5
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
OBUFT
6
ROBO_C7
ROBO_C6
ROBO_C5
ROBO_C4
ROBO_C3
ROBO_C2
ROBO_C1
ROBO_C0
ROBO_B7
ROBO_B6
ROBO_B5
ROBO_B4
ROBO_B3
ROBO_B2
ROBO_B1
ROBO_B0
ROBO_A7
ROBO_A6
ROBO_A5
ROBO_A4
ROBO_A3
ROBO_A2
ROBO_A1
ROBO_A0
6
Page: 3 of 7
Date: 99/03/10
PMC-Sierra Inc.
7
7
8
Title: Timing Card CPLD
Drawing Title: Robocontrol
Document Number: PMC-990330
Issue: 1
ROBO_C[7:0]
ROBO_B[7:0]
ROBO_A[7:0]
8
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
SET
DATA_3
DATA_2
DATA_1
DATA_0
LOAD_3
LOAD_2
LOAD_1
CLK
1
1
LOAD_0
2
2
3
3
AND5B4
AND5B3
AND5B3
AND5B2
4
4
5
5
6
6
REG
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U13
REG
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U12
REG
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U11
REG
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U10
Page: 4 of 7
Date: 99/03/10
PMC-Sierra Inc.
REG1_Q15
REG1_Q14
REG1_Q13
REG1_Q12
REG1_Q11
REG1_Q10
REG1_Q9
REG1_Q8
REG1_Q7
REG1_Q6
REG1_Q5
REG1_Q4
REG1_Q3
REG1_Q2
REG1_Q1
REG1_Q0
7
7
8
Title: Timing Card CPLD
Drawing Title: Reg_1
Document Number: PMC-990330
Issue: 1
REG1_Q[15:0]
8
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
SET
DATA_3
DATA_2
DATA_1
DATA_0
LOAD_3
LOAD_2
LOAD_1
LOAD_0
CLK
1
1
2
2
3
3
AND5B1
4
AND5B3
AND5B2
AND5B2
4
5
5
REG
D3
D2
6
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U22
REG
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U21
REG
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U20
REG
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U19
6
Page: 5 of 7
Date: 99/03/10
PMC-Sierra Inc.
REG2_Q15
REG2_Q14
REG2_Q13
REG2_Q12
REG2_Q11
REG2_Q10
REG2_Q9
REG2_Q8
REG2_Q7
REG2_Q6
REG2_Q5
REG2_Q4
REG2_Q3
REG2_Q2
REG2_Q1
REG2_Q0
7
8
8
Title: Timing Card CPLD
Drawing Title: Reg_2
Document Number: PMC-990330
Issue: 1
REG2_Q[15:0]
7
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
SET
DATA_3
DATA_2
DATA_1
DATA_0
LOAD_3
LOAD_2
LOAD_1
LOAD_0
CLK
1
1
2
2
3
3
4
4
AND5B3
AND5B2
AND5B2
AND5B1
5
5
6
6
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U27
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U26
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U25
D3
D2
D1 Q0
D0 Q1
LOAD
Q2
CLKQ3
U24
Page: 6 of 7
Date: 99/03/10
PMC-Sierra Inc.
REG3_Q15
REG3_Q14
REG3_Q13
REG3_Q12
REG3_Q11
REG3_Q10
REG3_Q9
REG3_Q8
REG3_Q7
REG3_Q6
REG3_Q5
REG3_Q4
REG3_Q3
REG3_Q2
REG3_Q1
REG3_Q0
7
7
8
Title: Timing Card CPLD
Drawing Title: Reg_3
Document Number: PMC-990330
Issue: 1
REG3_Q[15:0]
8
A
B
C
D
E
F
G
H
A
B
C
D
E
F
1
2
GND
D3
D2
D1
D0
3
LOAD
4
D
D
FDPE
Q
Q
C
CE
D
C
CE
C
PRE
FDPE
PRE
FDPE
PRE
FDPE
CE
D
C
CE
PRE
Q
Q
5
5
6
Q3
Q2
Q1
Q0
6
PMC-Sierra Inc.
Page: 7 of 7
Date: 99/03/10
7
7
8
Title: Timing Card CPLD
Drawing Title: Reg
Document Number: PMC-990330
Issue: 1
8
A
B
C
D
E
F
G
CLK
4
G
3
H
2
H
1
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
NOTES
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
31
ATM SWITCHING
PRELIMINARY
REFERENCE DESIGN
PMC-990330
ISSUE 2
ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE
CONTACTING PMC-SIERRA, INC.
PMC-Sierra, Inc.
105-8555 Baxter Place Burnaby, BC
Canada V5A 4V7
Tel:
(604) 415-6000
Fax:
(604) 415-6200
Document Information:
Corporate Information:
Application Information:
Web Site:
document@pmc-sierra.com
info@pmc-sierra.com
apps@pmc-sierra.com
(604) 415-4533
http://www.pmc-sierra.com
None of the information contained in this document constitutes an express or implied warranty by PMC-Sierra, Inc. as to the sufficiency, fitness or
suitability for a particular purpose of any such information or the fitness, or suitability for a particular purpose, merchantability, performance, compatibility
with other parts or systems, of any of the products of PMC-Sierra, Inc., or any portion thereof, referred to in this document. PMC-Sierra, Inc. expressly
disclaims all representations and warranties of any kind regarding the contents or use of the information, including, but not limited to, express and implied
warranties of accuracy, completeness, merchantability, fitness for a particular use, or non-infringement.
In no event will PMC-Sierra, Inc. be liable for any direct, indirect, special, incidental or consequential damages, including, but not limited to, lost profits,
lost business or lost data resulting from any use of or reliance upon the information, whether or not PMC-Sierra, Inc. has been advised of the possibility
of such damage.
© 1999 PMC-Sierra, Inc.
PMC-990330 (P2)
Issue date: May 1999
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE