MN66271RA

advertisement
For Audio Equipment
MN66271RA
Signal Processing LSI for Compact Disc Players
Overview
(Spindle motor servo)
CLV digital servo
M
Di ain
sc te
on na
tin nc
ue e/
d
The MN66271RA is a CD signal processing LSI that,
on a single chip, combines optics servos for the CD player
(focus, tracking, and traverse servos), digital signal
processing (EFM demodulation and error correction),
digital servo processing for the spindle motor, digital
filter, and D/A converter, so thus covers all signal
processing functions from the head's RF amplifier onward.
d
pla inc
ea
ne lud
se
pla m d m es
v
ne ain ain foll
htt isit
d te t o
p:/ fo
/w llo dis disc nan enan wing
ww wi co on ce c fo
.se ng ntin tin ty e ty ur
mi UR ue ued pe pe Pro
co L a d t ty
du
n.p bo yp pe
ct
life
an ut e
d
as lat
cy
on es
cle
ic. t in
sta
co fo
ge
.jp rm
.
/en at
i
o
/
n.
Features
(Optics servo)
Focus, tracking, and traverse servos
Automatic adjustment functions for FO/TR gain,
FO/TR offset, and FO/TR balance
Built-in D/A converter for drive voltage output
Built-in dropout countermeasures
Anti-shock functions
Built-in track cross counter
Support for both linear motor and screw-based
traverse mechanisms
Support for 3- and 1-beam systems Digital Signal
Processing
Pl
int
en
an
ce
/D
isc
on
tin
ue
(Digital signal processing)
Built-in DSL and PLL
Frame synchronization detection, holding, and
insertion
Subcode data processing
Subcode Q data CRC check
Built-in subcode Q data register
CIRC error detection and correction
C1 decoder: duplex error correction
C2 decoder: triplex error correction
Built-in 16-K bits of RAM for use in deinterleaving
Audio data interpolation
Averaging or retention of previous values
Soft muting
Digital attenuation (256 levels)
Software attenuation (256 levels)
Audio data peak level detection function
Automatic cuing detection function
Digital audio interface (EIAJ format)
Audio data serial interface
Ma
(Audio circuits)
Digital filter using 8 times oversampling
Built-in D/A converter (1-bit D/A converter)
Built-in differential operational amplifier (±PWM
output)
(Other)
Built-in playback pitch control function (±13%)
Operating voltage 4.5 to 5.5 V
Applications
CD Players
BCLK
LRCK
SRDATA
DVDD1
DVSS1
TX
MCLK
MDATA
MLD
SENSE
FLOCK
TLOCK
BLKCK
SQCK
SUBQ
DMUTE
STAT
RST
SMCK
PMCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
BYTCK
CLDCK
FCLK
IPFLAG
FLAG
CLVS
CRC
DEMPH
RESY
RST2
TEST
AVDD1
OUTL
AVSS1
OUTR
RSEL
CSEL
PSEL
MSEL
SSEL
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
Pl
d
pla inc
ea
ne lud
se
pla m d m es
v
ne ain ain foll
htt isit
d te t o
p:/ fo
/w llo dis disc nan enan wing
ww wi co on ce c fo
.se ng ntin tin ty e ty ur
mi UR ue ued pe pe Pro
co L a d t ty
du
n.p bo yp pe
ct
life
an ut e
d
as lat
cy
on es
cle
ic. t in
sta
co fo
ge
.jp rm
.
/en at
i
o
/
n.
ue
ce
/D
isc
on
tin
an
en
int
Ma
M
Di ain
sc te
on na
tin nc
ue e/
d
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
VDD
X2
X1
VSS
SBCK
SUBC
PDO
PCK
EFM
AVSS2
AVDD2
VCOF
PLLF
DSLF
DRF
IREF
ARF
WVEL
PLAY
TES
MN66271RA
For Audio Equipment
Pin Assignment
(TOP VIEW)
QFS080-P-1414
LDON
BDO
RFDET
TRCRS
OFT
VDET
RFENV
TE
FE
TBAL
FBAL
VREF
FOD
TRD
KICK
ECS
ECM
PC
TVD
TRV
OFT
36
38
39
35
INPUT PORT
RFDET
BDO
VDET
37
34
A/D CONVERTER
TRCRS
RFENV
TE
32
ue
Pl
CIRC
d i ERROR CORRECTION 16K
pla DEINTERLEAVE
SRAM
n
1 BIT DAC
ea
ne clud
LOGICS
se
pla m d m es
ne aiINTERPOLATION
ain foll
htt visit
SOFT
MUTING
PWM
PWM
n
d d DIGITAL
ten te ow CLV DIGITAL
p:/ fo
(R)
(L)
AUDIO
ATTENUATION
d
n
SERVO
i
l
/SERVO
i
n
low isc scPEAK aDETECT
ww CPU
nc anc g f INTERFACE
AUTO
CUE
o
o
w. ing nt nt e e ou
se U in inu typ typ r P
mi R ue ed e e ro
co L a d t ty
du
n.p bo yp pe
ct
life
an ut e
d
OUTPUT
D/A
lat
cy
PORT
CONVERTER as
on es
cle
ic. t in
sta
co fo
ge
.jp rm
.
/en at
i
o
/
n.
INTERFACE
8 TIMES
OVER SAMPLING
DIGITAL FILTER
DIGITAL
DEEMPHASIS
+
33
SUBCODE
BUFFER
–
FE
VCO
51
AVSS2
50
AVDD2
EFM DEMODULATION
SYNC INTERPOLATION
SUBCODE DEMODULATION
DSL•PLL
53
52
48
47
45
46
44
76
78
ce
/D
isc
on
tin
MICROCOMPUTER
an
en
80
SSEL
14
SQCK
15
SUBQ
TIMING GENERATOR
PITCH CONTROL VCO
int
9
MLD
7
MCLK
8
MDATA
49
VCOF
61
BYTCK
19
SMCK
63
FCLK
20
PMCK
77
CSEL
79
MSEL
59
X2
58
X1
17
STAT
Ma
66
67
13
62
56
55
68
69
+
PCK
EFM
PLLF
DSLF
IREF
DRF
ARF
RSEL
PSEL
60
57
4
5
18
71
CLVS
CRC
BLKCK
CLDCK
SBCK
SUBC
DEMPH
RESY
VDD
VSS
DVDD1
DVSS1
RST
TEST
–
M
Di ain
sc te
on na
tin nc
ue e/
d
70
RST2
For Audio Equipment
MN66271RA
Block Diagram
75
SERVO
TIMING GENERATOR
73
6
24
23
OUTR
OUTL
74
AVSS1
72
AVDD1
65
FLAG
64
IPFLAG
TX
ECM
PC
2
LRCK
3
SRDATA
1
BCLK
16
DMUTE
21
TRV
26
KICK
29
V
25 REF
ECS
22
TVD
27
TRD
28
FOD
31
TBAL
30
FBAL
41
TES
12
TLOCK
11
FLOCK
42
PLAY
40
LDON
43
WVEL
10
SENSE
MN66271RA
For Audio Equipment
Pin Descriptions
Symbol
BCLK
I/O
O
Function Description
SRDATA bit clock output
2
LRCK
O
Left/right channel discrimination signal output
3
SRDATA
O
Serial data output
4
DV DD1
I
Power supply for digital circuits
5
DVSS1
I
Ground for digital circuits
6
TX
O
Digital audio interface output signal
M
Di ain
sc te
on na
tin nc
ue e/
d
Pin No.
1
7
MCLK
I
Microcomputer command clock input (Data is latched at rising edge.)
8
MDATA
I
Microcomputer command data input
MLD
I
Microcomputer command load signal input.
SENSE
O
Sense signal output (OFT, FESL, NACEND, NAJEND, POSAD, and SFG)
"L" level: load.
11
FLOCK
O
Focus servo convergence signal.
"L" level: convergence.
12
TLOCK
O
Tracking servo convergence signal.
"L" level: convergence.
13
BLKCK
O
Subcode block clock signal (fBLKCK =75 Hz, normal playback)
14
SQCK
I
External clock input for subcode Q register
15
SUBQ
O
Subcode Q data output
16
DMUTE
I
Muting input.
17
STAT
O
Status signal (CRC, CUE, CLVS, TTSTOP, FCLV, and SQOK)
18
RST
I
Reset input.
19
SMCK
O
d
pla inc
ea
ne lud
se
pla m d m es
v
ne ain ain foll
htt isit
d te t o
p:/ fo
/w llo dis disc nan enan wing
ww wi co on ce c fo
.se ng ntin tin ty e ty ur
mi UR ue ued pe pe Pro
co L a d t ty
du
n.p bo yp pe
ct
life
an ut e
d
as lat
cy
on es
cle
ic. t in
sta
co fo
ge
.jp rm
.
/en at
i
o
/
n.
9
10
"H" level: muting.
"L" level: reset.
If MSEL is at "H" level, 8.4672 MHz clock signal output.
If MSEL is at "L" level, 4.2336 MHz clock signal output.
PMCK
O
88.2 kHz clock signal output
21
TRV
O
Traverse forced feed output
22
TVD
O
Traverse drive output
23
PC
O
Spindle motor ON signal.
"L" level: ON.
24
ECM
O
Spindle motor drive signal (forced mode output)
3-State
25
ECS
O
Spindle motor drive signal (servo error signal output)
26
KICK
27
TRD
ce
/D
isc
on
tin
ue
20
O
Kick pulse output
O
Tracking drive output
FOD
29
VREF
O
Focus drive output
I
Reference voltage for DA output (TVD, ECS, TRD, FOD, FBAL, and
30
FBAL
O
Focus balance adjustment output
TBAL
O
Tracking balance adjustment output
FE
I
Focus error signal input (analog input)
32
int
Ma
31
en
an
28
TBAL)
TE
I
Tracking error signal input (analog input)
34
RFENV
I
RF envelope signal input (analog input)
35
VDET
I
Vibration detection signal input.
"H" level: vibration detected.
36
OFT
I
Offtrack signal input.
"H" level: offtrack.
37
TRCRS
I
Track cross signal input
38
RFDET
I
RF detection signal input.
Pl
33
"L" level: detected.
39
BDO
I
Dropout signal input.
"H" level: dropout.
40
LDON
O
Laser ON signal output.
"H" level: ON.
For Audio Equipment
MN66271RA
Pin Descriptions (continued)
Pin No.
41
Symbol
TES
I/O
O
Function Description
Tracking error shunt signal.
"H" level: shunt.
42
PLAY
O
Play signal output.
43
WVEL
O
Double-speed status signal output. "L" level: double-speed.
"H" level: play.
44
ARF
I
RF signal input
45
IREF
I
Reference current input pin
DSL bias pin
DRF
I
47
DSLF
I/O
DSL loop filter pin
48
PLLF
I/O
PLL loop filter pin
49
VCOF
I/O
VCO loop filter pin for pitch control
50
AV DD2
I
Power supply for analog circuits (DSL, PLL, and D/A converter output)
51
AV SS2
I
Ground for analog circuits (DSL, PLL, and D/A converter output)
52
EFM
O
EFM signal output
53
PCK
O
PLL derived clock output with fPCK=4.3218 MHz
54
PDO
O
Phase comparator output for EFM and PCK signals
55
SUBC
O
Subcode serial output data output
56
SBCK
I
Serial clock input for subcode serial output
57
VSS
I
Ground for oscillator circuit
58
X1
I
Crystal oscillator circuit input pin. f=16.9344 MHz.
59
X2
O
Crystal oscillator circuit output pin. f=16.9344 MHz.
d
pla inc
ea
ne lud
se
pla m d m es
v
ne ain ain foll
htt isit
d te t o
p:/ fo
/w llo dis disc nan enan wing
ww wi co on ce c fo
.se ng ntin tin ty e ty ur
mi UR ue ued pe pe Pro
co L a d t ty
du
n.p bo yp pe
ct
life
an ut e
d
as lat
cy
on es
cle
ic. t in
sta
co fo
ge
.jp rm
.
/en at
i
o
/
n.
M
Di ain
sc te
on na
tin nc
ue e/
d
46
60
VDD
I
Power supply for oscillator circuit
61
BYTCK
O
Byte clock signal output
62
CLDCK
O
Subcode frame clock signal output pin (fCLDCK=7.35 kHz)
63
FCLK
O
Crystal frame clock signal output (fFCLK=7.35 kHz)
64
IPFLAG
O
Interpolation flag signal output.
65
FLAG
O
Flag signal output
66
CLVS
O
ue
"H" level: interpolation.
ce
/D
isc
on
tin
Spindle servo phase synchronization signal output. "H" level: CLV.
"L" level: rough servo.
CRC
68
DEMPH
69
RESY
O
Subcode CRC check result output.
O
De-emphasis detection signal output.
O
Frame resynchronization signal.
"H" level: synchronized.
I
Reset pin for stopping operation of circuits past D/A converter
TEST
I
Test pin.
AV DD1
I
Power supply for analog circuits (common use for by left and right channel
RST2
Keep this pin at "H" level.
Pl
72
"H" level: ON.
int
71
Ma
70
"H" level: OK. "L" level: no good.
"L" level: out of sync.
en
an
67
audio outputs)
73
OUTL
O
Left channel audio output
74
AV SS1
I
Ground for analog circuits (common use for left and right channel audio
75
OUTR
O
Right channel audio output
76
RSEL
I
RF signal polarity selection pin.
outputs)
"H" level: bright level is "H.
"L" level: bright level is "L.
77
CSEL
I
Test pin.
Keep this pin at "L" level.
MN66271RA
For Audio Equipment
Pin Descriptions (continued)
Pin No.
78
Symbol
PSEL
I/O
I
79
MSEL
I
Function Description
Test pin.
Keep this pin at "L" level.
Frequency selection pin for SMCK pin output.
"H" level: SMCK=8.4672 MHz.
"L" level: SMCK=4.2336 MHz.
SSEL
I
SUBQ pin output mode selection pin. "H" level: buffered subcode Q mode.
M
Di ain
sc te
on na
tin nc
ue e/
d
80
Package Dimensions (Unit: mm)
16.2±0.2
14.0±0.2
60
d
pla inc
ea
ne lud
se
pla m d m es
v
ne ain ain foll
htt isit
p 2.0±0.2
fol d d d ten ten owi 0.825
0.1±0.1://
ww low isc isc an an ng
o o c ce fo
w2.1±0.3
.se ing ntin ntin e 14.0±0.2
typ ty ur
U
u
u
0.15
mi R e ed 16.2±0.2
e pe Pro
d
L
co
du
n.p abo typ type
ct
life
an ut e
d
as lat
cy
on es
cle
ic. t in
sta
co fo
ge
.jp rm
0 to 10°
.
/en at
i
o
/
n.
QFS080-P-1414
41
40
61
21
Ma
int
en
an
0.65
0.15
20
1.1±0.1
+0.10
0.3 -0.05
Pl
1
+0.10
-0.05
ce
/D
isc
on
tin
ue
80
SEATING PLANE
0.55±0.1
Request for your special attention and precautions in using the technical information and
semiconductors described in this book
(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and
regulations of the exporting country, especially, those with regard to security export control, must be observed.
(2) The technical information described in this book is intended only to show the main characteristics and application circuit examples
of the products, and no license is granted under any intellectual property right or other right owned by our company or any other
company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other
company which may arise as a result of the use of technical information described in this book.
M
Di ain
sc te
on na
tin nc
ue e/
d
(3) The products described in this book are intended to be used for standard applications or general electronic equipment (such as office
equipment, communications equipment, measuring instruments and household appliances).
Consult our sales staff in advance for information on the following applications:
– Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support
systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body.
– Any applications other than the standard applications intended.
d
pla inc
ne lud
se
pla m d m es
v
ne ain ain foll
htt isit
d te t o
p:/ fo
/w llo dis disc nan enan wing
ww wi co on ce c fo
.se ng ntin tin ty e ty ur
mi UR ue ued pe pe Pro
co L a d t ty
du
n.p bo yp pe
ct
life
an ut e
d
as lat
cy
on es
cle
ic. t in
sta
co fo
ge
.jp rm
.
/en at
i
o
/
n.
(4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product
Standards in advance to make sure that the latest specifications satisfy your requirements.
(5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions
(operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute
maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any
defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure
mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire
or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products.
(6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS,
thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which
damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages.
Pl
ea
Ma
int
en
an
ce
/D
isc
on
tin
ue
(7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of Matsushita
Electric Industrial Co., Ltd.
Download