ECE 211 Circuit Analysis II

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ECE 211 Circuit Analysis II
Fall 2016 Course Syllabus
Instructor:
Office:
Office Hours:
E-mail:
Web:
Phone:
Jon Klingensmith, Ph.D.
EB 3071
T / R 4:00-5:00 PM or by appointment
jokling@siue.edu
www.siue.edu/~jokling/
618-650-5466
Lectures:
T/R
11:00 AM – 12:15 PM
Location:
Engineering Building 2011
Description: Time-domain transient analysis, complex frequency, frequency response, twoport networks, Laplace Transform techniques, impulse response and convolution.
Prerequisites:
ECE 210 – Circuit Analysis I with a grade of C or better;
MATH 150, 152, 250 with a grade of C or better in each;
MATH 305 with a grade of C or better, OR concurrent enrollment in MATH 305.
Textbook: Engineering Circuit Analysis, Eighth Edition. Hayt, William H., Kemmerly, Jack
E., Durbin, Steven M.; 2012.
Attendance: Attendance is HIGHLY RECOMMENDED to succeed in this course. You may be
dropped from the course at any time for the following reasons:
● Failure to attend the first scheduled class.
● Missing a test or quiz without an acceptable reason.
● Missing more than one week of class.
Please inform me if you will be absent for any length of time. Long term absences should be
reported to the Dean of Students (618-650-2020), who will send out notices to all of your
instructors.
Homework / Quizzes: This class will take up a large amount of time reading and solving homework
problems. It is imperative that you keep up and work the assigned problems. It will be extremely
difficult to be successful if you do not do this. Homework will not be collected, but will be the basis
for regular (approximately weekly) quizzes. The lowest quiz score will be dropped from your grade.
Exams:
There will be two (2) exams during the semester and one comprehensive final
exam at the end of the course. No make-up exams will be given. However, if you have an
exceptional circumstance that requires you to miss an exam or quiz, please let me know as
soon as is practical and I will work with you for alternative arrangements.
Laboratories:
The hardware laboratory will consist of preliminary work, experimental
work, and reports. You are expected to have read through the entire lab and have the pre-lab
completed BEFORE the scheduled lab session. You will not have enough time to complete
the experiment if you fail to do so. After finishing the laboratory experiment, you will be
expected to abide by the following rules:
● Workstations are to be clean at the end of each session and no items may be left after
use.
● All equipment must be turned off.
● All equipment moved for the experiment must be returned to the original location.
● No circuits may be left on bread-boards.
Lab Reports:
Lab reports are required from each student after every lab. Due dates and
format will be discussed in class. Late reports will be subject to a 50% penalty.
Grading:
All grading will consider:
● Use of correct theory, approach, equation, etc.
● Proper application of theory, approach, equation, etc.
● Neatness, organization of work; it needs to be legible and understandable.
● Correct conclusion.
● Necessary assumptions.
● Mathematical correctness.
● Proper degree of accuracy and precision.
Know the information, how to approach the problem/solution, and present it in a clear and
organized manner. On a quiz or exam, you are attempting to demonstrate understanding of
concepts and the ability to solve problems. If I have to try to determine HOW you came up
with the answer, then you will NOT receive credit.
Partial Credit:
Solutions to quiz and exam problems which clearly show understanding of
the material, but have a minor error may receive partial credit. In general, the following rubric
(below) will be used as a guideline when problems are assessed. However, the final score for
that problem (either a quiz or an exam) is at the discretion of the grader.
Score
Range
10
8-9
7-8
4-7
0-4
Description
Example
Everything is correct, including all
thinking, solutions, and calculations
All circuit analysis principles are
applied correctly, but there are one or
more minor math errors
There are minor circuit analysis errors
There are major circuit analysis errors
There is little or no demonstration of
understanding
Grade Distribution:
Quizzes
20%
Exam #1
20%
Exam #2
20%
Labs
15%
Final Exam
25%
Incorrect sign from mathematical
operation
Incorrect sign from KVL or KCL
Adding V to I, etc.
The problem was not attempted
or is mostly blank with only
minimal, incorrect information
Grading Scale:
100% - 90%
89% - 80%
79% - 70%
69% - 60%
A
B
C
D
Communication with Class:
At times, I will send email to the entire class list regarding
assignments, solutions to homework, etc. I’m unable to send class related messages to any
email accounts other than your SIUE account, so please get in the habit of checking your SIUE
email, and please do not ask me to use alternative accounts.
Cheating: There will be NO TOLERANCE for cheating. Anyone caught cheating will
AUTOMATICALLY FAIL the course and risks the possibility of being expelled from the
university.
ECE 211 Circuit Analysis II
Tentative Course Outline
This schedule lists class material that is expected to be covered by the dates indicated. All
listed assignments and exams are subject to change. Any changes will be discussed in class.
The textbook sections should be read before class and homework problems are assigned
during that days’ class and should be worked prior to the next session.
Week
Topic(s)
● Syllabus / Course Discussion
● ECE 210 Review
● ECE 210 Review
● 8-2 Source Free RL Circuits
● 8-4 Source Free RC Circuits
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8-6 Unit Step Function
8-7 Driven RL Circuits
8-9 Driven RC Circuits
Problems
9-1 Source Free Parallel RLC Circuits
9-2 Overdamped Parallel RLC Circuit
9-3 Critical Damping
9-4 Underdamped Parallel RLC Circuit
9-5 Source Free Series RLC Circuit
9-6 Complete Response RLC Circuit
9-7 Lossless LC Circuit
Problems
Exam #1
14-1 Complex Frequency
14-2 Damped Sinusoidal Forcing Function
14-3 Definition of the Laplace Transform
14-4 Laplace Transforms: Time Functions
14-5 Inverse Laplace Transform Techniques
14-6 Basic Laplace Transform Theorems
14-7 Initial and Final Value Theorems
15-1 Z(s) and Y(s)
15-2 Nodal/Mesh Analysis in the S-Domain
15-3 Additional Circuit Analysis Techniques
15-4 Poles, Zeros, and Transfer Functions
15-5 Convolution
15-5 Convolution
15-6 Complex Frequency Plane
Problems / Review
Homework Assigned
Read Ch. 8
Ch. 8 HW: 8, 9, 15, 21, 22, 27,
37, 41, 45, 47, 51, 52, 54, 61,
62, 64
Read Ch. 9
Ch. 9 HW: 7, 12, 13, 17, 35, 45,
49, 51, 58, 65
Read Ch. 14
Ch. 14 HW: 13, 15, 18, 23, 26,
38, 41, 51, 58
Read Ch. 15
Ch. 15 HW: 1, 15, 17, 19, 21, 25,
37, 38, 41, 42, 43, 44
● Exam #2
● 17-2 Admittance Parameters
● 17-4 Impedance Parameters
● 17-5 Hybrid Parameters
● 16-1 Parallel Resonance
● 16-2 Bandwidth and High-Q Circuits
● 16-3 Series Resonance
● 16-6 Bode Diagrams
Final Exam
Read Ch. 17
Ch. 17 HW: 1, 11, 33, 42
Ch. 16 HW: 1, 4, 30, 31
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