Prototype of an original Single Inductor Double Output Buck-Boost with Bipolar outputs
(SIDO BBB) DC/DC converter.
Xavier BRANCA
STEricsson
Laboratoire Ampère – UMR 5005 CNRS
20, avenue Albert Einstein
69621 Villeurbanne cedex
Abstract – This paper presents an original monolithic
DC/DC converter with analogue control. This circuit
is identified to be a good candidate for supplying
capacitor-less audio amplifiers with symmetrical
positive and negative outputs in mobile devices
because of its low number of external components and
IOs and low silicon area. The fabricated prototype
works in PWM mode and achieves 80% peak
efficiency at 350mW output power.
I – Introduction
Mobile phones lead to integrate more and more
features for low-cost and to upgrade also their autonomy,
their weight and their size. The audio amplifiers, as they
are used in quite all the functions like music, games,
video, etc… are key parts of such smart phones. Today
such amplifiers need to achieve very good audio
performances (THD, SNR …) for providing High-Fidelity
sounds. The most classical AB-class amplifiers are used
to achieve sufficient audio performances but they suffer
of a poor efficiency. For moderating their impact on the
overall phone autonomy, the point is to minimize their
power voltage supply level as much as possible.
Amplifiers operate in G or H class.
Audio signal transmitted to the speakers must be
ground centered. In the past, external high-pass filters
were used to cut-off the common mode at the output of
audio amplifiers. Such filters, made of external capacitors
of a few hundred of micro farads, were huge and
expensive. Then capacitor-less AB-class amplifiers have
been developed to get rid of these capacitors. These
amplifiers avoid the use of any output common-mode
filter as they are supplied by a positive/negative
symmetrical voltage. We will present here an original
Single Inductor Double Outputs Buck-Boost with Bipolar
outputs (SIDO BBB) Switch Mode Power Supply
(SMPS) that is a good candidate for a cheap and efficient
bipolar power supply.
II – Benefits of the proposed architecture
A classical solution for supplying audio amplifiers is
to chain a step-down DC/DC converter for generating the
positive voltage and a charge-pump to inverse this
positive voltage [1]. Such a solution has a lot of
drawbacks as many external components (5 capacitors
and 1 inductor), lots of I/Os (9), large silicon area (1mm2
in a 130 nm process), the impossibility to work with a low
battery level and to generate symmetrical outputs due to
the drop-out across the charge pump.
Another solution is the bipolar charge pump [2].
Such a converter has an efficiency proportional to the
difference between Vin and Vout what is not compliant
with the input voltage (4.8 V to 2.3 V) and the output
voltage level needed by the amplifier (+/- 1.8 V or +/- 0.5
V). Such a power supply does not need any power
inductor, just 5 external capacitors, but it uses 8 Power
switches and 7 I/Os what lead to large silicon area (1 mm2
in a 130 nm Process).
Figure 1 – Footprint of possible solutions
A novel solution for generating efficiently bipolar
outputs is a so-called Single-Inductor-Double-Output
Buck-Boost with Bipolar outputs DC/DC (SIDO BBB)
[3]. This converter is a mix of a buck and a negative
buck-boost DC/DC converter. The power stage is made of
5 power switches and requires one power inductor and 3
external capacitors including the input decoupling device
(Fig. 1). Furthermore this architecture only needs 6 IOs
and can handle low input and/or output voltage as it
doesn’t suffer from any drop-out problem. It is a very
promising candidate for supplying AB-class audio
amplifier with a voltage scaling feature.
III - Presentation of the converter
For the first silicon implementation of such a
DC/DC converter, it has been decided for a Pulse Width
Modulation (PWM) operation and to verify the full-load
efficiency. Surely the same efficiency is then possible at
low output power with operation in Discontinuous
Conduction Mode (DCM) or Pulse Skipping Mode (PSK).
The power stage, made of two half bridge parts, can
be used in 6 different topologies because A, B and E
cannot be closed together in order to avoid crossconduction (Fig. 2). It is the same for C and D. The way
of combining these 6 topologies during a clock cycle were
chosen for efficient control of each output voltage level
with the less RMS current value across the stage and the
minimal switchings. No more than 3 topologies are
chained during a cycle. Four different ways of chaining
topologies have been established for covering every case
of load repartition between the two outputs.
Figure 4 – Duty cycle generation
These error signals are generated by two PID error
amplifiers. The error amplifier controlling the A-B-E half
bridge power stage is configured to minimize the error
between the sum of the two output voltages and a first
voltage reference. The second error amplifier controlling
the duty cycle of the C-D power stage is configured to
minimize the error between the difference of the two
outputs’ voltages and an other voltage reference (Fig. 5).
Figure 2 – SIDO BBB’s Power Stage
If one output does not need energy, then keeping
switches C or D closed chains only two phases. This way
the system supplies only one of its outputs exactly like a
Buck converter or a Negative Buck-Boost converter.
When the two outputs require energy, the system serve
both of them starting by the positive one and finishing the
cycle by discharging the coil across the negative output
with an intermediate phase which can be a “buck-like” or
“boost-like”, depending on the output power (Fig. 3).
Figure 5 – Synoptic of the feedback control
The compensation networks of these two error
amplifiers have been designed from an average-model of
the power stage [6] obtained from a state-space matrix
representation and using the H-infinity criterion to
optimize the global bandwidth of the system [4].
V - Test-chip measurements
A prototype of the proposed SIDO DC/DC converter
has been fabricated in a 130nm CMOS process. The
system provides output voltages from +/-0.8V to +/-1.8V
with an input voltage ranging from 4.8V to 2.7V. The
system has been designed for PWM operation. All the
power switches are integrated on a monolithic chip of 0.5
mm2.
Figure 3 – Phases topologies chaining
IV - Feedback control
The combination of topologies to be chained is
determined by the comparison of two error signals with
respect to a voltage ramp and reference voltages (Fig. 4).
The choice of topology chaining comes from the order in
which the two error signals are exceeding the ramp signal.
Figure 6 – Efficiency measurement.
Vin = 3.6 Volts, Vout = +/- 1.8 Volts.
Efficiency and load-transient response have been
measured and offer very promising results with a peak
efficiency of 80%. This is less than predicted by
simulation due to high metal access between pads and
power MOSFETs (around 200 mOhms on each IO). It has
been estimated to gain between 5 and 10% on the peak
efficiency with less resistive metal access and an
optimization of the power stage’s MOSFET size. The
low-current efficiency can be optimized with
Discontinuous conductions mode [5].
Figure 7 – Output response to a 20 kHz full scale stereo
output.
The circuit has been produced on the same silicon
die as an AB-class audio amplifier. Then it has been
possible to make the AB-class Amplifier work when
supplied by the SIDO BBB converter. Also it has been
possible to monitor the output voltage of the SIDO BBB
during a song played by the amplifier. The feedback
control is stable and offers around 150 mV of output
ripple when the two AB-class amplifiers provide both a
20 kHz sinusoidal output of 1 Vrms peak on a 16 Ohms
load (Fig. 7). There is no impact on the amplifier’s THD.
The reference response has also been measured for a
reference step from 0.8 to 1.8 V in 100us and was found
to be in line with the application requirement (Fig. 8).
PSRR measured on the board is around -55 dB at 20 kHz
on each outputs for full load on both outputs (worst case)
and reach -72 dB at 20 kHz with both outputs loaded with
1mA (Fig. 10).
Conclusions
[2]
[3]
[4]
[5]
[6]
“WM9010 Low power class G Stereo Headphone driver”, 2010,
http://www.wolfsonmicro.com/products/audio_amplifiers/WM90
10
D. Ma, W.-H. Ki, C. Y. Tsui, and P. K. T. Mok, “Single-Inductor
Multiple-Output Switching Converters with Bipolar Outputs,” in
Proc. IEEE Int. Symp. Circuits and Systems, vol. 3, May 2001,
pp.301–304.
S. Skogerstad, “Multivariable Feedback Control” Wyley
D. Ma, W.-H. Ki, C. Y. Tsui, and P. K. T. Mok, “Single-inductor
multiple-output switching converters with time-multiplexing
control in discontinuous conduction mode,” IEEE J. Solid-State
Circuits, vol. 38, pp.89–100, Jan. 2003.
R. D. Middlebrook, “Small-signal modelling of pulse-width
modulated switched-mode power converters,” Proc. IEEE, vol.
76, no. 4, pp.343–354, Apr. 1988.
Figure 8 – Output response to a 1V reference voltage
step.
Figure 9 – Test board.
This prototype gives very promising results in terms
of high current efficiency with a peak efficiency that can
be improved to 85-90%. Also the implemented control
has proven to be in line with class-H or G requirements,
and provide a very PSRR. The low output power
efficiency will be ensured by DCM operation but a way to
switch smoothly between PWM and DCM is still to be
defined.
References
[1]
“AS3561 Class-H Stereo Headphone Amplifier”, 2009,
http://www.austriamicrosystems.com/eng/Products/Audio/Headp
hone-Amplifiers/AS3561
Figure 10 – PSRR measurement on Vpos
with Ipos = Ineg = 1mA