Integrated, Low Voltage, Dynamically
Adaptive Buck-Boost Converter –
A Top-Down Design Approach
Georgia Tech Analog Consortium
Biranchinath Sahu
Advisor: Prof. Gabriel A. Rincón-Mora
Analog Integrated Circuits Laboratory
School of Electrical and Computer Engineering
Georgia Institute of Technology
Georgia Tech Analog Consortium
2
Abstract
ƒ Power-aware, portable, electronic systems incorporate algorithms for
dynamically changing the supply voltage depending on workload/throughput to extend battery life.
ƒ Single inductor, non-inverting buck-boost converters are best-suited to
generate a voltage that is higher and lower than the battery supply,
with minimum number of external components.
⇒ Dynamically-Adaptive Buck-Boost Converters
9
9
9
9
High efficiency
Low voltage
Integrated
Low noise
⇒ Improvement in battery life
⇒ Single cell operation (Li-ion/NiCd/NiMH/Fuel Cell)
⇒ ↓ External components, ↓ Cost
⇒ ↓ Interference
ƒ This work addresses the design challenges and trade-offs involved in
realizing an integrated circuit (IC) for such a system with a wide range
of supply voltage.
ƒ Lower limit – Minimum supply voltage for circuits to be operational (1.4 V)
ƒ Higher limit – Process technology constraints (5 V)
Biranchinath Sahu
School of Electrical and Computer Engineering
Georgia Institute of Technology
Georgia Tech Analog Consortium
3
Understanding the Load
Battery
Supply
3.5
Non-inverting
Buck-Boost DCDC Converter
RF input
Power
Amplifier
RF Output
Load
3
Probability (%)
Control
Signal
Output
(0.5 – 5.0 V)
Urban
Suburban
2.5
2
1.5
1
0.5
0
-50
-40
The System
ƒ
-30
-20
-10
0
10
20
Output power (dBm)
Loading Profile
The output power of the power amplifier varies over a wide range
⇒ Output voltage range of the buck-boost converter
ƒ
For WCDMA architecture, the power transmitted can increase or decrease by
1-dB is every 666 µsec
⇒ Transient requirements
ƒ
The RF power amplifier must meet its adjacent channel leakage ratio (ACLR)
and error vector magnitude (EVM) specifications
⇒ Output voltage accuracy (DC, AC, Transient) requirements
Biranchinath Sahu
School of Electrical and Computer Engineering
Georgia Institute of Technology
30
Georgia Tech Analog Consortium
4
Requirements of the Converter
Converter needs to satisfy
transient requirements
Under light-load conditions, the
converter can operated in buck-mode
with a lower switching frequency,
thereby reducing switching losses and
consequently improving system
efficiency.
Control signal
5V
Converter output voltage
ƒ
Can be operated with low
frequency, no need to meet any
transient requirements
Boost
Buck-boost
0.5 V
Buck
- 50 dBm
10 dBm
27 dBm
PA Output power
1 dB
Tpower_change
Output voltage
Linearity degradation
Tresponse
Typical transient response
Biranchinath Sahu
Time
Specifications
Value
Input voltage (VIN )
Output voltage (VOUT )
Load current [ILOAD = f (VOUT )]
Output voltage accuracy [f (VOUT )]
Load resistance
Switching frequency
Closed-loop bandwidth
1-dB step change response time
Full-load efficiency
1.4 - 4.2 V
0.4 - 4.0 V
0.03 - 0.5A
95 %
10-15 Ohms
1 MHz ± 20%
≥ 50 kHz
≤ 20 µsec
≥ 90 %
School of Electrical and Computer Engineering
Georgia Institute of Technology
Georgia Tech Analog Consortium
5
Converter Block Diagram
Vin
MP1
Vph1
L
MN1
MN3
Vph2
Vout
D2
MP2
D1
MN2
RESR
ILOAD
C
Drive and
dead-time
control
Error
amplifier
Drive and
dead-time
control
COMPBOOST
Duty
cycle limit
Feedback control
Level
shifting
circuit
Start-up and
control signal
by-pass circuit
Salient Features
→ Voltage mode control
→ Type–III compensation
→ 1 MHz switching frequency
→ 0.8 µH power inductor
→ 10 µF output capacitor with
10 mΩ ESR
Vcontrol
COMPBUCK
Triangular wave
generator
ƒ
ƒ
1
Buck/Buck-Boost/Boost Mode1 of operation for improved efficiency
Low power, sleep mode of operation for optimal efficiency
FA7618 controller as presented in US Patent No. 5,402,060 (1995) and LTC 3440 application notes (2003).
Biranchinath Sahu
School of Electrical and Computer Engineering
Georgia Institute of Technology
Georgia Tech Analog Consortium
6
Dynamic Sizing of Power MOSFETS
Common
Drain Node
1.4E+06
1.2E+06
0.5 pF
1.0E+06
3.5 pF
W/L Ratio
Vsupply
0.35 V
PMOS
NMOS
I
II
8.0E+05
III
6.0E+05
IV
4.0E+05
2.0E+05
0.25 V
0.0E+00
0.2 V
Gate Drive
Signal
UVLO
Signal
0.175 V
Battery State
Monitoring Block
ƒ
Power MOSFET sizing strategy
1.4
2.1
2.8
3.5
Battery Voltage (V)
Aspect ratio for same switch ON-resistance with
variation in supply voltage
Dynamic sizing of Power MOSFETs allow minimization of conduction and
switching losses for optimal efficiency at a given supply voltage.
ƒ Conduction loss ∝ Switch resistance ∝1/W
ƒ Switching loss ∝ Switch capacitance ∝ W
Biranchinath Sahu
4.2
School of Electrical and Computer Engineering
Georgia Institute of Technology
Georgia Tech Analog Consortium
7
Gate Drive Circuits
VIN
VGATE_MN3
VIN_MAX
MN3
VOUT < VIN - VTN
Vph2
Vph1
D2
L
2
Vout
MP2
VGATE_MP2
RESR
C
ƒ
ƒ
MP2 OFF
2
MN2 OFF
VIN_MIN
VOUT_MIN
Except the Boost PMOS switch, all the other
switches can be driven by a chain of
inverters.
For the output switch, transmission gate is
used to reduce the voltage range for which
body diode conducts.
The PMOS gate driver is powered from the
output of the converter to ensure its
operation.
Biranchinath Sahu
1
VOUT > VIN - VTN
IO
Output Switch
ƒ
VOUT = VIN - VTN
1
|VTP|
VOUT
Transmission gate operation
VOUT
PWM
Signal
Level Shift
Circuit
PMOS Drive
Circuit
VGATE_MP2
VBAT
NMOS Drive
Circuit
VGATE_MN3
Level shifting circuit for PMOS Boost Drive
School of Electrical and Computer Engineering
Georgia Institute of Technology
Georgia Tech Analog Consortium
8
Designing the Error Amplifier
Requirements of the Op-amp
ƒ
Input common-mode range (ICMR)
ƒ With |VTP|+VTN > VDD, the ICMR of NMOS
and PMOS exist only close to supply and
ground rail, respectively.
ƒ By dynamically shifting the input signal as a
function of supply voltage the input signal a
PMOS input stage can be used.
⇒ ICMR ↑, Noise ↑, Offset voltage ↑
ƒ
IX
IX
VIN+
VIN−
VCM_ref
Vout
Amain
IX
Aaux
IX
Input Offset Voltage
ƒ Error in output voltage = Offset voltage ×
Closed loop gain of the converter.
ƒ Depending on the accuracy requirement,
offset cancellation techniques can be used.
ƒ
VDD
Low voltage, large ICMR op-amp
DC Gain and Bandwidth
ƒ As DC gain ↑, steady-state error↓
ƒ UGFOPAMP >> Loop BWCONVERTER
Biranchinath Sahu
Minimum supply voltage = VT + 3 VON
sets lower limit of operation for the
integrated converter
School of Electrical and Computer Engineering
Georgia Institute of Technology
Georgia Tech Analog Consortium
9
Reducing Noise – Spread Spectrum Switching
VDD = 1.4 - 4.2 V
ƒ
MP2
COMP1
MP3
MP1
S Q
MN1
R Q
MN3
MN4
MN2
Programmable
Current Source
MP4
COMP2
The frequency of the triangular
waveform generator is changed in a
pseudo-random manner by varying
the charging and discharging current
of the capacitor.
PSIN
Triangular Wave Generator
RFIN
Circuit/System
By incorporating spread-spectrum
switching, the ripple noise voltage is
distributed over a wider frequency
band resulting in a lower side-lobe
power with respect to the signal
power.
⇒ Improved signal-to-noise ratio
RFOUT
ƒ
Biranchinath Sahu
(a)
(a)
(b)
(b)
RFIN
PSIN
RFOUT
Reduced Out-of-band distortion using switching
(a) Without spread-spectrum, (b) With spread-spectrum
School of Electrical and Computer Engineering
Georgia Institute of Technology
Georgia Tech Analog Consortium
10
Simulation Results
VIN = 2 V
Control signal
Boost
Boost
Buck
Buck/Boost
Output voltage
Inductor current
Transient Response (VIN = 2V)
VIN = 4.2 V
Control signal
Boost
Buck
Buck
Buck
Output voltage
Inductor current
Biranchinath Sahu
School of Electrical and Computer Engineering
Georgia Institute of Technology
Georgia Tech Analog Consortium
11
Summary
ƒ
ƒ
ƒ
A top-down approach for integrated circuit design of key building blocks in a
non-inverting buck-boost converter is discussed considering the challenges
involved in realizing low voltage circuits.
Performance Enhancements
ƒ Efficiency Improvement
ƒ Buck/Buck-Boost/Boost Mode of operation
ƒ Dynamic sizing of power MOSFET switches
ƒ Decreasing/Increasing the switching frequency to minimize losses
depending on the battery voltage
ƒ Accuracy
ƒ DC accuracy ⇒ Low –offset, wide input common-mode range op-amp
for error amplifier
ƒ Ripple voltage/Noise spectrum ⇒ Spread-spectrum clocking
ƒ Transient accuracy ⇒ Higher bandwidth, slew rate
Future Work: Layout and performance evaluation of the IC
Biranchinath Sahu
School of Electrical and Computer Engineering
Georgia Institute of Technology