Universal Operational
Amplifier Evaluation Module
With Shutdown
User’s Guide
1998
Mixed-Signal Products
SLVU009
IMPORTANT NOTICE
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Copyright  1998, Texas Instruments Incorporated
How to Use This Manual
Preface
Read This First
About This Manual
This User’s Guide describes the universal operational amplifier (op amp) evaluation module (EVM) with shutdown that can be used to construct many op
amp evaluation circuits. Schematics of the EVM and several example circuits
are included.
How to Use This Manual
This document contains the following chapters:
-
Chapter 1 Introduction
Chapter 2 Schematics
Chapter 3 Board Layout
Chapter 4 Example Circuits
FCC Warning
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested
for compliance with the limits of computing devices pursuant to subpart J of
part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case
the user at his own expense will be required to take whatever measures may
be required to correct this interference.
Trademarks
TI is a trademark of Texas Instruments Incorporated.
Read This First
iii
iv
Running Title—Attribute Reference
Contents
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.1
Design Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2
Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
2
Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
2.1
Area Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
3
Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1
Physical Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1 Area 100 – SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2 Area 200 – MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.3 Area 300 – SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.4 Area 400 – SOT23-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2
Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3
Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Example Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4.1
Schematic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
4.2
Sallen-Key Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
4.3
Sallen-Key High-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
4.4
Inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
4.5
Noninverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
4.6
Two Operational Amplifier Instrumentation Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8
4.7
Differential Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10
Chapter Title—Attribute Reference
3-1
3-2
3-2
3-2
3-2
3-2
3-3
3-4
v
Running Title—Attribute Reference
Figures
2–1
2–2
2–3
2–4
3–1
3–2
3–3
4–1
4–2
4–3
4–4
4–5
4–6
vi
Area 100 Schematic – SOIC (14 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Area 200 Schematic – MSOP (10 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Area 300 Schematic – SOIC (8 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Area 400 Schematic – SOT23-6 (6 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
Board Layout Top . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
Board Layout Bottom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
Sallen-Key Low-Pass Filter with Dual Supply Using Area 100 . . . . . . . . . . . . . . . . . . . . . . . 4-3
Sallen-Key High-Pass Filter with Single Supply Using Area 200 . . . . . . . . . . . . . . . . . . . . . 4-5
Inverting Amplifier with Dual Supply Using Area 300 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
Noninverting Amplifier with Single Supply Using Area 400 . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
Two Operational Amplifier Instrumentation Amplifier with Single Supply
Using Area 200 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
Single Operational Amplifier Differential Amplifier with Single Supply
Using Area 300 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10
Chapter 1
Introduction
This User’s Guide describes a universal operational amplifier (op amp)
evaluation module (EVM) with shutdown (#SLOP224). The EVM simplifies
evaluation of Texas Instruments surface-mount op amps with the shutdown
feature.
Topic
Page
1.1
Design Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2
1.2
Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2
Introduction
1-1
Design Features
1.1 Design Features
The board design allows many circuits to be constructed easily and quickly.
The board has four circuit development areas that can be snapped apart.
Areas 100 and 200 are for dual op amps in the SOIC and MSOP packages.
Area 300 is for single op amps in SOIC packages. Area 400 is for single op
amps in SOT23-6 packages. A few possible circuits are as follows:
-
Voltage follower
Noninverting amplifier
Inverting amplifier
Simple or algebraic summing amplifier
Difference amplifier
Current to voltage converter
Voltage to current converter
Integrator/low-pass filter
Differentiator/high-pass filter
Instrumentation amplifier
Sallen-Key filter
Two-layer board construction with a ground plane on the solder side ensures
that circuit performance will be on par with final production designs.
1.2 Power Requirements
The devices and designs that are used dictate the input power requirements.
Three input terminals are provided for each area of the board:
Vx+
GNDx
Vx–
Positive input power for area x00 i.e., V1+ ⇒ area 100
Ground reference for area x00
i.e., GND2 ⇒ area 200
Negative input power for area x00 i.e., V4– ⇒ area 400
Each area has four bypass capacitors – two for the positive supply, and two
for the negative supply. Each supply should have a 1-µF to 10-µF capacitor for
low frequency bypassing and a 0.01-µF to 0.1-µF capacitor for high frequency
bypassing.
When using single-supply circuits, the negative supply is shorted to ground by
bridging C112 or C113 in area 100, C212 or C213 in area 200, C305 or C306
in area 300, or C405 or C406 in area 400. Power input is between Vx+ and
GNDx. The voltage reference circuitry is provided for single-supply
applications that require a reference voltage to be generated.
1-2
Introduction
Chapter 2
Schematics
This chapter contains schematics and pin-outs for each of the four areas.
Topic
2.1
Page
Area Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1
Schematics
2-1
Area Schematics
2.1 Area Schematics
Figures 2–1 through 2–4 show schematics for each of the board areas. The
schematics show all components that the board layout can accommodate.
These should only be used as reference, since not all components will be used
at any one time.
Figure 2–1. Area 100 Schematic – SOIC (14 pin)
C106
R119
V1+
R121
R106
C115
A101–
V1+
C104
V1+
R110
C105
A102–
GND1
R109
R120
A103+
C112
C113
14
2
–
3 +
R108
A104+
V1–
Power Supply Bypass
6
4
A1/SD
1
U101a
V1–
V1–
C114
A1OUT
1/2 Dual Op Amp
R107
A1 FLT
C108
R118
C107
V1+
C102
R113
R115
VREF1
R103
R104
C109
B101–
R116
R
C111
C
U102
A
R102
B102–
R101
12
R112
B103+
–
11 +
13
U101b
R111
R117
B1/SD
9
B1OUT
1/2 Dual Op Amp
B104+
R105
Voltage Reference
R114
C110
B1 FLT
C103
C101
U101 pins 5, 7, 8, and 10 = NC
2-2
Schematics
Area Schematics
Figure 2–2. Area 200 Schematic – MSOP (10 pin)
C206
R219
V2+
R221
R206
C215
A201–
V2+
C204
V2+
R210
C205
A202–
GND2
R209
2
R220
A203+
C212
C213
3 +
A204+
1
4
R208
V1–
5
10
–
U201a
A2/SD
A2OUT
1/2 Dual Op Amp
V2–
R207
Power Supply Bypass
V2–
C214
R218
A2 FLT
C208
C207
V2+
C202
R213
R215
VREF2
R203
R204
C209
B201–
R216
R
6
C211
C
U202
A
R202
B202–
R201
8
R212
B203+
7
9
+
U201b
R211
R217
B2/SD
–
B2OUT
1/2 Dual Op Amp
B204+
R205
Voltage Reference
R214
B2 FLT
C203
C210
C201
Schematics
2-3
Area Schematics
Figure 2–3. Area 300 Schematic – SOIC (8 pin)
C301
R301
V3+
V3+
R303
C304
301–
C303
V3+
R304
302–
GND3
C305
R302
C302
C306
R308
2
R307
303+
V3–
7 8
–
6
3 +
4
R309
304+
Power Supply Bypass
3/SD
3OUT
U301
V3–
V3–
R305
3 FLT
R306
C309
C307
V3+
R312
C308
VREF3
R311
R
C310
C
U302
A
U301 pins 1 and 5 = NC
R310
Voltage Reference
Figure 2–4. Area 400 Schematic – SOT23-6 (6 pin)
V4+
R403
C404
C403
V4+
R404
402–
C406
R408
4
R407
403+
V4–
R409
404+
Power Supply Bypass
R402
C402
401–
GND4
C405
C401
R401
V4+
5
6
–
3 +
1
2
4OUT
U401
V4–
V4–
4/SD
R405
4 FLT
C407
C409
V4+
R412
C408
VREF4
R411
R
C
R406
C410
U402
A
R410
Voltage Reference
2-4
Schematics
Chapter 3
Board Layout
This chapter shows the universal op amp EVM with shutdown board layout,
and describes the relationships between the four areas.
Topic
Page
3.1
Physical Consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2
3.2
Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3
3.3
Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4
Board Layout
3-1
Physical Considerations
3.1 Physical Considerations
The EVM board has four circuit development areas. Each area can be
separated from the others by breaking along the score lines. The circuit layout
in each area supports an op amp package, voltage reference, and ancillary
devices. The op amp package is unique to each area as described in the
following paragraphs. The voltage reference and supporting devices are the
same for all areas. Surface-mount or through-hole components can be used
for all capacitors and resistors on the board.
The voltage reference can be either surface-mount or through-hole. If surface
mount is desired, the TLV431ACDBV5 or TLV431AIDBV5 adjustable shunt
regulators can be used. If through hole is desired, the TLV431ACLP,
TLV431AILP, TL431CLP, TL431ACLP, TL431ILP or TL431AILP adjustable
shunt regulators can be used. Refer to Texas Instruments’ Power Supply
Circuits Data Book (literature number SLVD002) for details on usage of these
shunt regulators.
Each passive component (resistor or capacitor) has a surface mount 1206
footprint with through holes at 0.2″ spacing on the outside of the 1206 pads.
Therefore, either surface-mount or through-hole parts can be used.
3.1.1
Area 100 – SOIC
Area 100 uses 1xx reference designators, and is compatible with dual op amps
with shutdown packaged as a 14-pin SOIC. This surface-mount package is
designated by a D suffix in TI part numbers, as in TLV2463CD, TLV2363ID,
TLV2263AID, etc. Refer to Figure 2–1 for a schematic.
3.1.2
Area 200 – MSOP
Area 200 uses 2xx reference designators, and is compatible with dual op amps
with shutdown packaged as a 10-pin MSOP. The MSOP package is
designated by a DGS suffix in TI part numbers, as in TLV2463CDGS. Refer
to Figure 2–2 for a schematic.
3.1.3
Area 300 – SOIC
Area 300 uses 3xx reference designators, and is compatible with single op
amps with shutdown packaged in the 8-pin SOIC package. This surfacemount package is designated by a D suffix in TI part numbers, as in
TLV2461CD. Refer to Figure 2–3 for a schematic.
3.1.4
Area 400 – SOT23-6
Area 400 uses 4xx reference designators, and is compatible with single op
amps with shutdown packaged in the 6-pin SOT-23 package. This
surface-mount package is designated by a DBV suffix in TI part numbers, as
in TLV2460CDBV. Refer to Figure 2–4 for a schematic.
3-2
Board Layout
Component Placement
3.2 Component Placement
Figure 3–1 shows component placement for the EVM board.
Figure 3–1. Component Placement
Area 100
Area 300
18
R218
R219
R220
C215
R221
SLOP224–2
C211
R215
R216
C212
C213
C214
R217
UNIVERSAL OPAMP EVM W/SHUTDOWN
C206
R206
C207
R207
C208
R208
R209
R210
U202
U302
R312
C310
V2+ GND2 GND4 V4+
C410
R410
R411
U402
R412
11
C405
C406
R405
C407
C408
C409
R406
R407
R408
R409
VREF3
301–
302–
V3+
GND3
V3–
3FLT
3OUT
303+
304+
3/SD
1 J301
Texas Instruments, 1998
REV 2
REV 2
V2+ GND2 GND4 V4+
R401
C401
R402
C402
R403
R404
C403
C404
MSOP
U201
R211
C209
R212
R213
C210
R214
UNIVERSAL OPAMP EVM W/SHUTDOWN
B204+
B203+
B202–
B201–
B2_OUT
B2_FLT
V2+
B2/SD
VREF2
GND2
A2/SD
V1–
A2_OUT
A2_FLT
A204+
A203+
A202–
A201–
R201
C201
R202
R203
R204
C202
R205
C203
C204
C205
SLOP224–3
U301
V1+ GND1 GND3 V3+
Texas Instruments, 1998
J201
1
C305
C306
R305
C307
C308
C309
R306
R307
R308
R309
SOIC
SLOP224–1
UNIVERSAL OPAMP EVM W/SHUTDOWN
R118
R119
R120
C115
R121
R310
R311
11
U401
Score Line
C111
R115
R116
C112
C113
C114
R117
SLOP224–4
18
C106
R106
C107
R107
C108
R108
R109
R110
U102
SOT23–6
U101
R111
C109
R112
R113
C110
R114
Texas Instruments, 1998
REV 2
REV 2
V1+ GND1 GND3 V3+
R301
C301
R302
C302
R303
R304
C303
C304
SOIC
B104+
B103+
B102–
B101–
B1_OUT
B1_FLT
V1+
B1/SD
VREF1
GND1
A1SD
V1–
A1_OUT
A1_FLT
A104+
A103+
A102–
A101–
R101
C101
R102
R103
R104
C102
R105
C103
C104
C105
UNIVERSAL OPAMP EVM W/SHUTDOWN
Texas Instruments, 1998
J101
1
VREF4
401–
402–
V4+
GND4
V4–
4FLT
4OUT
403+
404+
4/SD
1 J401
Score Line
Area 200
Area 400
Board Layout
3-3
Board Layout
3.3 Board Layout
Figures 3–2 and 3–3 show the EVM top and bottom board layouts,
respectively.
Figure 3–2. Board Layout Top
3-4
Board Layout
Board Layout
Figure 3–3. Board Layout Bottom
Board Layout
3-5
3-6
Board Layout
Chapter 4
Example Circuits
This chapter shows and discusses several example circuits that can be
constructed using the universal operational amplifier EVM. The circuits are all
classic designs that can be found in most operational amplifier design books.
Topic
Page
4.1
Schematic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–2
4.2
Sallen-Key Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3
4.3
Sallen-Key High-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–5
4.4
Inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–7
4.5
Noninverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–8
4.6
Two Operational Amplifier Instrumentation Amplifiers . . . . . . . . . . . 4–9
4.7
Differential AMplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–11
Example Circuits
4-1
Schematic Conventions
4.1 Schematic Conventions
Figures 4–1 through 4–6 show schematic examples of circuits that can be
constructed using the universal operational amplifier EVM with shutdown. The
components that are placed on the board are shown in bold. Unused
components are blanked out. Jumpers and other changes are noted. These
examples are only a few of the many circuits that can be built.
4-2
Example Circuits
Sallen-Key Low-Pass Filter
4.2 Sallen-Key Low-Pass Filter
Figure 4–1 shows area 100 equipped with a dual operational amplifier
configured as a second-order Sallen-Key low-pass filter using dual-power
supplies.
Basic setup is done by proper choice of resistors R and mR, and capacitors
C and nC. The transfer function is:
V
OUT
V IN
Where:
+
1
ǒ ń Ǔ ) ǒjńQǓǒfńfoǓ
1 – f fo
2
fo
+ 2p Ǹm1 n RC
Q
+ mǸm) n1
And
Figure 4–1. Sallen-Key Low-Pass Filter with Dual Supply Using Area 100
R119
C106
R106
R121
V1+
C115
Jumper
A101–
Vout
Vin
V1+
C104
0.1 µ F
C105
10 µ F
A102–
C113
10 µ F
2
R109
R120
mR
R
–
A104+
V1–
R108
Power Supply Bypass
V1–
fo =
1
2π √mn RC
Q=
√mn
m+1
+
C114
Vin
R118
–
R107
A1 FLT
C107
C108
nC
V1+
R113
C102
R115
R104
VREF1
R103
C109
B101–
R114
R
C
U102
A
C111
R102
B102–
B103+
R117
R101
Jumper
12
R112
9
B1/SD
–
11 +
13
U101b
R111
B1OUT
1/2 Dual Op Amp
B104+
Voltage Reference
Not Used
Jumper
V1–
C112
0.1 µ F
A103+
1
1– (f/fo)2 + (j/Q)(f/fo)
V1+ 6
A1/SD
14
1
A1OUT
3 +
U101a
4
1/2 Dual Op Amp
R110
GND1
=
Not Used
R114
C110
R105
B1 FLT
C103
C101
Example Circuits
4-3
Sallen-Key High-Pass Filter
4.3 Sallen-Key High-Pass Filter
Figure 4–2 shows area 200 equipped with a dual operational amplifier configured as a second-order Sallen-Key high-pass filter using single-supply power
input.
Basic setup is done by proper choice of resistors R and mR, and capacitors
C and nC. Note that capacitors should be used for components R211 and
R212, and a resistor for C201. The transfer function for the circuit as shown
is:
V OUT
Where:
+ VIN
ȡȧ ǒ ń Ǔ
Ȣ ) ǒ ń Ǔǒ ń Ǔ
– f fo
1
fo
+ 2p Ǹm1 n RC
Q
+ nǸm) n1
And
2
ȣȧ)
ǒń Ǔ Ȥ
j Q f fo – f fo
2
VREF2
The TL431 adjustable precision shunt regulator, configured as shown,
provides a low impedance reference for the circuit at about 1/2 V2+ in a 5 V
system. Another option is to adjust resistors R216 and R217 for the desired
VREF2 voltage. The formula for calculating VREF2 is:
VREF2
4-4
ǒ
Ǔ
+ 2.50 V R216R)217R217
Example Circuits
Sallen-Key High-Pass Filter
Figure 4–2. Sallen-Key High-Pass Filter with Single Supply Using Area 200
R219
C206
V2+
R206
R221
Jumper
C204
0.1 µF
C205
10 µF
R210
A202–
R209
R220
A203+
C212
C213
R208
A204+
Power Supply Bypass
A2/SD
A2OUT
1/2 Dual Op Amp
Not Used
V2–
Jumper
V1–
Jumper
V2+
5
10
2
–
1
3 +
U201a
4
A201–
V2+
GND2
C215
V2–
C214
R218
R207
A2 FLT
C207
C208
R213
R204
VREF2 = 2.5 V
R203
C209
R202
R215
Jumper
2.2 kΩ
B202–
8
R201
7
B204+
R
C211
10 µF B203+
C
A
U202
TL431ACLP
mR
R211
C
+
R217
Vin
Voltage Reference
VOUT = VIN
6
–
9
+
U201b
1+(j/Q)(f/fo) – (f/fo)2
+ VREF2
B2/SD
B2OUT
1/2 Dual Op Amp
R212
fo =
1
2π √mn RC
Q=
√mn
m+1
nC
C210
R214
R205
–
Jumper B204 + to VREF2
–(f/fo)2
Jumper
B201–
V2+
R216
C202
B2 FLT
C201
C203
R
Example Circuits
4-5
Inverting Amplifier
4.4 Inverting Amplifier
Figure 4–3 shows area 300 equipped with a single operational amplifier configured as an inverting amplifier using dual power supplies.
Basic setup is done by choice of input and feedback resistors. The transfer
function for the circuit as shown is:
V OUT
+ –VIN RR302
304
To cancel the effects of input bias current, set R306 = R302 || R304, or use a
0-Ω jumper for R306 if the operational amplifier is a low input bias operational
amplifier.
Figure 4–3. Inverting Amplifier with Dual Supply Using Area 300
C301
R301
V3+
R303
R302
VOUT = –VIN
R304
301–
V3+
C304
0.1 µF
V3+
C303
10 µF
R304
302–
GND3
V3–
R302
C302
C305
0.1 µF
2
R308
R307
R309
Jumper
303+
C306
10 µF
+ 304+
–
3 +
7
8
6
4
U301
V3–
Vin
Power Supply Bypass
V3–
–
C309
3/SD
3OUT
R306 = R302 II R304,
or Short if Using Low
Input Bias Op Amp
R306
R305
3 FLT
V3+
C308
C307
R312
VREF3
R311
R
C
U302
C310
A
R310
Voltage Reference
Not Used
4-6
Example Circuits
Noninverting Amplifier
4.5 Noninverting Amplifier
Figure 4–4 shows area 400 equipped with a single operational amplifier
configured as a noninverting amplifier with single-supply power input.
Basic setup is done by choice of input and feedback resistors. The transfer
function for the circuit as shown is:
V
OUT
ǒ
Ǔ
+ VIN 1 ) RR402
) VREF4
404
The input signal must be referenced to VREF4.
To cancel the effects of input bias current, set R409 = R402 || R404, or use a
0-Ω jumper for R409 if the operational amplifier is a low input bias operational
amplifier.
The TL431 adjustable precision shunt regulator, configured as shown,
provides a low impedance reference for the circuit at about 1/2 V4+ in a 3 V
system. Another option is to adjust resistors R410 and R411 for the desired
VREF4 voltage. The formula for calculating VREF4 is:
VREF4
ǒ
Ǔ
+ 1.24 V R411R)410R410
Figure 4–4. Noninverting Amplifier with Single Supply Using Area 400
V4+
R401
C401
V4+
C404
0.1 µF
V4–
R403
C405
R402
C402
401–
C406
R404
4
402–
R408
403+
R407
R409
Power Supply Bypass V4–
(
V4+
Jumper 402 – to VREF4
Jumper
GND4
C403
10 µF
–
3 +
VOUT = VIN +1
6 5
1
2
R405
R407
) + VREF4
4/SD
4OUT
U401
404+
V4–
V4+
+
C409
R406
Vin
R414
2.2 kΩ
R405
–
4 FLT
Jumper
VREF4 = 1.24 V
C408
C
R
C407
C410
10 µF
R411
U402 = TLV431ACDBV5
A
Input Signal With
Reference to VREF4
R409 = R402 II R404,
or Short if Using Low Input
Bias Op Amp
R410
Voltage Reference
Example Circuits
4-7
Two Operational Amplifier Instrumentation Amplifier
4.6 Two Operational Amplifier Instrumentation Amplifier
Figure 4–5 shows area 200 equipped with a dual operational amplifier configured as a two-operational-amplifier instrumentation amplifier using a voltage
reference and single power supply.
Basic setup is done by choice of input and feedback resistors. The transfer
function for the circuit as shown is:
V
OUT
Where
ǒ
Ǔ
206 ) R206 ) VREF2
+ VIN 1 ) 2RR210
R221
R206 = R202 and R221 = R204
To cancel the effects of input bias current, set R208 = R206 || R210 and set
R211 = R202 ||R204, or use a 0-Ω jumper for R208 and R211 if the operational
amplifier is a low input bias operational amplifier.
The TLV431 adjustable precision shunt regulator, configured as shown,
provides a low impedance reference for the circuit at about 1/2 V2+ in a 3 V
system. Another option is to adjust resistors R216 and R217 for the desired
VREF2 voltage. The formula for calculating VREF2 is:
VREF2
4-8
ǒ
Ǔ
+ 1.24 V R216R)217R217
Example Circuits
Two Operational Amplifier Instrumentation Amplifier
Figure 4–5. Two Operational Amplifier Instrumentation Amplifier with Single Supply Using
Area 200
C206
R219
Jumper A201 – to B2OUT
R206
R221
R208 = R206 II R210
or Short if Using Low Input
Bias Op Amp
C215
Jumper
R210
A202–
V2+
R209
V1–
10 5
–
1
3 +
U201a
4
R220
R208
A204+
Jumper
GND2
V2+
2
A203+
V2+
C204
0.1 µF
C212
C214
Jumper
A202– to B201–
C213
R218
V2–
C202
Jumper VREF2 to B202–
R203
Jumper
B201–
Jumper
B202–
A
C211
10 µF
B203+
TLV431ACDBV5
R217
Voltage Reference
R204
C209
Jumper
R202
U202
C208
Vin
R215
2.2 kΩ
VREF2 = 1.24 V
R
R207
C207
R213
C
1/2 Dual Op Amp
A2 FLT
–
R216
A2/SD
A2OUT
R206 = R202
R221 = R204
C205
10 µF
Power Supply Bypass
)+ VREF2
V2–
+
V2+
(
2R206
R206
VOUT = Vin 1+ R210 + R221
A201–
R201
8
R212
7
6
–
+
B2/SD
9
U201b
B2OUT
1/2 Dual Op Amp
R211
B204+
R211 = R202 II R204
or Short if Using Low Input
Bias Op Amp
R214
C210
R205
B2 FLT
C201
C203
Example Circuits
4-9
Differential Amplifier
4.7 Differential Amplifier
Figure 4–6 shows area 300 equipped with a single operational amplifier
configured as a differential amplifier using a voltage reference and single
power supply.
Basic setup is done by choice of input and feedback resistors. The transfer
function for the circuit as shown is:
V
OUT
Where
R302
R304
ǒ Ǔ)
+ VIN
R302
R304
VREF3
+ RR309
308
The TLV431 adjustable precision shunt regulator, configured as shown,
provides a low impedance reference for the circuit at about 1/2 V3+ in a 3 V
system. Another option is to adjust resistors R311 and R310 for the desired
VREF3 voltage. The formula for calculating VREF3 is:
VREF3
ǒ
Ǔ
+ 1.24 V R311R)310R310
Figure 4–6. Single Operational Amplifier Differential Amplifier with Single Supply Using
Area 300
R301
C301
V3+
R302
R303
301–
V3+
Jumper
C304
0.1 µF
GND3
C302
C305
C306
+
R304
302–
Vin
303+
–
R308
R319
R309
Jumper
2
–
3 +
304+
V3–
Power Supply Bypass
R302
Vout = Vin
R304
(
V3+
C303
10 µF
7 8
6
4
) + VREF3
3/SD
3OUT
U301
V3–
R302
R309
=
R304
R308
V3–
C309
V3+
R306
R305
3 FLT
R312
2.2 kΩ
C308
VREF3 = 1.24 V
R311
R
C310
10 µF
C
A
C307
Jumper 304+ to VREF3
U302
TLV431ACDBV5
R310
Voltage Reference
4-10
Example Circuits