TI Designs
Capacitor Bank Switching and HMI Subsystem Reference
Design for Automatic Power Factor Controller
TI Designs
Design Features
This TI Design demonstrates the working of various
functional blocks of an automatic power factor
controller used in mid- to low-voltage electrical
distribution, including accurate measurement and
computation of voltages, currents, power, and power
factor; display of measured parameters using 4-digit 7segment display; alarms and status indications using
LEDs; switching outputs for driving contactor or
thyristor for switching capacitor banks; and monitoring
local and remote temperature using a breadth of
products from TI’s portfolio. An ambient light sensor is
included for 7-segment LED display brightness control.
The design is made modular with provision for
expanding the system features including
communication, harmonics computation, and storage
of system alarms.
•
•
•
•
•
Design Resources
Design Folder
TIDA-00737
TLC5916
TLC59025
ISO7340C
TPL7407L
DRV8803
OPT3001
TPS7A4101
TMP451EVM
MSP430F67791A
TIDA-00454
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TIDA-00737
5.0 V
3.3 V
SDO
5.0 V
DISPLAY
PNP
4
TLC5916
(x4)
(8 Ch. LED Driver)
LIGHT AND
TEMP SENSOR
Featured Applications
SDI
3.3 V
TIDA-00454
3.3 V
MSP430F67791A
OPT3001
I2C
(Ambient Light Sensor)
SCL
K
I2C
SDO
TLC5916
OE, LE
Accurate Measurement of 3 Φ Voltage, Current,
Power, and Power Factor
Accuracy < ±0.5% Achieved Using Simultaneous
Sampling, 24-Bit Sigma-Delta ADCs
7-Segment LED Display (SSD)
– Two Constant-Current Drivers are Cascaded to
Drive Display With Decimal Point
Relay and Transistor Output Switching
– Three Channels (Expandable to Seven) for
Controlling Relay Output (Contactors)
– Two Channels (Expandable to Four), With
Isolation for Controlling Transistor Output
(Thyristors)
Status Indication: 16 LEDs Controlled Using
Constant-Current LED Sink Driver
– Eight LEDs Indicate Phase, Parameter Being
Displayed and Power Factor Direction
(Lead/Lag)
– Five LEDs Indicate Capacitor Bank Steps
– Three LEDs Indicate Different Alarm Conditions
Temperature and Ambient Light Sensors
– Option to Measuring Remote (or Local)
Temperature for Capacitor Bank Panel
Temperature Measurement
– Ambient Light Sensor to Control 4-Digit SSD
Intensity
Extended Features (TIDA-00454 Board)
– Polyphase Metering System-on-Chip Library
Tailored for Advanced Power Quality Analysis
– Four Configurable Universal Asynchronous
Receiver Transmitter Ports Connector (for
Implementing RS-232 and RS-485 Interface)
8
(8 Ch. LED Driver)
SDI
3.3 V
SPI/
TMP451EVM
I2C
Remote/ Local Temperature
Sensor EVM
•
•
5.0 V
STATUS/ ALARM
GPIO
3.3 V
I2C
SPI, OE, LE
x
8
x
8
TLC59025
16
(16 Ch. LED
Driver)
Power Factor Controller (PFC)
Reactive Power Control (RPC) Relay
MEASUREMENT
CONTACTOR/
THYRISTOR DRIVE
12 V
V3
V2
V1
I3
I2
CH 5
3
CH 4
3
24 V
RELAY
GPIO
CH 3
CH 2
TPL7407L
(7 Ch. Relay
Driver)
24 V
5.0 V
Sig-Del
ADC
TPS7A4101
3.3 V
(LDO)
(24 Bit)
4
CH 1
I1
ISO7340C
(DIGITAL ISO - 4/
0)
4
DRV8803
(QUAD DRIVER)
CH 0
UART
NOTE:
External boards: TIDA-00454, TMP451EVM
2
THYRISTOR
CONTROL
MODULE
CONNECTOR
(COMMUNICATIONS)
A
All trademarks are the property of their respective owners.
TIDUB67A – December 2015 – Revised March 2016
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Capacitor Bank Switching and HMI Subsystem Reference Design for
Automatic Power Factor Controller
Copyright © 2015–2016, Texas Instruments Incorporated
1
System Description
www.ti.com
An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and other
important disclaimers and information.
1
System Description
1.1
Active and Reactive Power
In any electric system, the phase difference between the voltage and current is dependent on the nature
of the load as well as the type of current flowing through the system.
In direct current (DC) circuits, where current flows in one direction, the voltage and current are in phase
and only dissipates "real" power, which is the product of voltage and current.
In alternating current (AC) systems, where the current reverses direction, the nature of the load introduces
a phase difference between the voltage and current. The current, with respect to voltage, will be in phase
for purely resistive loads, lead by 90° for purely capacitive loads, and lag by 90° for purely inductive loads.
The effective load (vectorial combination of all load elements) introduces a net phase difference between
voltage and current, which in turn results in two different types of power consumption in AC systems.
iR
eI
iC
eR
eC
eZ
iI
iZ
Figure 1. V, I Phasor (Resistive, Capacitive, Inductive, Combinational Loads in AC Systems)
In-phase current component (iZ × cos(θ)) results in the real component of power and the out-of-phase
current (iZ × sin(θ)) results in imaginary component of power. The following summarizes various types of
power in an AC system:
• Active power (P): Active power (ϑZ × iZ × cos(θ)), expressed as watts (W), is the "real" power used by
all electrical load to perform the work of heating, lighting, moving, and so on. The direction of energy
flow is always in one direction. Resistive component of the transducers in the load use this energy for
converting it into other forms or useful energy.
• Reactive power (Q): Reactive power (ϑZ × iZ × sin(θ)), expressed as volt-amperes-reactive (var), is
often referred to as "non-working" power. This power is used for storing and reversing energy as
magnetic or electrostatic field in the reactive elements of the load. The direction of energy flow
reverses as a portion of the energy stored is returned by the reactive elements.
• Apparent power (S): Apparent power, expressed as volt-amperes (VA), is the vectorial combination of
active and reactive power. The ratio between these two types of loads becomes important as more
inductive equipment is added.
2
Capacitor Bank Switching and HMI Subsystem Reference Design for
Automatic Power Factor Controller
TIDUB67A – December 2015 – Revised March 2016
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System Description
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1.2
Power Factor
Power factor (PF) is the ratio of active power (P) to apparent power (S), expressed as W/VA. PF
measures how effectively the current is being converted into useful work output and indicates the effect of
the load current on the efficiency of the supply system.
Most of the commercial and industrial installations have heavy electrical loads such as motors, machines,
air conditioners, drivers, and so on, which are inductive in nature. Introducing inductive loads results in a
"lagging" PF. The reactive power results from the current and voltage waveforms being out of phase with
each other.
1.3
Significance of Reactive Power
Reactive power increases the burden on the generation and transmission networks. Introduced by
inductive and capacitive loads, higher reactive power translates to higher current for a given active power.
This results in rise in temperature in the power cable, which leads to higher power losses in the
distribution networks.
With proper matching, the reactive element of the load can be balanced, thereby minimizing the reactive
power. Managing reactive power properly results in reduced energy consumption.
1.4
Improving PF
If inductors and capacitors are connected in parallel, then the inductive current will be out of phase with
the capacitive current by 180°. With proper sizing of the capacitor, the leading capacitive current
introduced can neutralize the lagging inductive current (and vice versa) thereby reducing the reactive
current considerably in the circuit. This is the essence of improving the PF.
For residential customers, inductive loads such as motors or transformers found in common household
appliances and air conditioners are compensated with built-in capacitors; therefore, no external PF
correction is needed. However, for large industrial customers the PF could vary widely.
PF can be improved by using various methods: adding capacitor banks close to the inductive motors,
filtering input to remove harmonics, running synchronous motors to provide capacitive loading, and so on.
Capacitors are often used as they are readily available and can be installed at multiple points in an
electrical system. There are two ways for capacitive compensation:
• Fixed compensation: If the load reactance profile is fixed and steady, then fixed compensation can be
applied by using a known capacitance value. The reactive power supplied in this case is constant
irrespective of any variations in the PF of the load. These capacitor banks are switched on either
manually (using circuit breaker or switches) or semi-automatically by a remote-controlled contactor.
• Automatic power factor correction (APFC): For loads that require varying reactive power, APFC is
used. Also, under light load conditions, a fixed capacitor provides a leading power factor. APFC panels
are used in industries or in the distribution network for APFC.
TIDUB67A – December 2015 – Revised March 2016
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Capacitor Bank Switching and HMI Subsystem Reference Design for
Automatic Power Factor Controller
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3
System Description
1.5
APFC Panel for Automatic Control of PF
•
•
•
•
•
•
1.6
www.ti.com
PFC: PFCs measure voltage and current, calculates the reactive and active power, and switches
capacitors depending on the reactive power that needs to be corrected. APFCs have 6 to 16 relay
steps for capacitor bank switching.
External current transformer (CT): Due to large currents that are required to be measured, external
CTs are used for monitoring industrial loads. CT steps down the primary current to a standardized 1- or
5-A secondary current. This secondary current is measured by the APFC to determine the primary
current.
Capacitor bank: The capacitor bank is a critical component of APFC panel. Each capacitor can be
individually fused with an appropriately sized current limit fuse.
Capacitor bank switching:
– Conventional switching — Contactor: Contactors are electrically controlled switches for handling
higher currents. They are used when the variation in reactive power is slow and the capacitor
switching interval is in increments of seconds. Capacitors draw very large transient currents when
they are switched in and out. Use caution as an oscillating inrush current can cause their failure,
and too high currents can even fuse certain contacts. Capacitor duty contactors have additional
auxiliary contacts with current limiting resistors (pre-charging resistors) in series. The auxiliary
contacts come on first, and then the main contacts take over the steady state current of the
capacitors. Also, the capacitor are completely discharged before reconnecting to avoid premature
failure.
– Dynamic switching — Thyristor switching module (TSM): A TSM is used when the load variation is
rapid for applications like presses, cranes, lifts, spot welding, plastic extrusion, and so on. They are
also effective in eliminating inrush current of capacitors as they can be made to switch on when the
voltage across the thyristor is zero.
Auxiliary power supply: The APFC panel will have an auxiliary power supply that powers its various
functional blocks.
Exhaust fans: The APFC panel has a number of capacitor banks and busbars that carry large currents.
Exhaust fans are used to maintain the temperature of the APFC panel.
TIDA-00737
This TI Design demonstrates the working of various blocks that are typically used in the APFC in an
optimized way with flexibility to expand.
• Multiplexed 4-digit SSD with the decimal point (DP) controlled by two cascaded 8-bit constant-current
LED sink drivers (with intensity control) with SPI
• 16 LEDs for status and alarm indication using a single 16-bit LED driver with SPI
• Low-side driver for switching relays (driver rated up to 40 V)
• Isolated transistor outputs to switch thyristors using digital isolator and low-side driver (driver rated up
to 60 V)
• Ambient light sensor for intensity control of SSD
• Three-phase voltages and currents measurement and computation of active, reactive, and apparent
power and PF
• Remote temperature sensor for temperature alarm
4
Capacitor Bank Switching and HMI Subsystem Reference Design for
Automatic Power Factor Controller
TIDUB67A – December 2015 – Revised March 2016
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Key System Specifications
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2
Key System Specifications
The various system specifications can derived by looking at different functional blocks of an APFC:
• Current and voltage measurement
• Computation of powers and PF
• Relay and transistor switching for capacitor bank control
• Display
• LED indications
• Communication
• Sensors (temperature and light)
• Keys for user interface
Table 1 lists the common specifications for each functional block.
Table 1. Design Specifications
NO
PARAMETERS
SPECIFICATION
1
7-segment LED display (SSD)
Four digits with DP
2
7-segment LED display brightness control
(firmware controlled)
Depending on ambient light
3
Number of alarm and status monitoring LEDs
16 in total:
• 5 for capacitor bank switching status
• 3 for alarm
• 8 for parameter selection
4
Light sensor
Ambient light sensor (ALS)
5
Temperature sensor
Remote and local temperature sensor
6
Relay output (for switching contactor)
Three
7
Transistor output (for switching thyristor module)
Two, open drain
8
Current inputs
Three with onboard CT
9
Voltage inputs
Three with onboard potential divider
10
Input frequency
50 or 60 Hz
11
Current measurement accuracy
< ±0.5% from 5% to 200% of rated current
(In = 5 A)
12
Voltage measurement accuracy
< ±0.5% from 10% to 120% of rated voltage (Un = 230 V)
13
Power measurement accuracy
< ±0.5%
14
Number of ADC inputs, type, and sampling rate
Six sigma-delta ADC with 24-bit resolution, 4096 Hz
17
External DC power supply input
Isolated 24 V
Non-isolated 5 V, 12 V
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Automatic Power Factor Controller
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Block Diagram
3
www.ti.com
Block Diagram
TIDA-00737
5.0 V
3.3 V
SDO
5.0 V
PNP
4
TLC5916
(x4)
(8 Ch. LED Driver)
LIGHT AND
TEMP SENSOR
DISPLAY
SDI
3.3 V
TIDA-00454
3.3 V
MSP430F67791A
OPT3001
I2C
(Ambient Light Sensor)
SCL
K
I2C
SDO
TLC5916
OE, LE
8
(8 Ch. LED Driver)
SDI
3.3 V
SPI/
TMP451EVM
I2C
Remote/ Local Temperature
Sensor EVM
5.0 V
STATUS/ ALARM
GPIO
3.3 V
I2C
SPI, OE, LE
x
8
x
8
TLC59025
16
(16 Ch. LED
Driver)
MEASUREMENT
CONTACTOR/
THYRISTOR DRIVE
12 V
V3
V2
V1
I3
I2
CH 5
3
CH 4
3
24 V
RELAY
GPIO
CH 3
CH 2
TPL7407L
(7 Ch. Relay
Driver)
24 V
5.0 V
Sig-Del
ADC
TPS7A4101
3.3 V
(LDO)
(24 Bit)
4
CH 1
I1
ISO7340C
(DIGITAL ISO - 4/
0)
4
DRV8803
(QUAD DRIVER)
CH 0
UART
2
THYRISTOR
CONTROL
MODULE
CONNECTOR
(COMMUNICATIONS)
NOTE:
External boards: TIDA-00454, TMP451EVM
A
Figure 2. Functional Block Diagram for TIDA-00737
6
Capacitor Bank Switching and HMI Subsystem Reference Design for
Automatic Power Factor Controller
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Block Diagram
www.ti.com
3.1
3.1.1
Highlighted Products
TLC5916—8-Channel Constant-Current LED Sink Driver
The TLC5916 contains an 8-bit shift register and data latches, which convert serial input data into parallel
output format. Each output is independently controlled and can be programmed to be on or off by the
user. The constant sink current for all channels is set through a single external resistor. The constant
output current range is 3 to 120 mA. The TLC5916 is designed for up to 20 V at the output port. The high
clock frequency (30 MHz) also satisfies the system requirements of high-volume data transmission.
The serial data is transferred into the TLC5916 through SDI, shifted in the shift register, and transferred
out through SDO. Latch Enable (LE) latches the serial data in the shift register to the output latch. Output
Enable (OE) enables the output drivers to sink current.
The TLC5916 is available in a 16-pin SOIC package and is specified to operate at temperatures from
–40°C to 125°C.
OUT0
OUT1
OUT6
OUT7
I/O Regulator
R-EXT
8
OE(ED2)
Output Driver and
Error Detection
Control
Logic
8
8
VDD
8-Bit Output
Latch
LE(ED1)
Configuration
Latches
8
CLK
8
8-Bit Shift
Register
SDI
SDO
8
Figure 3. TLC5916 Functional Block Diagram
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Block Diagram
www.ti.com
The TLC5916 is designed to work alone or cascaded. Figure 4 shows the cascading implementation of the
TLC5916.
VLED
R-EXT
SDI
720
R-EXT
OUT7
SDO
720
R-EXT
LE
GND
CLK
LE
GND
CLK
OE
LE
CLK
GND
SDO
OE
SDI
720
TLC5916
SDO
VDD
OE
SDI
VDD
TLC5916
TLC5916
VDD
OUT0
OUT7
OUT0
OUT7
OUT0
VDD: 3.0V to 5.5V
SDI
Controller
CLK
LE
OE
Read back
Multiple Cascaded Drivers
26-mA Application
Figure 4. Cascading of Multiple TLC5916 Drivers
8
Capacitor Bank Switching and HMI Subsystem Reference Design for
Automatic Power Factor Controller
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Block Diagram
www.ti.com
3.1.2
TLC59025—16-Channel Constant-Current LED Sink Driver
The TLC59025 contains a 16-bit shift register and data latches, which convert serial input data into parallel
output format. At the TLC59025 output stage, 16 regulated-current ports provide uniform and constant
current for driving LEDs. Users can adjust the output current from 3 to 45 mA through an external resistor,
REXT, which gives flexibility in controlling the intensity of LEDs. The TLC59025 is designed for up to 17 V at
the output port. The high clock frequency, 30 MHz, also satisfies the system requirements of high-volume
data transmission.
The serial data is transferred into the TLC59025 through SDI, shifted in the shift register, and transferred
out through SDO. LE latches the serial data in the shift register to the output latch. OE enables the output
drivers to sink current.
The TLC59025 is available in 24-pin SSOP package and is specified for operation at temperatures from
–40°C to 125°C.
OUT0
R-EXT
OUT1
OUT14 OUT15
I/O REGULATOR
VDD
8
OUTPUT DRIVER
OE
CONTROL
LOGIC
16
16
16-BIT OUTPUT
LATCH
LE
CONFIGURATION
LATCHES
16
CLK
8
16-BIT SHIFT
REGISTER
SDI
SDO
16
Figure 5. TLC59025 Functional Block Diagram
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Block Diagram
3.1.3
www.ti.com
MSP430F67791A—Mixed Signal Microcontroller
The Texas Instruments MSP430F67xx1A family of polyphase-metering system-on-chips (SoCs) are
powerful, highly-integrated solutions for revenue meters that offer accuracy and a low-system cost with
few external components. The MSP430F67xx1A family of devices use the low-power MSP430™ MCU
from TI with a 32-bit multiplier to perform all energy calculations, metering applications (such as tariff rate
management), and communications with automatic meter reading (AMR) and advanced metering
infrastructure (AMI) modules.
The MSP430F67xx1A features 24-bit sigma-delta converter technology from TI. Device family members
include up to 512KB of flash, 32KB of RAM, and a LCD controller with support for up to 320 segments.
The ultralow-power nature of the MSP430F67xx1A family of devices means that the system power supply
can be minimized to reduce the overall cost. Low standby power means that backup energy storage can
be minimized, and critical data can be retained longer in case of a mains power failure.
The MSP430F67xx1A family executes the energy measurement software library from TI, which calculates
all the relevant energy and power results. The energy measurement software library is available with the
MSP430F67xx1A at no cost. Industry standard development tools and hardware platforms are available to
hasten the development of meters that meet all of the American National Standards Institute (ANSI) and
International Electrotechnical Commission (IEC) standards, globally.
This TI Design utilizes the MSP430F67791A. For cost optimization, the user can select another
MSP430F67xx1A MCU-based device for design requirements such as flash, RAM, and so forth. Figure 6
shows the MSP430F67791A functional block diagram.
The MSP430F67791A is available in a 128-pin LQFP package and is specified to operate at temperatures
from –40°C to 85°C.
XIN
XOUT
DVCC DVSS
AVCC AVSS
AUX1 AUX2 AUX3
PA
P1.x P2.x
RST/NMI
PB
P3.x P4.x
PC
P5.x P6.x
P7.x
PD
P8.x
PE
P9.x P10.x
PF
P11.x
(32 kHz)
ACLK
Unified
Clock
System
512KB
256KB
128KB
32KB
16KB
Flash
RAM
SMCLK
MCLK
SYS
Watchdog
Port
Mapping
Controller
CRC16
MPY32
I/O Ports
P1, P2
2×8 I/Os
Interrupt,
Wakeup
I/O Ports
P3, P4
2×8 I/Os
I/O Ports
P5, P6
2×8 I/Os
I/O Ports
P7, P8
2×8 I/Os
I/O Ports
P9, P10
2×8 I/O
I/O Ports
P11
1×6 I/O
PA
1×16 I/Os
PB
1×16 I/Os
PC
1×16 I/Os
PD
1×16 I/Os
PE
1×16 I/O
PF
1×6 I/O
Ta0
TA1
TA2
TA3
eUSCI_A0
eUSCI_A1
eUSCI_A2
eUSCI_A3
eUSCI_B0
eUSCI_B1
CPUXV2
and
Working
Registers
(25 MHz)
EEM
(S: 8+2)
JTAG,
SBW
Interface
Port PJ
PMM
Auxiliary
Supplies
LDO
SVM, SVS
BOR
SD24_B
7 Channel
6 Channel
4 Channel
ADC10_A
10 Bit
200 KSPS
LCD_C
8MUX
Up to 320
Segments
REF
Reference
1.5 V, 2.0 V,
2.5 V
RTC_CE
PJ.x
Timer_A
3 CC
Registers
Timer_A
2 CC
Registers
(UART,
IrDA,SPI)
DMA
3 Channel
2
COMP_B
(External
Voltage
Monitoring)
(SPI, I C)
Figure 6. MSP430F67791A Functional Block Diagram
10
Capacitor Bank Switching and HMI Subsystem Reference Design for
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Block Diagram
www.ti.com
3.1.4
ISO7340C—Quad-Channel 4/0 Digital Isolator
The ISO7340C provides galvanic isolation up to 3000 VRMS for 1 minute per UL and 4242 VPK per VDE.
The ISO7340C has four isolated channels comprised of logic input and output buffers separated by a
silicon dioxide (SiO2) insulation barrier. The ISO7340C has four channels in forward direction. The suffix
'C' on the end of "ISO7340C" indicates that the default output is high, in case of input power or signal loss.
Used in conjunction with isolated power supplies, the ISO7340C prevents noise current on a data bus or
other circuits from entering the local ground and interfering with or damaging sensitive circuitry. The
ISO7340C has an integrated noise filter for harsh industrial environments where short noise pulses may
be present at the device input pins. The ISO7340C has transistor-transistor logic (TTL) input thresholds
and operates from 3- to 5.5-V supply levels.
The ISO7340C is available in 16-pin SOIC package and is specified to operate at temperatures from
–40°C to 125°C.
VCC1
GND1
1
16
2
15
VCC2
GND2
INA
INB
3
14
OUTA
4
13
OUTB
INC
5
12
OUTC
IND
6
11
OUTD
NC
7
10
EN
GND1
8
9
GND2
Figure 7. ISO7340C Pin Configuration and Function
3.1.5
TPL7407L—40-V, 7-Channel Low-Side Driver
The TPL7407L is a high-voltage, high-current NMOS transistor array. This device consists of seven
NMOS transistors that feature high-voltage outputs with common-cathode clamp diodes for switching
inductive loads. The maximum drain-current rating of a single NMOS channel is 600 mA. The user can set
the transistors as parallel for higher-current capability.
The key benefit of the TPL7407L is its improved power efficiency and lower leakage than a bipolar
Darlington implementation. With the lower VOL, the user dissipates less than half the power of traditional
relay drivers with currents less than 250 mA per channel.
The TPL7407L is available in a 16-pin SOIC package and is specified to operate at temperatures from
–40°C to 125°C.
Figure 8 shows the TPL7407L functional block diagram.
COM
Regulation
Circuitry
OUT(1-7)
50k
DRIVER
IN(1-7)
1M
OVP
Figure 8. TPL7407L Functional Block Diagram
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Block Diagram
3.1.6
www.ti.com
DRV8803 — 60-V, 4-Channel Low Side Driver
The DRV8803 provides a 4-channel low-side driver with overcurrent protection. It has built-in diodes to
clamp turn-off transients generated by inductive loads. The DRV8803 is controlled through a parallel
interface. Internal shutdown functions are available for overcurrent protection, short-circuit protection,
over-temperature protection, and undervoltage lockout. Faults are indicated by a fault output pin.
The DRV8803 is available in a 16-pin HTSSOP package and is specified to operate at temperatures from
–40°C to 150°C.
8.2V – 60V
Internal
Reference
Regs
UVLO
VM
nENBL
8.2V – 60V
Optional
Zener
Int. VCC
LS Gate
Drive
VCLAMP
OUT1
OCP
&
Gate
Drive
RESET
Inductive
Load
IN1
IN2
IN3
Control
Logic
IN4
nFAULT
Thermal
Shut down
OUT2
OCP
&
Gate
Drive
Inductive
Load
OCP
&
Gate
Drive
OUT3
OCP
&
Gate
Drive
OUT4
Inductive
Load
Inductive
Load
GND
(multiple pins)
Figure 9. DRV8803 Functional Block Diagram
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Block Diagram
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3.1.7
TPS7A4101 — LDO
The TPS7A41 is a high voltage-tolerant linear regulator that offers the benefits of a thermally-enhanced
package (MSOP-8) and is able to withstand continuous DC or transient input voltages of up to 50 V.
The TPS7A41 is stable with any output capacitance greater than 4.7 μF and any input capacitance greater
than 1 μF (over temperature and tolerance). Thus, implementations of this device require minimal board
space because of its miniaturized packaging (MSOP-8) and a potentially small output capacitor. In
addition, the TPS7A41 offers an enable pin (EN) compatible with standard CMOS logic, to enable a lowcurrent shutdown mode.
The TPS7A41 has an internal thermal shutdown and current limiting to protect the system during fault
conditions. The MSOP-8 packages has an operating temperature range of TJ = –40°C to 125°C.
In addition, the TPS7A41 is ideal for generating a low-voltage supply from intermediate voltage rails in
telecom and industrial applications. The linear regulator can not only supply a well-regulated voltage rail,
but can also withstand and maintain regulation during fast voltage transients. These features translate to
simpler and more cost-effective electrical surge-protection circuitry for a wide range of applications.
IN
OUT
UVLO
Pass
Device
Thermal
Shutdown
Current
Limit
Error
Amp
Enable
EN
FB
Figure 10. TPS7A41 Functional Block Diagram
3.1.8
OPT3001 — Digital ALS
The OPT3001 is a sensor that measures the intensity of visible light. The digital output is reported over an
I2C, two-wire serial interface. Measurements can be either continuous or single-shot.
The OPT3001 is available in 6-pin small form factor USON-6 package and is specified to operate at
temperatures from –40°C to 85°C.
VDD
VDD
OPT3001
Ambient
Light
SCL
SDA
2
ADC
Optical
Filter
IC
Interface
INT
ADDR
GND
Figure 11. OPT3001 Functional Block Diagram
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Block Diagram
3.1.9
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TMP451— Remote Temperature Sensor
The TMP451 is a high-accuracy, low-power remote temperature sensor monitor with a built-in local
temperature sensor. The temperature is represented as a 12-bit digital code for remote sensors, giving a
resolution of 0.0625°C. The temperature accuracy is ±1°C (maximum) in the typical operating range for
the local and the remote temperature sensors. The two-wire serial interface accepts the SMBus
communication protocol.
The TMP451 is ideal for high-accuracy temperature measurements in multiple locations and in a variety of
industrial subsystems. The device is specified for operation over a supply voltage range of 1.7 to 3.6 V
and a temperature range of –40°C to 125°C.
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4
System Design Theory
4.1
Display
4.1.1
7-Segment LED Display (SSD)
The working of SSD is showcased using four digits. Each digit patten has seven segments and a decimal
point LED that can be turned ON depending on the number that needs to be displayed. In order to reduce
the number of control lines required to control four digits, multiplexing is used. At any given instant only
one digit is enabled and driven for 250 μs, followed by subsequent digits. The pattern is cycled at a rate
greater than persistence of vision (POV) so that all digits are visible at a time.
4.1.1.1
Multiplexing
Figure 12 shows the internal connection diagram for a multiplexed 4-digit SSD.
Figure 12. Multiplexed 4-Digit SSD
Each digit in the module has a common anode pin. However, all the digits across the display module
share cathode connections. This allows each digit to be controlled independently.
The LDQ-M286RI (D18 in Figure 13) is a 4-digit SSD. The anode of each digit is connected to the supply
through the PNP switch (time multiplexed). Only one digit receives supply at a time. At any given instant,
only one PNP switch is turned ON using one of the two TLC5916.
MMBT3906
DIG3
R31
Q3
1
1.80k
MMBT3906
DIG4
R32
2
2
R28
20.0k
TP47
Q2
1
1.80k
TP46
R30
5V
Q4
1
1.80k
MMBT3906
3
MMBT3906
DIG2
R27
20.0k
2
2
Q1
1
1.80k
5V
3
R3
TP45
DIG1
R26
20.0k
3
TP44
R25
20.0k
5V
3
5V
D18
TP48
SEG-E
1
K
A
12
SEG-D
2
K
K
11
SEG-A
SEG-H 3
K
K
10
SEG-F
K
A
9
K
A
A
K
SEG-C
4
SEG-G
5
6
LDQ-M286RI
TP49
8
7
SEG-B
TP50
TP51
Figure 13. Interface for Multiplexing 4-Digit SSD
The TIDA-00737 has 4-digit SSD implementation for auto-cyclic display with scrolling time of 4 seconds
for displaying nine parameters, namely three voltages, three currents, and three PFs.
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4.1.1.2
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Cascading
Two TLC5916 are used in this design: one for selecting the digit and other for driving SSD. The TLC5916
contains an 8-bit shift register and latches data, which converts serial input data into parallel output format.
At the output stage, eight regulated current ports are designed to provide uniform and constant current for
driving LEDs.
The TLC5916 constant-current LED sink driver is designed to work alone or cascaded. Cascaded
configuration is useful when more number of outputs are required and MCU pins are limited.
The cascading of the two devices is done by:
• Connecting the same SPI clock from MCU to both TLC5916 drivers
• SDO of MCU is connected to SDI of Device 1. SDO of Device 1 is connected to SDI of Device 2
• SDO of Device 2 is connected to SDI of MCU
• Connecting two GPIOs from the MCU to LE_SEG and OE_SEG of both the devices
DVCC
PM_UCA0CLK
PM_UCA0SIMO
U5
U4
LE_SEG 4
OE_SEG 13
OE_SEG
LE(ED1)
OE(ED2)
PM_UCA0CLK
PM_UCA0SIMO
CASCADE
3
2
14
CLK
SDI
SDO
R34
15
R-EXT
16
VDD
DVCC
TP37
R2
10kDGND
1.58k
DGND
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
5
6
7
8
9
10
11
12
GND
1
SEG-A
SEG-B
SEG-C
SEG-D
SEG-E
SEG-F
SEG-G
SEG-H
LE_SEG 4
OE_SEG 13
LE_SEG
OE_SEG
PM_UCA0CLK
PM_UCA0SOMI
R35
C17
0.1µF
15
1.58k
DGND
16
LE(ED1)
OE(ED2)
CLK
SDI
SDO
R-EXT
VDD
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
5
6
7
8
9
10
11
12
GND
1
DIG1
DIG2
DIG3
DIG4
TLC5916ID
TLC5916ID
C16
1µF
PM_UCA0CLK 3
CASCADE
2
PM_UCA0SOMI14
DVCC
TP38
R38
10k
C18
1µF
DGND
C19
0.1µF
DGND
DGND
DGND
Figure 14. SSD Driver Interface
4.1.1.3
Current Control
SSD intensity can be controlled depending on the ambient light for better visibility when the APFC is
mounted into a panel. The LED sink current of the TLC5916 can be controlled by external resistor REXT
and also by a 256-step programmable global current gain using firmware.
The TLC5916 scales up the reference current, IREF, set by the external resistor REXT to sink a current, IOUT,
at each output port. The procedure to calculate the target output current IOUT,TARGET in the saturation region
is as follows.
Firmware control of IOUT,TARGET uses a bit definition of the configuration code. This bit definition of the code
in the configuration latch is shown in Table 2.
Table 2. Bit Definition of 8-Bit Configuration Code
0
1
2
3
4
5
6
7
MEANING
CM
HC
CC0
CC1
CC2
CC3
CC4
CC5
DEFAULT
1
1
1
1
1
1
1
1
Bits 1 to 7 {HC, CC [0:5]} determine the voltage gain (VG) that affects the voltage at REXT and indirectly
affects the reference current, IREF, flowing through the external resistor at REXT. Bit 0 is the current
multiplier (CM) that determines the ratio IOUT,TARGET/IREF. Each combination of VG and CM gives a specific
current gain (CG).
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VG is the relationship between {HC,CC[0:5]} and the voltage gain, which is calculated as shown in
Equation 1 and Equation 2:
(1 + HC ) ´ æç 1 +
D ö
64 ÷ø
è
4
D = CC0 ´ 25 + CC1 ´ 24 + CC2 ´ 23 + CC3 ´ 22 + CC4 ´ 21 + CC5 ´ 20
VG =
(1)
(2)
The maximum possible value of the configuration code is {CM, HC, CC[0:5]} = {1,1,111111}.
Using the values in Equation 2, D = 63.
Placing D = 63 and HC = 1 in Equation 1, VG = 127/128 = 0.992.
REXT is the external resistor connected between the R-EXT terminal and ground (R34 and R35 shown in
Figure 14) and VR-EXT is the voltage of R-EXT, which is controlled by the programmable voltage gain
(VG). VG is defined by the configuration code.
To calculate VR-EXT,
VR - EXT = 1.26 V ´ VG
(3)
127
= 1.26 ´
= 1.25 V
128
aaaaaaaaTo calculate current gain (CG):
CM - 1)
CG = VG ´ 3 (
= VG ´ 3 (
aaa-
1 - 1)
= VG =
(4)
127
128
To calculate the reference current (IREF):
VR - EXT
I REF =
R EXT
(5)
Considering REXT = 1580 Ω (used in this design),
1.25 V
I REF =
= 0.791 mA
1580 W
I OUT,TARGET = I REF ´ 15 ´ CG
(6)
127
= 0.791 ´ 15 ´
= 11.87 mA
128
aaaaaaaaaaHence, each output port is set to sink a current of 11.87 mA in this design.
4.1.1.4
Layout Guidelines
See Section 12 Layout of the datasheet for layout guidelines and layout example.
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Status and Alarm Indication LEDs
16
•
•
•
4.1.2.1
LEDs are used in this design for indicating alarm, capacitor bank status, and parameter selected:
8 LEDs indicate phase, parameter selected and lead/lag information
5 LEDs indicate the capacitor bank status
3 LEDs indicate the alarm condition
LED Current Configuration
The TLC59025 has 16 output ports. The forward current of each LED is set around 10 mA. External
resistor REXT is used to set sink current, IOUT, at each output port.
To calculate the REXT for target output current IOUT,TARGET in the saturation region:
æ 1.21 V
R EXT = ç
ç I OUT,TARGET
è
ö
÷ ´ 15.5
÷
ø
(7)
Placing IOUT,TARGET = 10 mA,
æ 1.21 V ö
R EXT = ç
÷ ´ 15.5 = 1875 W
è 10 mA ø
1800 Ω is used in this design.
Calculating IOUT,TARGET with REXT = 1800 Ω,
æ 1.21 V ö
I OUT,TARGET = ç
÷ ´ 15.5 = 10.4 mA
è 1800 W ø
Each output port of the TLC59025 is set to sink a current of 10.4 mA in this design.
4.1.2.2
Parameter Indication LEDs
The TIDA-00737 displays multiple parameters like voltages, currents, and PF of each phase. The LEDs
associated with the parameter being displayed will be turned ON. Table 3 shows the LEDs that are
assigned for the parameter being displayed.
Table 3. LEDs Indicating Parameter Being Displayed on 7-Segment LED
4.1.2.3
D14
D15
D11
D12
D13
D16
D10
D7
VOLTAGE
CURRENT
PF
PHASE R
PHASE Y
PHASE B
LAG
LEAD
Capacitor Bank Status LEDs
The selective capacitor from the bank will be switched ON/OFF based on reactive power being
compensated. This design shows the switching of the capacitor bank in five steps for improving the
lagging PF (towards unity). This is implemented by switching three relays and two transistor outputs.
Further details on relay and transistor output switching are covered in Section 4.2. Associated five LED
functionalities for capacitor bank switching status are shown in Table 4.
Table 4. Capacitor Bank Status LED States Proportional to Reactive Power
D9
D8
D5
ON
18
D4
D1
COMMENTS
var ≥ 200
OFF
var ≥ 400
ON
ON
OFF
ON
ON
ON
ON
ON
ON
ON
OFF
var ≥ 800
ON
ON
ON
ON
ON
var ≥ 1000
var ≥ 600
OFF
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4.1.2.4
Alarm Indication
Three LEDs are assigned to indicate alarm conditions for voltage, temperature, and low lighting
conditions.
Table 5. LEDs to Indicate Alarms
D2
D3
D6
ON
X
X
Input voltage: > 110% of 230-V AC
COMMENTS
X
ON
X
Remote temperature: > 50°C
X
X
ON
Ambient light: < 100 lux
NOTE:
•
•
4.1.2.5
LED1 to LED16 are represented as D1 to D16 in the schematic.
Red and green LEDs are used in alternate rows for easy identification.
Layout Guidelines
See Section 11 Layout of the datasheet for layout guidelines and layout example.
4.2
4.2.1
Output Drive
Relay Output Drive
This TI Design provides three high-current output drivers for switching relays. It features the TPL7407L, a
low-side relay driver. The COM pin is the power supply pin of the TPL7407L that powers the gate drive
circuitry. This design ensures a full-drive potential with any GPIO above 1.5 V. The gate drive circuitry is
based on low-voltage CMOS transistors that can only handle a max gate voltage of 7 V. An integrated
LDO reduces the COM voltage of 8.5 to 40 V to a regulated voltage of 7 V. Though TI recommends an
8.5-V minimum for VCOM, the device still functions with a reduced COM voltage, a reduced gate drive
voltage, and a resulting higher RDS(ON).
To prevent overvoltage on the internal LDO output because of a line transient on the COM pin, the COM
pin must be limited to below 3.5 V/μs. TI recommends using a bypass capacitor that limits the slew rate to
below 0.5 V/μs.
Three single-pole, single-throw–normally open (SPST-NO) contact form type relays are installed on the
board. The TPL7407L drives these relays. The contact rating of each relay is 12 A at 250-V AC. The
TPL7407L relay driver outputs are controlled by the MSP430F67791A GPIO pins.
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Figure 15 shows the TPL7407L relay driver switching control and Figure 16 shows relay control.
RELAY_3
TP24
RELAY_2
TP26
RELAY_3
R8
R6
10k
R5
10k
R7
10k
TP10
10k
R11
10k
R9
10k
R10
TP11
TP12
TP2
10k
U1
1
2
3
4
5
6
7
8
IN1
OUT1
IN2
OUT2
16
OUT1
15
OUT2
14
OUT3
IN3
OUT3
IN4
OUT4
IN5
OUT5
IN6
OUT6
IN7
OUT7
10
COM
9
GND
13
12
11
DGND
DGND
+12V
J1
1
2
C1
0.1µF
TPL7407LPW
DGND
TP27TP25TP23
RELAY_2
TP22
RELAY_1
TP6 TP5 TP4 TP3
RELAY_1
C46
10µF
DGND
MMSZ4702T1G
15V
DGND
ED120/2DS
D19
Figure 15. Relay Driver
+12V
K1
1
4
J2
2
1
OUT1
5
3
ED120/2DS
G2RL-1A DC12
+12V
K2
1
4
J6
2
1
OUT2
5
3
ED120/2DS
G2RL-1A DC12
+12V
K3
1
4
J7
2
1
OUT3
5
3
ED120/2DS
G2RL-1A DC12
Figure 16. Relay Control
4.2.1.1
Layout Guidelines
See Section 11 Layout of the datasheet for layout guidelines and layout example.
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4.2.2
Transistor Output Drive
4.2.2.1
Output Driver
This TI Design provides two high-current output driver for switching transistors. It features the DRV8803, a
low-side driver that is protected. Each output has an integrated clamp diode connected to a common pin,
VCLAMP. The per channel rated output current capacity of the DRV8803 is up to 2-A (one channel on) or
1-A (four channels on) continuous output current per channel, at 25°C with proper PCB heatsinking.
+24V_ISO
C4
0.1µF
D22
5V_ISO
48V
+24V_ISO
C5
VM
8
ENBL
IN1_ISO 14
5V_ISO
5V_ISO
TP13
GND_iso
R16
10k
R15
0
13
IN2
R14
0
11
IN3
IN2_ISO 10
IN4
RESET_DRV_ISO 9
RESET
16
FAULT
15
2
OUT1
3
IN1
R13
10k
VCLAMP
NC
0.1µF
OUT_1
GND_iso
OUT_1
TP30
OUT2
4
OUT3
6
OUT4
7
GND
GND
PAD
5
12
17
TP7
nENBL_ISO
1
TP8
R12
10k
GND_iso
SMBJ48A-13-F
U7
OUT_2
OUT_2
TP31
DRV8803PWPR
GND_iso
Figure 17. Driver for Transistor Output
4.2.2.1.1
nENBL and RESET Operation
The nENBL pin enables or disables the output drivers. nENBL must be low to enable the outputs The
RESET pin, when driven active high, resets internal logic. All inputs are ignored while RESET is active.
4.2.2.1.2
Protection Circuits
The DRV8803 is protected against undervoltage, overcurrent, and over-temperature events.
4.2.2.1.3
Overcurrent Protection (OCP)
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive.
If this analog current limit persists for longer than the tOCP deglitch time (approximately 3.5 μs), the driver
will be disabled and the nFAULT pin will be driven low. The driver will remain disabled for the tRETRY retry
time (approximately 1.2 ms), then the fault will be automatically cleared. The fault will be cleared
immediately if either RESET pin is activated or VM is removed and re-applied.
4.2.2.1.4
Thermal Shutdown (TSD)
If the die temperature exceeds safe limits (approximately 150°C), all output FETs will be disabled and the
nFAULT pin will be driven low. Once the die temperature has fallen to a safe level, operation will
automatically resume. Any tendency of the device to enter TSD is an indication of either excessive power
dissipation, insufficient heatsinking, or too high ambient temperature.
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Undervoltage Lockout (UVLO)
If at any time the voltage on the VM pin falls below the UVLO threshold voltage, all circuitry in the device
will be disabled, and internal logic will be reset. Operation will resume when VM rises above the UVLO
threshold.
4.2.2.1.6
Layout Guidelines
The DRV8803PWP package used in this design is an HTSSOP package with an exposed PowerPAD™.
The PowerPAD package uses an exposed pad to remove heat from the device. For proper operation, this
pad must be thermally connected to copper on the PCB to dissipate heat. On PCB without internal planes,
copper area can be added on either side of the PCB to dissipate heat. If the copper area is on the
opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and
bottom layers.
For details about how to design the PCB, see the TI Application Report PowerPAD Thermally Enhanced
Package (SLMA002) and TI Application Brief PowerPAD Made Easy (SLMA004), both available at
www.ti.com.
4.2.2.2
Digital Isolator
The DRV8803 is isolated from the MCU using digital isolator. The ISO7340C digital isolator supports data
rates up to 25 Mbps. To control two outputs of the DRV8803, a total of four outputs are required. To
provide these essential outputs, one ISO7340C is used and features four output channels.
Figure 18 shows all four signals interfacing:
DVCC
5V_ISO
C9
0.1µF
nENBL
TP33
IN1
TP34
IN2
TP35
RESET_DRV
C10
U8
0.1µF
1
VCC1
VCC2
16
0
3
INA
OUTA
14
GND_iso
nENBL_ISO
R21
0
4
INB
OUTB
13
IN1_ISO
IN2
R22
0
5
INC
OUTC
12
IN2_ISO
RESET_DRV
R23
0
6
IND
OUTD
11
RESET_DRV_ISO
7
NC
EN
10
2
8
GND1
GND1
GND2
GND2
9
15
nENBL DGND
R20
IN1
TP36
ISO7340CDWR
GND_iso
DGND
Figure 18. Digital Isolator Interface for Transistor Output Control
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Associated five (three relays + two transistor outputs) digital outputs for capacitor bank switching are
shown in Table 6.
Table 6. Capacitor Bank Switching States Proportional Reactive Power
RELAY K3
RELAY K2
RELAY K1
TRANSISTOR OUT_1
ON
4.2.2.2.1
TRANSISTOR OUT_2
COMMENTS
var ≥ 200
OFF
var ≥ 400
ON
ON
OFF
ON
ON
ON
ON
ON
ON
ON
OFF
var ≥ 800
ON
ON
ON
ON
ON
var ≥ 1000
var ≥ 600
OFF
Layout Guidelines
See Section 11 Layout of the datasheet for layout guidelines and layout example.
4.3
Sensor Input
4.3.1
ALS
SSD intensity can be controlled depending on the ambient light for better visibility when the APFC is
mounted in a panel. This design features the ALS OPT3001 to sense ambient light. It measures the
intensity of visible light and reports recorded digital output over I2C, two-wire serial interface. Figure 19
shows the OPT3001 interfacing:
DVCC
C25
SCL
SDA
INT
ADDR
4
6
5
2
PM_UCB0SCL
PM_UCB0SDA
R41
10k
TP54
VDD
R40
10k
TP53
1
TP52
R24
10k
U10
DVCC
0.1µF
GND
PAD
3
7
OPT3001DNPR
DGND
DGND
Figure 19. Ambient Light Sensor OPT3001 Interfacing
Currently, the ALS is mounted on the PCB and is accessible to test different ambient light conditions. In
practical applications, the board is mounted inside an enclosure, and the ALS is not accessible or visible.
For ALS to function in these conditions, a window must be provided in the enclosure for ambient light to
fall on the sensor. See OPT3001 application report (SBEA002) for details on designing the window.
4.3.1.1
Layout Guidelines
See Section 10: Layout of the datasheet for layout guidelines and layout example.
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Remote Temperature Sensor EVM
The TMP451EVM is used as a remote temperature sensor. The TMP451EVM is an evaluation module
that uses the TMP451, a 1.8-V remote temperature sensor. The TMP451 has the capability of measuring
remote temperatures. The TMP451EVM consists of two printed circuit boards (PCBs). One board
(USB_DIG_Platform) generates the digital signals required to communicate with the TMP451. The second
PCB (TMP451_Test_Board) contains the TMP451 as well as support and configuration circuitry.
TMP_Test_Board is used in this design to measure remote temperature and to communicate with
TMP451 over I2C, two-wire serial interface.
Figure 20. TMP451EVM — Remote Temperature Sensor EVM
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4.4
AC Input
AC input parameters are measured using the TIDA-00454 MCU AFE board. The TIDA-00454 MCU AFE is
interfaced with the TIDA-00737 board to measure AC input.
The following key features of the TIDA-00454 MCU AFE are used in this design:
• MSP430F67791A SoC with six simultaneous sigma-delta ADCs for three-current and three-voltage
measurement
• AC input voltage measurement range: 10% to 120% of the rated voltage (230 V)
• AC input current measurement range: 5% to 200% of the rated current (5 A)
• AC input measurement accuracy < ±0.5%
• Provides expansion option for UART interface
• Onboard CTs and potential dividers provided for direct measurement of voltages and currents
Figure 21. TIDA-00454 MCU AFE Board
The following sections describe key subsystems of the TIDA-00454. See the TIDA-00454 design guide
(TIDUAH1) for more information.
4.4.1
AC Input Measurement
4.4.1.1
Current Measurement
Three-phase current is measured using an onboard CT followed by a burden resistor. The voltage drop
across the burden resistor is connected to the ADC inputs. The user can change the input current range
by changing CTs and burden resistor value. Ensure the input to the MSP430F67791A SD24_B ADC is
less than the differential input range ±919 mV for the maximum input current expected to be measured.
4.4.1.2
Voltage Measurement
Three-phase voltage is measured using onboard voltage divider (resistor divider). The divided voltage is
connected to the ADC inputs. The user can change the input voltage range by changing the voltage
divider ratio (or changing resistor value). Ensure the input to the MSP430F67791A SD24_B ADC is less
than the differential input range ±919 mV for the maximum input voltages expected to be measured.
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MCU
The TIDA-00454 board has MSP430F67791A MCU. The user can interface three current and three
voltage channels to the ΣΔ ADC available on the MSP430F67791A. Figure 22 shows the
MSP430F67791A MCU schematic.
C22
DVCC DVCC
XIN
XOUT
AUXVCC3
0
P1.2
P1.1
P1.0
P2.4
R105 R104
2.2k 2.2k
PM_UCB0SCL
PM_UCB0SDA
P2.7
PM_UCA0RXD
PM_UCA0TXD
P3.2
PM_UCA1CLK
PM_UCA1SOMI
PM_UCA1SIMO
EFLAG1
TP7
EFLAG2
M2_XTR1
M2_XTR2
TP17
M2_XTR1
M2_XTR2
TP45
TP44
P1.2
P1.1
P1.0
P2.4
PM_UCB0SCL
PM_UCB0SDA
P2.7
PM_UCA0RXD
PM_UCA0TXD
P3.2
PM_UCA1CLK
PM_UCA1SOMI
PM_UCA1SIMO
TP27
TP28
TP15
TP16
EFLAG1
EFLAG2
R102
0
SDCLK
DNP
R103
560K
P5.5
R101
DNP
560K
SDCLK
P5.5
P5.6
/OD_XTR
/CS0
PM_UCA2SOMI
PM_UCA2SIMO
PM_UCA2CLK
XIN
XOUT
AUXVCC3
RTCCAP1
RTCCAP0
P1.5/SMCLK/CB0/A
P1.4/MCLK/CB1/A4
P1.3/ADC10CLK/A3
P1.2/ACLK/A2
P1.1/TA2.1/VeREF+/A1
P1.0/TA1.1/VeREF-/A0
P2.4/PM_TA2.0
P2.5/PM_UCB0SOMI/PM_UCB0SCL
P2.6/PM_UCB0SIMO/PM_UCB0SDA
P2.7/PM_UCB0CLK
P3.0/PM_UCA0RXD/PM_UCA0SOMI
P3.1/PM_UCA0TXD/PM_UCA0SIMO
P3.2/PM_UCA0CLK
P3.3/PM_UCA1CLK
P3.4/PM_UCA1RXD/PM_UCA1SOMI
P3.5/PM_UCA1TXD/PM_UCA1SIMO
COM0
COM1
P1.6/COM2
P1.7/COM3
P5.0/COM4
P5.1/COM5
P5.2/COM6
P5.3/COM7
LCDCAP/R33
P5.4/SDCLK/R23
P5.5/SD0DIO/LCDREF/R13
P5.6/SD1DIO/R03
P5.7/SD2DIO/CB2
P6.0/SD3DIO
P3.6/PM_UCA2RXD/PM_UCA2SOMI
P3.7/PM_UCA2TXD/PM_UCA2SIMO
P4.0/PM_UCA2CLK
V3V3+
V2V2+
VASYS1
V1V1+
I3I3+
I2I2+
I1I1+
U6
RST/NMI/SBWTDIO
PJ.3/TCK
PJ.2/TMS
PJ.1/TDI/TCLK
PJ.0/TDO
TEST/SBWTCK
P2.3/PM_TA1.0
P2.2/PM_TA0.2
P2.1/PM_TA0.1/BSL_RX
P2.0/PM_TA0.0/BSL_TX
P11.5/TACLK/RTCCLK
P11.4/CBOUT
P11.3/TA2.1
P11.2/TA1.1
P11.1/TA3.1/CB3
P11.0/S0
P10.7/S1
P10.6/S2
P10.5/S3
P10.4/S4
P10.3/S5
P10.2/S6
P10.1/S7
P10.0/S8
P9.7/S9
P9.6/S10
P9.5/S11
P9.4/S12
P9.3/S13
P9.2/S14
P9.1/S15
P9.0/S16
DVSS2
VDSYS2
P8.7/S17
P8.6/S18
P8.5/S19
P8.4/S20
RESET
102
RESET
TCK
101
TCK
TMS
100
TMS
TDI
99
TDI
TDO
98
TDO
TEST/SBWTCK
97
TEST/SBWTCK
96
TP42
95
TP41
94
TP39
93
TP35
92
TP43
91
TP40
90
TP34
89
TP32
88
TP31
87
TP36
86
TP37
85
TP38
84
TP18
83
TP19
82
TP20
81
TP21
80
TP22
79
TP23
78
TP10
77
TP24
76
TP25
75
TP26
74
TP11
73
TP12
72
TP13
71
TP14
70 DGND
VDSYS1
69
VDSYS1
P8.7
68
P8.7
P8.6
67
P8.6
P8.5
66
P8.5
P8.4
65
P8.4
V3V3+
V2V2+
VCORE
LED1
LED2
RELAY_6
RELAY_5
RELAY_4
RELAY_3
RELAY_2
RELAY_1
P7.1
P7.2
P7.3
P7.4
P7.5
P7.6
P7.7
P8.0
P8.1
P8.2
P8.3
LED1
LED2
RELAY_6
RELAY_5
RELAY_4
RELAY_3
RELAY_2
RELAY_1
P7.1
P7.2
P7.3
P7.4
P7.5
P7.6
P7.7
P8.0
P8.1
P8.2
P8.3
R99
2.2k
PM_UCB1SDA
R98
2.2k
DVCC
PM_UCB1SCL
DVCC
PM_UCA3RXD
PM_UCA3TXD
P4.3
PM_UCB1SCL
PM_UCB1SDA
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
DGND
MSP430F67661A
PM_UCA3RXD
PM_UCA3TXD
P4.3
R100
DNP
560K
P5.6
/OD_XTR
/CS0
PM_UCA2SOMI
PM_UCA2SIMO
PM_UCA2CLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
AUXVCC3
DGND
VCORE
DVSS1
DVCC
VDSYS1
AUXVCC1
AUXVCC2
VASYS1
AVCC
AVSS1
SD6N0
SD6P0
SD5N0
SD5P0
SD4N0
SD4P0
VREF
AVSS2
VASYS2
SD3N0
SD3P0
SD2N0
SD2P0
SD1N0
SD1P0
SD0N0
SD0P0
0.1µF
DGND
AVCC
P4.1/PM_UCA3RXD/M_UCA3SOMI
P4.2/PM_UCA3TXD/PM_UCA3SIMO
P4.3/PM_UCA3CLK
P4.4/PM_UCB1SOMI/PM_UCB1SCL
P4.5/PM_UCB1SIMO/PM_UCB1SDA
P4.6/PM_UCB1CLK
P4.7/PM_TA3.0
P6.1/SD4DIO/S39
P6.2/SD5DIOS38
P6.3/SD6DIO/S37
P6.4/S36
P6.5/S35
P6.6/S34
P6.7/S33
P7.0/S32
P7.1/S31
P7.2/S30
P7.3/S29
P7.4/S28
P7.5/S27
P7.6/S26
P7.7/S25
P8.0/S24
P8.1/S23
P8.2/S22
P8.3/S21
C66
DGND
R108
VASYS1
DVCC
VASYS1
V1V1+
I3I3+
I2I2+
I1I1+
VCORE
XOUT
12pF
VDSYS1
VDSYS1
AUXVCC1
AUXVCC2
AGND
Y1 DGND
DNP CMR200T-32.768KDZBT
32.768KHz
C16
DNP
VREF
2
3
XIN
12pF
1
DNP
Figure 22. MSP430F67791A MCU Schematic
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4.4.2.1
MCU Programming
The TI MSP430 family of MCUs supports the standard JTAG interface, which requires four signals for
sending and receiving data. The JTAG signals are shared with the GPIO. The TEST/SBWTCK signal is
used to enable the JTAG signals. In addition to these signals, the RESET signal is required to interface
with the MSP430 development tools and device programmers. Figure 23 shows the JTAG programming
connector. For further details on interfacing to development tools and device programmers, see the
MSP430 Hardware Tools User's Guide (SLAU278).
For a complete description of the features of the JTAG interface and its implementation, consult the
MSP430 Programming through the JTAG Interface User's Guide (SLAU320).
J7
DVCC
R26
DVCC
10k
R34
10k
R42
10k
R41
10k
DVCC
1
2
3
68001-403HLF
J10
R44
47k
TDO
TDI
TMS
TCK
TDO
TDI
TMS
TCK
RESET
2 INT
4 EXT
6
TEST/SBWTCK
8
10
12
14
TEST/SBWTCK
2
1
RESET
1
3
5
7
9
11
13
DGND
N2514-6002-RB
S1
7914G-1-000E
4
3
C19
0.1µF
DGND
Figure 23. JTAG Programming Connector
4.5
Power Supply
The following DC power supply have to be connected externally:
• Isolated power supply: 24 V; used to drive low-side driver for transistor output
• Non-isolated power supply: 5 V; used to drive 4-digit SSD and 16 LEDs
• Non-isolated power supply: 12 V; used to drive low-side driver for relay output
The following DC supplies are generated using LDO:
• Isolated power supply: 5 V from 24 V; used to drive digital isolator
• Non-isolated power supply: 3.3 V from 5 V; used for
– MCU and AFE section of the TIDA-00454
– 4-digit SSD and LED sink driver
– Sensors for temperature and ambient light
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Isolated Power Supply
The user must connect the external 24-V DC supply on the 4-pin terminal block J8 to power the isolated
transistor output section of the TIDA-00737 board (see Figure 24). The power supply is protected from
reverse polarity and overvoltage.
+24V_ISO
J8
OUT_1
OUT_2
OUT_1
OUT_2
282834-4
MMSZ5255B-7-F
1
2
3
4
C6
10µF
D17
GND_iso
C8
1µF
28V
C7
0.1µF
GND_iso
Figure 24. 24-V Input Connection
The DRV8803 and ISO7340C isolated supply side require a 5-V supply voltage. The TPS7A4101 LDO,
which is a very high voltage-tolerant linear regulator, is used to step down 24 V to 5 V.
Figure 25 shows the LDO circuit diagram.
TP1
U9B
C11
5
OUT
EN
FB
1
2
EP GND
10µF
R18
100k
TPS7A4101DGNR
IN
9
NC
NC
NC
3
6
7
5V_ISO
TPS7A4101DGNR
TP32
U9A
8
R17
9.76k
C12
0.01µF
C13
10µF
4
+24V_ISO
D21
MMSZ4690T1G
5.6V
GND_iso
R19
2.98k
GND_iso
TP9
GND_iso
Figure 25. 24- to 5-V Power Supply
4.5.1.1
Layout Guidelines
See Section 11 Layout of the datasheet for layout guidelines.
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4.5.2
Non-Isolated Power Supply
4.5.2.1
Power Supply for Driving Relays
An external 12-V DC supply must be connected on a two-pin terminal block J1 to power the relay driver
TPL7407L. The power supply is protected for reverse polarity and overvoltage.
10
COM
9
+12V
TP6
OUT7
J1
1
2
C1
0.1µF
C46
10µF
ED120/2DS
D19
DGND
MMSZ4702T1G
15V
DGND
Figure 26. 12-V Input Connection
4.5.2.2
Power Supply for LED Operation
An external 5-V DC supply must be connected on a two-pin terminal block J9 to power the 4-digit SSD
and indication LEDs. The power supply is protected for reverse polarity and overvoltage.
5V
TP17
J9
1
2
C20
ED120/2DS
C15
0.1µF
C14
1µF
10µF
D20
MMSZ4690T1G
5.6V
DGND
Figure 27. 5-V Input Connection
5
Firmware Description
For a firmware description and code examples for the TIDA-00737, see this design's firmware guide
(TIDCBV2).
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Getting Started Hardware
6
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Getting Started Hardware
This section provides details of different connectors that are provided on the TIDA-00737 and TIDA-00454
boards and their applications.
6.1
Connectors
Table 7 provides connection information for the following sections.
The OUTPUTS section covers three relay and two transistor outputs available on TIDA-00737 board.
Connector column shows pin number. Example J2.1 means pin 1 of connector J2 on TIDA-00737 board.
Under INTERFACE CONNECTORS, TIDA-00737 and TIDA-00454 boards are interfaced through two
connectors. One connector is a 16 pin (2 x 8) and another is a 10 pin (2 x 5). Pin number 1 to 16 of J5 of
TIDA-00737 are connected to pin number 1 to 16 of J2 of TIDA-00454, respectively. Pin number 1 to 10 of
J3 of TIDA-00737 are connected to pin number 1 to 10 of TIDA-00454, respectively. The remote
temperature sensor TMP451EVM interface section covers interfacing of temperature sensor with the
TIDA-00454.
The POWER SUPPLY section covers isolated and non-isolated power supply connections.
The MCU – TIDA-00454 section covers about MCU JTAG programming interface connector.
The INPUTS – TIDA-00454 section covers three phase AC voltage input connection of TIDA-00454.
Current input is through CT, which is shown in subsequent images.
Table 7. TIDA-00737 and TIDA-00454 Connectors
INPUT OR OUTPUT TYPE
SPECIFICATION
CONNECTOR
OUTPUT — TIDA-00737
Relay output
Transistor output
Relay K1
J2.1 – J2.2
Relay K2
J6.1 – J6.2
Relay K3
J7.1 – J7.2
OUT1
J8.3 – J8.2
OUT2
J8.4 – J8.2
INTERFACE CONNECTORS — TIDA-00737 WITH TIDA-00454
Interface connectors (with TIDA-00454 board)
2 × SPI,
1 × I2C,
5 × GPIO and
DVCC, DGND
J5 of TIDA-00737 – J2 of TIDA-00454
(pin 1-pin1 to pin16-pin16)
8 × GPIO
J3 of TIDA-00737 – J4 of TIDA-00454
(pin 1-pin1 to pin10-pin10)
J5 of TIDA-00454 – Test point of TMP451EVM
Remote temperature sensor TMP451EVM
interface
(with TIDA-00454 board)
J5.12 – SCLA
1 × I2C,
DVCC, GND
J5.13 – SDAA
J5.15 – GND
J5.16 – DVCC
POWER SUPPLY — TIDA-00737 AND TIDA-00454
Non-isolated power supply input
Isolated power supply input
5-V DC
J9.1 wrt J9.2 [TIDA-00737]
J8.1 wrt J8.2 [TIDA-00454]
12-V DC
J1.1 wrt J1.2
24-V DC
J8.1 wrt J8.2
MCU — TIDA-00454
MCU programming
JTAG
J10
INPUTS — TIDA-00454
Voltage input
30
Channel 1
J11.1 – J11.2
Channel 2
J12.1 – J12.2
Channel 3
J13.1 – J13.2
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NOTE: The current inputs have to be applied across the CTs and no connectors have been
provided.
Figure 28 shows the interface connectors of the TIDA-00737 board.
Isolated TSM interface
OUT2, OUT1, GND, 24 V
Relay output
K3, K2, K1
Relay supply
DGND, 12 V
Communication and
expansion I/O connector
LED supply
5 V, DGND
Figure 28. TIDA-00737 Interface Connectors
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Getting Started Hardware
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Figure 29 shows the interface connectors of the TIDA-00454 board.
Communication and
expansion I/O connector
TMP451EVM interface
DVCC, DGND, SDA, SCL
JTAG
connector
5-V supply
5 V, DGND
Current inputs
I1, I2, I3
Voltage inputs
V1, V2, V3
Figure 29. TIDA-00454 Interface Connectors
The current input wires are taken through the CT and do not have connectors (see Figure 30). The wires
are connected externally as flying leads. An external terminal block can be used to connect the current
inputs.
Figure 30. Current Input Wire Through CT
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Figure 31 shows the interface for the remote temperature sensor TMP451EVM board.
SDA
GND
SCL
3.3 V
Figure 31. TMP451EVM Interface
6.2
External DC Power Supply
The following external power supplies are connected:
• Non-isolated: 5 V and 12 V
• Isolated: 24 V
NOTE: Consider the current limit setting.
See Section 4.5 for more details.
6.3
AC Input Range
The current input range for this design is 0.25 to 10 A. The voltage input range for this design is
23 to 320 V.
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Test Setup
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7
Test Setup
7.1
Test Setup Connection
Figure 32 shows test setup for the TIDA-00737 board. The TIDA-00454 board is interfaced with the
TIDA-00737 board. A programmable three-phase current and voltage source (PTS3.3C) is used for
applying three-phase voltages and currents to the TIDA-00454 board. The remote temperature sensor
TMP451EVM is interfaced with the TIDA-00454 board through I2C serial communication. 5-V, 12-V, and
24-V power supply connections are shown. A three-phase contactor is connected on the relay output of
the TIDA-00737 board. The contactor consists of a contactor coil, main contacts, and auxiliary contacts.
The contactor coil is used to control main contacts and are controlled through the relay output. Auxiliary
contacts are used for auxiliary indication of main contacts position.
PTS3.3C
Test System
Current inputs
Voltage inputs
TIDA-00454 board
TMP451EVM
I2C
Power input
5-V DC source
Power input
12-V DC source
(for relay)
Interface connectors
Interface connectors
24-V DC source
isolated (for TSM)
Power input +
TSM O/P (×2)
TIDA-00737 board
Relay O/P (×3)
Contactor
Figure 32. Test Setup to Connect TIDA-00737 With TIDA-00454
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7.2
Test System
PTS3.3C with a 0.05% accuracy class is used for measurement. Using PTS3.3C provides minimum
uncertainty during measurement.
Figure 33. Three-Phase Test System with Programmable Power Source
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Test Data
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8
Test Data
8.1
Power Supply Testing
The following external power supplies are connected:
• Isolated: 24 V
• Non-isolated: 12 V, 5 V
The following supplies are generated on board using LDOs:
• Isolated: 5 V
• Non-isolated: 3.3 V
See Section 4.5 for more details.
Externally connected and generated power supply voltage levels measured are shown in Table 8.
Table 8. Functional Test Results
PARAMETERS
Non-isolated power supply
Isolated power supply
36
ACTUAL VALUE (VDC)
MEASURED VALUE (VDC)
5
4.98
12
12.01
3.3
3.29
24
24.01
5
5.05
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8.2
Accuracy Testing
Three-phase voltages and currents are applied using the PTS3.3C. Accuracy of voltages, currents, active
powers, and reactive powers for three phases are observed. Measurements were adjusted for gain, offset,
and phase angle as required.
8.2.1
AC Input Voltage Measurement
For measurement at 50 Hz:
Table 9. Input Voltage versus Measurement Error at 50 Hz
APPLIED
VOLTAGE
INPUT (V)
% OF
NOMINAL
MEASURED PHASE VOLTAGE (V)
R
Y
B
MEASUREMENT ERROR (%)
R
Y
MEASURED
FREQ (Hz)
B
5
11.5
11.471
11.472
11.470
–0.25
–0.24
–0.26
10
23.0
22.951
22.952
22.949
–0.21
–0.21
–0.22
20
46.0
45.918
45.920
45.914
–0.18
–0.17
–0.19
50
115.0
114.871
114.891
114.879
–0.11
–0.09
–0.11
100
230.0
229.773
230.005
229.984
–0.10
0.00
–0.01
120
276.0
275.753
275.855
276.103
–0.09
–0.05
0.04
49.99
0.06%
R
Y
B
0.03%
0
-0.03%
Error
-0.06%
-0.09%
-0.12%
-0.15%
-0.18%
-0.21%
-0.24%
-0.27%
0
30
60
90
120 150 180 210
AC Input Voltage (V)
240
270
300
D001
Figure 34. AC Input Voltage versus Measurement Error at 50 Hz
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For measurement at 60 Hz,
Table 10. Input Voltage versus Measurement Error at 60 Hz
APPLIED
VOLTAGE
INPUT (V)
% OF
NOMINAL
MEASURED PHASE VOLTAGE (V)
R
Y
B
MEASUREMENT ERROR (%)
R
Y
MEASURED
FREQ (Hz)
B
5
11.5
11.470
11.469
11.468
–0.26
–0.27
–0.28
10
23.0
22.943
22.944
22.941
–0.25
–0.24
–0.26
20
46.0
45.898
45.900
45.895
–0.22
–0.22
–0.23
50
115.0
114.817
114.832
114.817
–0.16
–0.15
–0.16
100
230.0
229.713
229.916
229.887
–0.12
–0.04
–0.05
120
276.0
275.753
275.999
275.952
–0.09
0.00
–0.02
59.98
0
R
Y
B
-0.03%
-0.06%
-0.09%
Error
-0.12%
-0.15%
-0.18%
-0.21%
-0.24%
-0.27%
-0.3%
0
30
60
90
120 150 180 210
AC Input Voltage (V)
240
270
300
D002
Figure 35. AC Input Voltage versus Measurement Error at 60 Hz
38
Capacitor Bank Switching and HMI Subsystem Reference Design for
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8.2.2
AC Current Input Measurement
For measurement at 50 Hz,
Table 11. Input Current versus Measurement Error at 50 Hz
APPLIED
CURRENT
INPUT (A)
% OF
NOMINAL
PHASE CURRENT MEASURED (A)
R
Y
B
MEASUREMENT ERROR (%)
R
Y
MEASURED
FREQ (Hz)
B
5
0.25
0.250
0.2500
0.2498
0.04
0.00
–0.08
10
0.50
0.500
0.4998
0.4996
0.02
–0.04
–0.08
20
1.00
1.000
0.9990
0.9994
0.00
–0.10
–0.06
50
2.50
2.500
2.4990
2.4980
0.00
–0.04
–0.08
100
5.00
4.996
4.9940
4.9920
–0.08
–0.12
–0.16
200
10.00
9.998
9.9920
9.9890
–0.02
–0.08
–0.11
49.99
0.05%
R
Y
B
0.025%
0
Error
-0.025%
-0.05%
-0.075%
-0.1%
-0.125%
-0.15%
-0.175%
0
1
2
3
4
5
6
7
AC Input Current (A)
8
9
10
D003
Figure 36. AC Input Current versus Measurement Error at 50 Hz
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For measurement at 60 Hz,
Table 12. Input Current versus Measurement Error at 60 Hz
APPLIED
CURRENT
INPUT (A)
% OF
NOMINAL
PHASE CURRENT MEASURED (A)
R
Y
B
MEASUREMENT ERROR (%)
R
Y
MEASURED
FREQ (Hz)
B
5
0.25
0.2500
0.2499
0.2497
0.00
–0.04
–0.12
10
0.50
0.4998
0.4996
0.4994
–0.04
–0.08
–0.12
20
1.00
1.0001
0.9995
0.9990
0.01
–0.05
–0.10
50
2.50
2.5000
2.4962
2.4979
0.00
–0.15
–0.08
100
5.00
4.9990
4.9960
4.9930
–0.02
–0.08
–0.14
200
10.00
9.9940
9.9820
9.9840
–0.06
–0.18
–0.16
59.98
0.025%
R
Y
B
0
-0.025%
Error
-0.05%
-0.075%
-0.1%
-0.125%
-0.15%
-0.175%
-0.2%
0
1
2
3
4
5
6
7
AC Input Current (A)
8
9
10
D004
Figure 37. AC Input Current versus Measurement Error at 60 Hz
40
Capacitor Bank Switching and HMI Subsystem Reference Design for
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8.2.3
Power (Reactive and Active) Measurement
The following inputs were applied and powers were observed for the following conditions:
• AC voltage: 230 V
• Current: 5 A
• Frequency: 50 Hz
• PF: Performed between 0 to 1 (lead or lag)
Table 13. Power Measurement: R-Phase
PF TYPE
APPLIED PHASE ANGLE
BETWEEN CURRENT
AND VOLTAGE
EXPECTED W
MEASURED W
EXPECTED var
MEASURED var
LAG
45
813.05
812.73
813.05
813.35
ZPF
90
UPF
0
1150
N/A
1150.24
1150
LEAD
45
813.05
813.85
1149.58
N/A
813.05
812.44
Table 14. Power Measurement: Y-Phase
PF TYPE
APPLIED PHASE ANGLE
BETWEEN CURRENT
AND VOLTAGE
EXPECTED W
MEASURED W
EXPECTED var
MEASURED var
LAG
45
813.05
813.02
813.05
813.51
ZPF
90
UPF
0
1150
N/A
1150.34
1150
LEAD
45
813.05
813.73
1149.96
N/A
813.05
812.23
Table 15. Power Measurement: B-Phase
PF TYPE
APPLIED PHASE ANGLE
BETWEEN CURRENT
AND VOLTAGE
EXPECTED W
MEASURED W
EXPECTED var
MEASURED var
LAG
45
813.05
812.13
813.05
813.36
ZPF
90
UPF
0
1150
N/A
1149.91
LEAD
45
813.05
814.28
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1150
1149.17
N/A
813.05
811.46
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41
Test Data
8.3
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Functional Testing: SSD Display and LED Indications
An AC voltage of 230 V and AC current of 1 A are applied and the following were observed:
• Display of parameters like voltage, current, and PF
• LED indications
• Display updated every 4 seconds between the selected parameters
• Cyclic display of selected parameters
Table 16. SSD Display and LED Indications
INPUT
PARAMETER
PARAMETERS (OBSERVED)
PHASES (OBSERVED)
PF (OBSERVED)
DISPLAY (SSD)
D14
D15
D11
D12
D13
D16
D10
D7
EXPECTED
OBSERVED
Voltage
Phase R (V)
ON
OFF
OFF
ON
OFF
OFF
OFF
OFF
230.3
230.3
Voltage
Phase Y (V)
ON
OFF
OFF
OFF
ON
OFF
OFF
OFF
230.4
230.4
Voltage
Phase B (V)
ON
OFF
OFF
OFF
OFF
ON
OFF
OFF
230.4
230.4
Current
Phase R (A)
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
1.001
1.001
Current
Phase Y (A)
OFF
ON
OFF
OFF
ON
OFF
OFF
OFF
1.001
1.001
Current
Phase B (A)
OFF
ON
OFF
OFF
OFF
ON
OFF
OFF
1.001
1.001
PF
Phase R (LAG)
OFF
OFF
ON
ON
OFF
OFF
ON
OFF
0.707
0.707
PF
Phase Y (LAG)
OFF
OFF
ON
OFF
ON
OFF
ON
OFF
0.707
0.707
PF
Phase B (LAG)
OFF
OFF
ON
OFF
OFF
ON
ON
OFF
0.707
0.707
PF
Phase R
(LEAD)
OFF
OFF
ON
ON
OFF
OFF
OFF
ON
0.707
0.707
PF
Phase Y
(LEAD)
OFF
OFF
ON
OFF
ON
OFF
OFF
ON
0.707
0.707
PF
Phase B
(LEAD)
OFF
OFF
ON
OFF
OFF
ON
OFF
ON
0.707
0.707
42
Capacitor Bank Switching and HMI Subsystem Reference Design for Automatic
Power Factor Controller
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8.4
Capacitor Bank (Simulated Reactive Power) Switching Test
The design provides:
• Three relay outputs for contactor switching. A three-phase contactor with a main contacts rating of 220
V, 25 A is used for the test. Each relay is connected with a separate contactor. The relay output is
connected to the contactor coil. Auxiliary contact of contactor is monitored for main contact’s switching
status – ON/OFF.
• Two transistor outputs for thyristor switching.
The output switching is simulated by increasing and reducing the reactive power (applying constant
current and voltage and varying the PF).
When multiple relay and transistor output status needs to be changed. the relay and transistor outputs are
switched ON or OFF sequentially with a delay of 4 seconds (See Section 3 of the firmware design guide
(TIDCBV2) for more details).
8.4.1
Increase of Reactive Power
Table 17. Relay and Transistor Switching
INPUT
RELAY K3
RELAY K2
RELAY K1
TRANSISTOR OUT_1
TRANSISTOR OUT_2
var
(V = 230 V,
I = 5 A)
EXPECTED
OBSERVED
EXPECTED
OBSERVED
EXPECTED
OBSERVED
EXPECTED
OBSERVED
EXPECTED
OBSERVED
< 200
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
≥ 200
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
≥ 400
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
≥ 600
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
≥ 800
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
≥ 1000
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
Table 18. LEDs to Indicate Switching Steps
INPUT
D9
D8
D5
D4
D1
var
(V = 230 V,
I = 5 A)
EXPECTED
OBSERVED
EXPECTED
OBSERVED
EXPECTED
OBSERVED
EXPECTED
OBSERVED
EXPECTED
OBSERVED
< 200
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
≥ 200
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
≥ 400
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
≥ 600
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
≥ 800
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
≥ 1000
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
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Test Data
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Reduction of Reactive Power
Table 19. Relay and Transistor Switching
INPUT
RELAY K3
RELAY K2
RELAY K1
TRANSISTOR OUT_1
TRANSISTOR OUT_2
var
(V = 230 V,
I = 5 A)
EXPECTED
OBSERVED
EXPECTED
OBSERVED
Expected
OBSERVED
EXPECTED
OBSERVED
≥ 1000
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
≥ 800
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
≥ 600
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
≥ 400
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
≥ 200
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
< 200
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
EXPECTED
OBSERVED
Table 20. LEDs to Indicate Switching Steps
INPUT
8.5
D9
D8
D5
D4
D1
var
(V = 230 V,
I = 5 A)
EXPECTED
OBSERVED
EXPECTED
OBSERVED
EXPECTED
OBSERVED
EXPECTED
OBSERVED
≥ 1000
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
≥ 800
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
≥ 600
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
≥ 400
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
≥ 200
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
< 200
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
EXPECTED
OBSERVED
ALS Test
Alarm LED D6 indicates ambient light intensity level. The following tests were performed.
Table 21. Ambient Light Status
44
AMBIENT LIGHT
EXPECTED LIGHT ALARM LED (D6)
STATUS
OBSERVED LIGHT ALARM LED (D6)
STATUS
Bright
OFF
OFF
Dim (below 100 lux)
ON
ON
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8.6
Remote Temperature Sensor Test
An environment chamber with the capability to program temperature is used to perform this test. The
TMP451EVM is placed inside the environment chamber. The following temperatures were set and the
temperature alarm LED indication was tested.
Table 22. Remote Temperature Sensor Status
8.7
SET TEMPERATURE (°C)
EXPECTED TEMPERATURE ALARM
LED (D3) STATUS
OBSERVED TEMP ALARM LED (D3)
STATUS
25
OFF
OFF
51
ON
ON
AC Input Voltage — Overvoltage Test
The overvoltage alarm LED D2 indicates the overvoltage level. The following tests were performed.
Table 23. Overvoltage Test
8.8
VOLTAGE INPUT (V)
EXPECTED OVER VOLTAGE ALARM
LED (D2) STATUS
OBSERVED OVER VOLTAGE ALARM
LED (D2) STATUS
230
OFF
OFF
255 (> 110% of 230 V)
ON
ON
Summary of Test Results
Table 24. Test Result Summary
SERIAL NUMBER
PARAMETERS
RESULT
1
Power supply testing
OK
2
AC input measurement accuracy for current, voltage, and powers
OK
3
LEDs alarm and status indication
OK
4
Relay and transistor output testing to indicate switching of capacitor bank
(simulated reactive power)
OK
5
ALS performance
OK
6
Remote temperature sensor performance
OK
7
Scrolling and cyclic display of parameters
OK
8
AC input voltage — overvoltage test
OK
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Design Files
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9
Design Files
9.1
Schematics
To download the schematics, see the design files at TIDA-00737.
5V
5V
5V
5V
DVCC
PM_UCA0CLK
PM_UCA0SIMO
CASCADE
3
2
14
CLK
SDI
SDO
R34
15
R-EXT
DVCC
TP37
1.58k
DGND
16
VDD
MMBT3906
C17
0.1µF
MMBT3906
R31
1.80k
MMBT3906
DIG4
R32
2
R28
20.0k
Q3
1
TP47
DIG3
2
2
1.80k
TP46
TP45
R27
20.0k
Q2
1
Q4
1
1.80k
MMBT3906
D18
TP48
SEG-E
1
K
A
12
SEG-D
2
K
K
11
SEG-A
SEG-H 3
K
K
10
SEG-F
K
A
K
A
A
K
TLC5916ID
C16
1µF
1.80k
R30
3
GND
1
SEG-A
SEG-B
SEG-C
SEG-D
SEG-E
SEG-F
SEG-G
SEG-H
DIG2
3
5
6
7
8
9
10
11
12
R26
20.0k
Q1
1
3
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
R3
3
LE(ED1)
OE(ED2)
TP38
OE_SEG
PM_UCA0CLK
PM_UCA0SIMO
TP44
U4
LE_SEG 4
OE_SEG 13
DIG1
2
R25
20.0k
R2
10kDGND
R38
10k
DGND
SEG-C
4
SEG-G
5
DGND
6
LDQ-M286RI
TP49
9
8
7
SEG-B
TP50
TP51
U5
LE_SEG 4
OE_SEG 13
LE_SEG
OE_SEG
PM_UCA0CLK
PM_UCA0SOMI
PM_UCA0CLK 3
CASCADE
2
PM_UCA0SOMI14
R35
DVCC
15
1.58k
DGND
16
LE(ED1)
OE(ED2)
CLK
SDI
SDO
R-EXT
VDD
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
5
6
7
8
9
10
11
12
GND
1
DIG1
DIG2
DIG3
DIG4
TLC5916ID
C19
0.1µF
DGND
DGND
LE_SEG
OE_SEG
PM_UCA0CLK
PM_UCA0SIMO
PM_UCA0SOMI
TP20TP19TP18TP16TP15
C18
1µF
Figure 38. 7-Segment LED Display + Driver Schematic
46
Capacitor Bank Switching and HMI Subsystem Reference Design for Automatic
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PM_UCA1CLK
PM_UCA1SIMO
PM_UCA1SOMI
PM_UCA1CLK
3
PM_UCA1SIMO 2
PM_UCA1SOMI 22
R33
23
CLK
SDI
SDO
R-EXT
1.80k
DGND
DVCC
24
VDD
GND
D16
TLHG6405
GREEN
D15
TLHG6405
GREEN
D14
RED
D13
TLHR6405
TLHR6405
RED
D12
TLHG6405
GREEN
D11
TLHG6405
GREEN
D10
TLHR6405
RED
D9
TLHR6405
RED
D8
TLHG6405
D7
TLHG6405
D6
TLHR6405
D5
RED
TLHG6405
TLHG6405
TLHR6405
RED
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
D4
GREEN
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
GREEN
LE
OE
D3
GREEN
OE
D2
GREEN
U3
LE 4
OE 21
LE
D1
RED
R4
10kDGND
R39
10k
TLHR6405
DVCC
RED
TLHR6405
5V
1
TLC59025IDBQR
C21
1µF
C22
0.1µF
DGND
LE
OE
PM_UCA1CLK
PM_UCA1SIMO
PM_UCA1SOMI
TP43 TP42 TP41 TP40 TP39
DGND
Figure 39. 16 LEDs + Driver Schematic
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Design Files
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SWITCHES
INTERFACE CONNECTOR
J3
SW1
SW2
RELAY_3
RELAY_2
RELAY_1
DVCC
R36
10.0k
61301021121
R37
10.0k
TP28
TP29
TPD1E10B09DPYR
R29
C26
22µF
C2
10µF
C3
0.1µF
PM_UCA1CLK
RESET_DRV
PM_UCA0SIMO
PM_UCA1SIMO
C23
0.1µF
2
S1
C24
0.1µF
S2
DGND
DGND
67997-416HLF
U6
1
U2
1
LE_SEG
LE
OE_SEG
PM_UCB0SCL
PM_UCB0SDA
PM_UCA0SOMI
PM_UCA0CLK
PM_UCA1SOMI
2
1
2
OE
LE_SEG
LE
OE_SEG
PM_UCB0SCL
PM_UCB0SDA
PM_UCA0SOMI
PM_UCA0CLK
PM_UCA1SOMI
2
4
6
8
10
12
14
16
1
DVCC
1
3
OE 5
7
PM_UCA1CLK
9
RESET_DRV
11
PM_UCA0SIMO 13
PM_UCA1SIMO 15
TPD1E10B09DPYR
R1
100
J5
DGND
SW2
2
100
4
3
SW1
7914G-1-000E
TP14
7914G-1-000E
TP21
DVCC
2
1
SW1
SW2
RELAY_3
RELAY_2
RELAY_1
4
3
2
4
6
8
10
2
1
3
5
7
9
1
nENBL
IN1
IN2
nENBL
IN1
IN2
DGND
5V INPUT
5V
AMBIENT LIGHT SENSOR
TP17
DVCC
J9
1
2
10µF
D20
MMSZ4690T1G
5.6V
DVCC
1
DGND
R24
10k
U10
VDD
C25
SCL
SDA
INT
ADDR
4
6
5
2
GND
PAD
3
7
PM_UCB0SCL
PM_UCB0SDA
R40
10k
R41
10k
TP54
C14
1µF
TP53
C15
0.1µF
TP52
C20
ED120/2DS
0.1µF
OPT3001DNPR
DGND
DGND
Figure 40. Interface Connectors + Ambient Light Sensor Schematic
48
Capacitor Bank Switching and HMI Subsystem Reference Design for Automatic
Power Factor Controller
Copyright © 2015–2016, Texas Instruments Incorporated
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+12V
K1
1
4
J2
2
1
OUT1
RELAY_3
TP24
RELAY_2
TP26
RELAY_3
R8
R11
R6
10k
R5
10k
R7
10k
10k
10k
R9
10k
R10
10k
TP10
TP11
TP12
TP2
2
3
4
5
6
7
8
IN1
OUT1
IN2
OUT2
IN3
OUT3
IN4
OUT4
IN5
OUT5
IN6
OUT6
IN7
OUT7
GND
COM
TPL7407LPW
DGND
DGND
DGND
16
OUT1
15
OUT2
14
OUT3
TP27TP25TP23
RELAY_2
U1
1
13
12
11
10
5
3
+12V
K2
1
4
OUT2
5
3
+12V
K3
+12V
1
4
J1
3
ED120/2DS
G2RL-1A DC12
DGND
MMSZ4702T1G
15V
5
ED120/2DS
D19
J7
2
1
OUT3
DGND
ED120/2DS
G2RL-1A DC12
1
2
C46
10µF
J6
2
1
9
C1
0.1µF
ED120/2DS
G2RL-1A DC12
TP6 TP5 TP4 TP3
RELAY_1
TP22
RELAY_1
Figure 41. Relay Output Schematic
TIDUB67A – December 2015 – Revised March 2016
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49
Design Files
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+24V_ISO
TP33
IN1
TP34
IN2
TP35
RESET_DRV
OUTA
INB
OUTB
13
IN1_ISO
INC
OUTC
12
IN2_ISO
R13
RESET_DRV_ISO
R14
INA
IN1
R21
0
4
IN2
R22
0
5
RESET_DRV
R23
0
TP36
6
1
0.1µF
GND_iso
nENBL_ISO
3
IND
7
NC
2
8
GND1
GND1
OUTD
11
EN
10
GND2
GND2
9
15
nENBL_ISO
IN1_ISO 14
5V_ISO
5V_ISO
GND_iso
ISO7340CDWR
8
R15
R16
10k
0
0
13
VM
IN4
GND_iso
15
DGND
OUT2
4
+24V_ISO
0.1µF
OUT_1
J8
GND_iso
1
2
3
4
OUT_1
TP30
IN2
IN2_ISO 10
16
OUT1
IN1
IN3
RESET_DRV_ISO 9
2
3
ENBL
11
10k
VCLAMP
TP7
R12
10k
16
14
0
U7
C5
VCC2
VCC1
R20
TP13
nENBL
1
nENBL DGND
SMBJ48A-13-F
48V
+24V_ISO
GND_iso
0.1µF
D22
5V_ISO
C10
OUT3
6
OUT4
7
GND
GND
PAD
5
12
17
282834-4
OUT_2
OUT_2
RESET
OUT_1
OUT_2
OUT_1
OUT_2
MMSZ5255B-7-F
C4
0.1µF
5V_ISO
U8
TP8
DVCC
C9
GND_iso
D17
C6
10µF
28V
C8
1µF
C7
0.1µF
GND_iso
FAULT
NC
TP31
DRV8803PWPR
GND_iso
TP1
U9B
3
6
7
C11
5
R18
100k
TPS7A4101DGNR
EN
FB
EP GND
10µF
5V_ISO
TPS7A4101DGNR
OUT
9
NC
NC
NC
IN
TP32
U9A
8
1
2
R17
9.76k
C12
0.01µF
C13
10µF
4
+24V_ISO
D21
MMSZ4690T1G
5.6V
GND_iso
R19
2.98k
GND_iso
TP9
GND_iso
Figure 42. Transistor Output + Digital Isolator 5 V Schematic
50
Capacitor Bank Switching and HMI Subsystem Reference Design for Automatic
Power Factor Controller
Copyright © 2015–2016, Texas Instruments Incorporated
TIDUB67A – December 2015 – Revised March 2016
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Design Files
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9.2
Bill of Materials
To download the bill of materials (BOM), see the design files at TIDA-00737.
9.3
PCB Layout Prints
To download the layout prints, see the design files at TIDA-00737.
9.4
Altium Project
To download the Altium project files, see the design files at TIDA-00737.
9.5
Gerber Files
To download the Gerber files, see the design files at TIDA-00737.
9.6
Assembly Drawings
To download the assembly drawings, see the design files at TIDA-00737.
TIDUB67A – December 2015 – Revised March 2016
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Capacitor Bank Switching and HMI Subsystem Reference Design for
Automatic Power Factor Controller
Copyright © 2015–2016, Texas Instruments Incorporated
51
References
10
www.ti.com
References
1. Texas Instruments, AC Voltage and Current Transducer With DC Analog Outputs and Digital Output
Drivers, TIDA-00454 Design Guide (TIDUAH1)
2. Texas Instruments, Three-Phase Metrology With Enhanced ESD Protection and Tamper Detection,
TIDM-3PHMTR-TAMP-ESD Design Guide (TIDU817)
3. Texas Instruments, WEBENCH® Design Center (http://www.ti.com/webench)
11
Terminology
CT— Current transformer
ALS— Ambient light sensor
PFC— Power factor controller
APFC— Automatic power factor correction
LED— Light emitting diode
NO— Normally open
NC— Normally closed
TSM— Thyristor switching module
12
About the Authors
PRAHLAD SUPEDA, Systems Engineer at Texas Instruments India, is responsible for developing
reference design solutions for Grid Infrastructure within industrial systems. Prahlad brings to this role his
extensive experience in power electronics, EMC, analog, and mixed signal designs. Prahlad earned his
bachelor of instrumentation and control engineering from Gujarat University, India. He can be reached at
prahlad@ti.com.
KALLIKUPPA MUNIYAPPA SREENIVASA, is a Systems Architect at Texas Instruments, is responsible
for developing reference design solutions for the industrial segment. Sreenivasa brings to this role his
experience in high-speed digital and analog systems design. Sreenivasa earned his bachelor of
electronics (BE) in electronics and communication engineering (BE-E&C) from VTU, Mysore, India.
AMIT KUMBASI, Systems Architect at Texas Instruments Dallas, is responsible for developing subsystem
solutions for Grid Infrastructure within industrial systems. Amit brings to this role his expertise with defining
products, business development and board level design using precision analog and mixed-signal devices.
He holds a master’s in ECE (Texas Tech) and MBA (University of Arizona). He can be reached at amitkg@ti.com.
52
Capacitor Bank Switching and HMI Subsystem Reference Design for
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Revision History
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Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
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