Novel Design Procedure for MOSFET Class E Oscillator

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Novel Design Procedure for MOSFET Class E Oscillator
Hiroyuki Hase, Hiroo Sekiya, Jianming Lu and Takashi Yahagi
Graduate School of Science and Technology, Chiba University
1-33, Yayoi-cho, Inage-ku, Chiba, 263-8522, Japan
Phone:+81-43-290-3276, Fax:+81-43-290-3269
Email:sekiya@faculty.chiba-u.jp
Abst ract — This paper presents a novel design procedure for
class E oscillator. It is the characteristic of the proposed design
procedure that a free-running oscillator is considered as a forced
oscillator and the feedback waveform is tuned to the timing of the
switching. By using the proposed design procedure, it is possible
to design class E oscillator that cannot be designed by the conventional one. By carrying out a circuit experiment, we find that
the experimental result agrees with the calculated one, and show
the validity of the proposed design procedure. The experimental
measured power conversion efficiency is 89.7% under 2.8W output power at an operating frequency 1.97MHz.
VD
SD
LC
Rd1
ic
S
L0 C0
vs
i
Rd2
vf
I. Introduction
Class E oscillator [1], [2] is one of class E family and is driven
by the feedback voltage transformed from the output voltage.
Class E oscillator is especially applicable at high frequency and
may be as high-efficiency, high stability FM oscillator. However, class E switching need to satisfy two conditions, that is,
zero voltage and zero slope of voltage switching. Therefore, it
is quite difficult to determine the values of circuit elements.
The conventional design procedure for class E oscillator in
[1] and [2] can be divided into two parts. One is the design of
class E amplifier [3], [4] and the other is that of the feedback
network [5], [6]. High output Q, infinite dc-feed inductance
and zero switch on resistance are assumed in the design of [1]
and [2]. In the design of the feedback network, the design values are determined by using the relation of phase-shift between
input and output of the feedback network which is given by
AC analysis. Therefore, the output voltage of the amplifier,
namely the input voltage of the feedback network, is assumed
as a sinusoidal waveform. As a result, output Q must be high
in the design of [1] and [2]. However, low Q is required for
high power output since the voltage across the resonant circuit
becomes high. Moreover, finite dc-feed inductance is effective
to minimize the circuit scale. Furthermore, the power losses
at switch on resistance affect the power conversion efficiency.
So it is worth considering switch on resistance in the design.
Therefore, it is required to establish the design procedure with
any conditions, i.e., any output Q, finite dc-feed inductance and
switch on resistance.
This paper presents a novel design procedure for class E oscillator. And we clarify the design curves of class E oscillator
for any conditions. It is the characteristic of the proposed design procedure that a free-running oscillator is considered as
a forced oscillator and the feedback waveform is tuned to the
timing of the switching. In the proposed design procedure, we
consider class E oscillator as one circuit though it is divided
into class E amplifier and the feedback network for the conventional design. The proposed design procedure requires only
circuit equations and design specifications. The other processes
for computations of the design values are carried out with aid
of computer. Therefore, class E oscillator with any conditions
can be designed by the proposed design procedure. As a result,
we can design class E oscillator that cannot be designed by the
conventional design procedure. By carrying out the circuit experiment, we find that the experimental result agrees with the
v v1
C1
v2
C2
CS
R
v0
Lf
if
VD
LC
Rd1
rc
ic
vs
S
L0 r0 C0
i
CS
v
v0
C1
Lf
v1
R v2
if
C2
rf
vg
Cg
Rd2
vf
rg
rs
(b)
Fig. 1. Class E oscillator. (a)Circuit topology. (b)Equivalent circuit.
calculated one quantitatively, and show the validity of the proposed design procedure. The proposed design procedure can
be applicable to the design for many kinds of free-running oscillators [6].
II. Circuit Description
Figure 1 (a) shows the circuit topology of class E oscillator.
Class E oscillator consists of an input direct voltage source VD ,
a starting-up switch S D , a dc-feed inductor LC , a MOSFET as a
switching device S , a capacitor CS shunting the switch, a series
resonant circuit L0 − C0 − R, two capacitors C1 and C2 , and a
feedback inductor L f . Rd1 and Rd2 are resistors for supplying
the bias voltage to the MOSFET and they are large enough to
neglect the current through them [2]. Figure 1 (b) shows the
equivalent circuit in this paper. In this figure, Cg and rg are
equivalent series capacitance and resistance between gate and
source of the MOSFET. rS is switch on resistance. Moreover,
rC , r0 and r f are parasitic resistance of LC , L0 and L f , respectively. The nominal waveforms of class E oscillator are shown
in Fig. 2. The switching losses are reduced to zero by the operating requirements of zero and zero slope of switch voltage
ic
vo
TABLE I
0
π
0
vf
vs
π
π
OFF 2π
θ
θ
2π
Vth
0
0
π
θ
2π
θ
2π
ON
Fig. 2. Nominal waveforms of class E oscillator.
(vS = 0 and dvS /dt = 0) at the turn on trandition, called class
E switching conditions. The output voltage vo of the oscillator
is given as vo = v1 + v2 . The feedback voltage v f is the driving
signal for the MOSFET. When the driving signal is larger than
the threshold voltage Vth of the MOSFET, the MOSFET is in
on state. On the other hand, in case of v f < Vth , the MOSFET
is in off state.
III. The Proposed Design Procedure for Class E Oscillator
In this section, we present the design procedure for class E
oscillator. This design procedure is based on the design procedure for class E amplifier without using waveform equations
[4]. The circuit of [4] is a forced oscillation system. This paper applies the design procedure of [4] to that of a free-running
oscillator.
A. Assumptions and Parameters
At first, the following parameters of the circuit are defined.
√
1. ω0 = 2π f0 = 1/ L0C0 : The resonant angular frequency
in the amplifier.
2. ω f = 1/ L f Cg : The resonant angular frequency in the
feedback network.
3. A = (ω0 /ω)2 = ( f0 / f )2 : A square value of the ratio of
the resonant frequency in the amplifier to the operating
(switching) frequency.
4. B = C0 /CS : The ratio of the capacitance of a resonant
circuit capacitor to a capacitor shunting the switch S .
5. H = L0 /LC : The ratio of the inductance of a resonant
circuit inductor to a dc-feed inductor.
6. J = C0 /C1 : The ratio of the capacitance of a resonant
circuit capacitor to a feedback network capacitor.
7. K = C1 /C2 : The ratio of the capacitance between two
capacitors in the feedback network.
8. M = (ω f /ω)2 = ( f f / f )2 : A square value of the ratio
of the resonant frequency in the feedback network to the
operating (switching) frequency.
9. Q = ωL0 /R : The loaded quality factor of the resonant
circuit L0 − C0 − R.
10. Q f = ωL f /rg = 1/ωMCg rg : The loaded quality factor of
the resonant circuit L f − Cg − rg .
Next, the design given below is based on the following assumptions.
1. The switching device S has zero switching times, infinite
off resistance and on resistance rS . In this paper, we use
An example model of IRF530 MOSFET
threshold voltage Vth
switch on resisteance rS
gate-source capacitance Cg
gate-source resistance rg
3.0V
0.16Ω
1.66nF
2.36Ω
IRF530 MOSFET as a switching device. Table 1 shows an
example model of IRF530 MOSFET. In this table, Vth and
rS are used from the FET manual. rg and Cg are measured
values by HP 16047A.
2. The inductors have equivalent series resistance(ESR’s).
3. All passive elements including switch on resistance and
ESR’s operate as linear elements.
4. The shunt capacitance CS includes switch device capacitance.
5. The operating frequency f is assumed as f < 8.5MHz.
From Cg and rg in Tab. 1, we can assume high Q f (Q f >
5) if f < 8.5MHz is satisfied. High Q f means that the
feedback waveform v f is sinusoidal. Hence, the switch
on duty ratio of the oscillator is thought as 0.5 under this
assumption.
B. Circuit Equation
We consider the circuit operation in the interval 0 ≤ θ ≤ 2π,
where θ = ωt represents angular time. And the circuit equations are expressed as follows:
⎧
diC
H
⎪
⎪
⎪
=
(VD − vS − rC iC )
⎪
⎪
⎪
dθ
QR
⎪
⎪
⎪
⎪
vS
dvS
⎪
⎪
⎪
− i)
= ABQR(iC −
⎪
⎪
⎪
dθ
R
⎪
S
⎪
⎪
⎪
dv
⎪
⎪
⎪
= AQRi
⎪
⎪
⎪
dθ
⎪
⎪
⎪
di
1
⎪
⎪
⎪
=
(vS − v − v1 − v2 − r0 i)
⎪
⎪
⎪
dθ
QR
⎪
⎪
⎪
v1 + v2
⎨ dv1
(1)
= AJQR(i −
)
⎪
⎪
⎪
dθ
R
⎪
⎪
⎪
dv2
v1 + v2
⎪
⎪
⎪
= AJKQR(i −
− if )
⎪
⎪
⎪
dθ
R
⎪
⎪
⎪
di f
⎪
⎪
⎪
⎪
= ωMCg (v2 − v f − r f i f )
⎪
⎪
⎪
dθ
⎪
⎪
⎪
dvg
VD − v f
vf
1
⎪
⎪
⎪
(i f +
−
)
=
⎪
⎪
⎪
dθ
ωC
R
R
g
d1
d2
⎪
⎪
⎪
⎪
dvg
⎪
⎪
⎪
.
⎩ v f = vg + ωrgCg
dθ
In (1), RS means the
define that the switch S
RS =
resistance of the switch S . When we
turns on at θ = 0, RS is expressed as
rS (0 ≤ θ ≤ π)
∞ (π ≤ θ ≤ 2π).
(2)
In the proposed design procedure, we assume a forced oscillation like (2) by using assumption 5. And the design values
are determined by tuning the phase of the feedback voltage v f
to the timing of the switching.
When we define x(θ) = [x1 , x2 ,..., x8 ] T = [iC , vS , v, i, v1 , v2 ,
i f , vg ] T ∈ R8 , (1) can be written as
dx
= f (θ, x, λ)
dθ
(3)
where λ = [A, B, H, Q, J, K, M, Cg , ω, VD , rS , rg , rC , r0 , r f ,
R, Rd1 , Rd2 ] T ∈ R18 .
(4)
is given. Therefore,
ϕ(2π, x0 , λ) − ϕ(0, x0 , λ) = 0
∈ R8
ϕ8 (0, x0 , λ) + ωrgCg
ϕ8 (0, x0 , λ)
= Vth
dθ
0.8
0.7
0.6
0.5
0.4
0.3
0
5
10
15
20
3
2.5
2
1.5
1
0.5
0
The loaded quality factor Q
(a)
(5)
is given as the boundary conditions between θ = 0 and θ = 2π.
In order to design class E oscillator, we have to consider the
conditions for class E switching and the phase matching of
driving signal of the MOSFET. The class E switching conditions mean that both the voltage and the slope of the voltage
of the switch are zero when switch S turns on. Therefore, the
equations
ϕ2 (2π, x0 , λ) = 0
(6)
dϕ2 (θ, x0 , λ) = ABQR(ϕ1 (2π, x0 , λ) − ϕ4 (2π, x0 , λ)) = 0
dθ
θ=2π
(7)
are given. The phase matching of driving signal of the MOSFET means that the feedback voltage v f is equal to Vth when
switch S turns on. Therefore, the equation
The ratio of the capacitance B
∀θ
The ratio of the frequencies M
ϕ(θ + 2π, x0 , λ) = ϕ(θ, x0 , λ)
1
0.9
1.1
The efficiency of the oscillator η(%)
We assume that (1) has a solution x(θ) = ϕ(θ, x0 , λ) = [ϕ1 ,
ϕ2 ,..., ϕ8 ]T defined on −∞ < θ < ∞ with every initial condition
x0 and every λ : x(0) = ϕ(0, x0 , λ). If the oscillator is in the
steady state, the equation :
The ratio of the frequencies A
C. Conditions for The Design
1
0.9
0.8
0.7
0.6
0
5
10
15
20
The loaded quality factor Q
(c)
0
5
10
15
20
5
10
15
20
The loaded quality factor Q
(b)
100
80
60
40
20
0
0
The loaded quality factor Q
(d)
Fig. 3. The design parameters as a function of Q for H = 0.001, J = 1.0 and
K = 0.1. (a)The design curve of A. (b)The design curve of B. (c)The design
curve of M. (d)The power conversion efficiency η.
(8)
is given.
From above considerations, we recognize that the design of
class E oscillator boils down to the derivation of the solution
of the algebraic equations (5)–(8). In these equations, we have
11 algebraic equations and 8 unknown initial values, namely
x0 ∈ R8 . Therefore, 3 parameters can be set as the design
parameters from λ ∈ R18 . In this paper, we set A, B, and M
as unknown parameters. And the other parameters are given as
the design specifications. As a result, we can get the algebraic
equations in shape as follows:
Here, Vo is the root mean square output voltage vo that is given
by
2π
1
{vo (θ)}2 dθ,
(11)
Vo =
2π 0
and IC is the mean square input current iC that is given by
IC =
1
2π
2π
iC (θ)dθ.
(12)
0
For the calculations of the integrations of v2o and iC in (11) and
⎤
(12), we apply trapezoidal method in this paper. The design
⎥⎥⎥
curves of A and B vary rapidly at about Q = 7.5. That is be⎥⎥⎥
⎥⎥⎥
cause Q = 7.5 is the boundary between under-damped case
⎥⎥⎥ = 0. (9)
and over-damped case. For Q > 7.5, the waveforms for this
⎥⎥⎦
region are almost same since the current i through the resonant
circuit is sinusoidal regardless of Q. Therefore, the variations
Applying Runge-Kutta method and Newton’s method to (9), of the design parameters are small for Q > 7.5. On the other
the unknown parameters can be found, and the design values, hand, for Q < 7.5, the variations of the design parameters are
that is, A, B and M are determined. The procedure for calcula- large since the current i through the resonant circuit is nonsinusoidal. From Fig. 3(c), we can find that the variation of M is
tions of Newton’s method is the same as in [4].
small. This is because the phase-shift between input and output
In class E oscillator, the condition for easy starting is of the feedback network has a little change even if the current
VD Rd2 /(Rd1 + Rd2 ) > Vth . If this condition is satisfied, class i through the resonant circuit is nonsinusoidal. From Fig. 3(d),
E oscillator starts up whenever the switch S D is turned on.
the power conversion efficiency η of the oscillator keeps over
⎡
ϕ(2π, x0 , A, B, M) − ϕ(0, x0 , A, B, M)
⎢⎢⎢
⎢⎢⎢
ϕ2 (2π, x0 , A, B, M)
⎢⎢⎢
ϕ1 (2π, x0 , A, B, M) − ϕ4 (2π, x0 , A, B, M)
⎢⎢⎢
⎢⎢⎣
ϕ8 (0, x0 , A, B, M)
ϕ8 (0, x0 , A, B, M) + ωrgCg
− Vth
dθ
IV. Discussion of The Results
In this section, we show the design curves of class E oscillator. At first, the design specifications are given as follows:
f = 2.0MHz, VD = 12V, R = 10Ω, J = 1.0, K = 0.1, Rd1 =
750kΩ, Rd2 = 250kΩ and rC = r0 = r f = 0Ω. Moreover, rS , Cg
and rg are the same as in Tab. 1.
Figure 3 shows the design curves of A, B, M and the power
conversion efficiency η of class E oscillator as a function of Q.
In this figure, the power conversion efficiency η is given by
η=
Vo2 /R
.
VD IC
(10)
than 90% for Q > 2. On the other hand, the characteristic curve
of η varies rapidly for Q < 2. Therefore, we think that Q = 2 is
the lower limit of Q for these specifications. From this figure,
we can find that the design parameters are greatly influenced
by the waveforms of the current i through the resonant circuit.
Figure 4 shows the design curves of A, B, M and the power
conversion efficiency η of the oscillator as a function of H for
Q = 3, 5, and 10. When H is small, LC works as RF choke
and the input current iC is direct. Therefore, the design parameters are almost constant for small H. However, in the range
of large H, the design parameters are varied since LC works as
finite dc-feed inductance and iC is not direct. From Fig. 4(c), it
is confirmed that M varies as H varies. This result shows that
0.7
Q=10
Q=5
Q=3
0.6
0.5
0.001
0.01
0.1
1
10
1
0.95
0.9
Q=10
Q=5
Q=3
0.85
0.8
0.75
0.001
0.01
0.1
1
10
The ratio of the inductance H
(c)
ic
1.5
0
22
π
θ
2π
0
9
π
θ
2π
0
-7
13.5
3
0
-7.5
π
θ
2π
1
0.5
0
0.001
0.01
0.1
1
10
The ratio of the inductance H
(b)
The efficiency of the oscillator η(%)
The ratio of the frequencies M
The ratio of the inductance H
(a)
Q=10
Q=5
Q=3
vs
0.8
2
vo
0.9
2.5
vf
The ratio of the capacitance B
The ratio of the frequencies A
0.95
1
94
OFF
π
θ
2π
(b)
(a)
Fig. 5. Experimental results for f = 2.0MHz, VD = 6V, R = 10Ω, H = 1,
Q = 3, J = 1.0 and K = 0.1. (a)Experimental waveforms. Vertical: iC : 1A/div,
vS , vo and v f : 10V/div. Horizontal: 200ns/div (b)Calculated waveforms.
Q=10
Q=5
Q=3
93
ON
92
91
90
89
0.001
0.01
0.1
1
10
The ratio of the inductance H
(d)
Fig. 4. The design parameters as a function of H for J = 1.0 and K = 0.1.
(a)The design curve of A. (b)The design curve of B. (c)The design curve of M.
(d)The power conversion efficiency η.
the parameter of the amplifier affects the design of the feedback network and denotes the importance of our opinion that
class E oscillator should be considered as one circuit at the design. From Fig. 4(a)–(c), there are limitations of H for these
specifications. The maximum values of H are 3.4, 3.2 and 4.3
for H = 3, 5 and 10, respectively in Fig. 4. Moreover, from
Fig. 4(d), the power conversion efficiency η increases as H increases. Therefore, finite dc-feed inductance achieves not only
the miniaturization of circuit scale but also high efficiency operation.
From Fig. 3 and Fig. 4, it is confirmed that we can derive
the design values of class E oscillator with any output Q, finite
dc-feed inductance and switch on resistance. When we notice
the power conversion efficiency η, class E oscillator should be
designed for high Q and high H. When we notice the miniaturization of circuit scale, class E oscillator should be designed
for low Q and high H.
V. Experimental Results
At the experiment, class E oscillator with low Q and high H
is designed. In these specifications, it is impossible to design
class E oscillator by the conventional design procedure. The
design specifications are the operating frequency f = 2.0MHz,
the input voltage VD = 6V, R = 10Ω, H = 1, Q = 3, J = 1.0
and K = 0.1. From the above specifications, LC and L0 are determined as LC = L0 = 2.39µH. From these inductors, ESR’s
of LC and L0 can be measured as rC = 0.09Ω and r0 = 0.09Ω.
The resonant frequency in the feedback network is nearly equal
to the operating frequency. Therefore, we assume r f = 0.14Ω
from the relation of L0 and r0 . We use these values of ESR’s
for the calculations of the design. In his experiment, we use
IRF530 MOSFET whose characteristics are measured as shown
in Tab. 1. From VD =6V and Vth =3V, we give Rd1 = Rd2 =
750kΩ. By using our design procedure, we derive the design
parameters as A = 0.624, B = 1.211 and M = 0.920. From
these parameters, the element values of class E oscillator are
derived. Figure 5 depicts the experimental waveforms and the
calculated ones. From this figure, the input current iC is not direct and the output voltage vo is nonsinusoidal because of high
H and low Q. The experimenal waveforms are satisfied with
class E switching conditions. Therefore, we can confirm that
the design values which are satisfied with the desired conditions can be determined in spite of low Q and high H by using
proposed design procedure. In this circuit experiment, class
E oscillator achieves 89.7% power conversion efficiency under
2.8W, 1.97MHz output operation.
In the experiments, class E oscillator starts up whenever the
switch S D is turned on.
In Fig. 5(a), the experimental waveform of v f are afffected by
switching characteristics of the MOSFET. Therefore, the waveform of v f lose its shape a little.
From Fig. 5, we find that the experimental result agree with
the calculated one and we show the validity of the proposed
design procedure.
VI. Conclusion
This paper has presented a novel design procedure for class
E oscillator. And the design curves of class E oscillator for
any conditions have been clarified. It is the characteristic of
the proposed design procedure that a free-running oscillator is
considered as a forced oscillator and the feedback waveform is
tuned to the timing of the switching. Moreover, in the proposed
design procedure, we consider class E oscillator as one circuit
though it is divided into class E amplifier and the feedback network for the conventional design. By carrying out a circuit
experiments, we find that the experimental result agrees with
the calculated one, and show the validity of the proposed design procedure. The experimental measured power conversion
efficiency is 89.7% under 2.8W output power at an operating
frequency 1.97MHz for low Q and high H. The proposed design procedure is applicable to the design for many kinds of
oscillators.
References
[1] J.Evert and M.Kazimierczuk, “Class E High-Efficiency Tuned
[2]
[3]
[4]
[5]
[6]
Power Oscillator”, IEEE J.Solid-State Circuits, vol. SC-16, NO.
2, Apr.1981.
D.V.Chernov, M.K.Kazimierczuk and V.G.Krizhanovski
“Class-E MOSFET low-voltage power oscillator”, Proceedings
of IEEE International Symposium on Circuits and Systems,
vol.5, Phoenix, AZ, May 2002, pp.509-512.
N.O.Sokal and A.D.Sokal, “Class E-A new class of highefficiency tuned single-ended switching power amplifier”, IEEE
J.Solid-State Circuits, vol. SC-10, pp.168-176, June 1975.
H.Sekiya, I.Sasase and S.Mori “Computation of design values
for class E amplifiers without using waveform equations”, IEEE
Trans.Circuits Syst-I, vol. 49, NO. 7, Jul. 2002.
M.Matsuo, H.Sekiya, T.Suetsugu, K.Shinoda and S.Mori “Design of a High-Efficiency Class DE Tuned Power Oscillator”,
IEEE Trans.Circuits Syst-I, vol. 47, NO. 11, Nov. 2000.
M.Kazimierczuk “A New Approach to the Design of Tuned
Power Oscillators”, IEEE Trans.Circuits Syst, vol. CAS-29, NO.
4, Apr. 1982.
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