Differential ADC driver design for poweroptimized and space-constrained systems
Maithil Pachchigar - December 23, 2014
A growing number of applications in the consumer, industrial, instrumentation, and healthcare
market demand low power and reduced system size, therefore designers are continually pressed to
find innovative ways to achieve the maximum performance at lower cost in their system. This article
focuses on the low power and low cost solution using a differential ADC driver for a space
constrained 16-bit and 18-bit data acquisition systems, and highlights its key performance metrics.
Modern high resolution SAR ADCs, such as the ultra-low power, 18-bit, 1 MSPS AD7982 and the 16bit, 1 MSPS, dual AD7903 PulSAR® ADCs require a differential driver for optimum performance. In
such applications, the ADC driver takes either a differential or single-ended signal and performs the
level shifting required to drive the inputs of the ADC at the full-scale level.
Low Power, Fully Differential 18-Bit ADC Driver
A low power, low noise, fully differential amplifier, ADA4940-1, is manufactured using SiGe
complementary bipolar process, which is optimum for driving 16-bit and 18-bit ADCs with minimal
degradation in performance. As shown in Figure 1, it drives the differential inputs of the AD7982,
18-bit, 1 MSPS ADC and the ADR435, low noise precision 5 V reference is used to supply the 5 V
needed for the ADC. The ADR435 provides sufficient output current and eliminates the need of a
reference buffer by using a 22µF decoupling capacitor on the REF pin of the AD7982. All the ICs
shown in Figure 1 are available in small packages, either 3 mm × 3 mm LFCSP, or 3 mm × 5 mm
MSOP, which helps reduce board cost and space.
Figure 1. High Performance, 18-bit, 1MSPS Fully Differential ADC Driver (Simplified
Schematic: All Connections and Decoupling Not Shown)
The ADA4940-1 allows the user to do the necessary signal conditioning to attenuate or amplify the
signal for more dynamic range using four resistors. The gain is set by the ratio of the feedback
resistor (R2 = R4) to the gain resistor (R1 = R3), and R1 = R2 = R3 = R4 = 1 kΩ. For balanced
differential input signal, the effective input impedance would be 2× gain resistor (R1 or R3) = 2 kΩ,
and for unbalanced (single-ended) input signal, the effective impedance would be approximately
1.33 kΩ using the equation:
If needed, a termination resistor in parallel with the input can be used.
A single-pole 2.7 MHz R-C (22 Ω, 2.7 nF) filter is placed between the op amp output and the ADC
input to help limit the noise at the ADC inputs and reduce the effect of kickbacks coming from the
capacitive DAC input of SAR ADC.
The AD7982 operates from a single VDD supply of 2.5 V and dissipates only 6.1 mW at 1 MSPS using
a 5 V reference and 3 V VIO. Its power also scales linearly with the throughput as shown in Figure 2.
It contains a low power, high speed, 18-bit sampling ADC and a versatile digital serial interface. The
reference voltage of the ADC can be set independently of the supply voltage (VDD) that dictates the
input full-scale range of the ADC. In this case, the 5 V reference voltage for the AD7982 is applied
externally on the REF pin from the ADR435 precision band gap reference, which operates from an
on-board 7.5 V supply and dissipates typically 4.65 mW.
Figure 2. AD7982 Power Dissipation vs. Throughput
The ADA4940-1 operates from a 5 V single supply and dissipates typically 6.25 mW. Its rail-to-rail
outputs can be driven to within 0.1 V of each power rail with a minimal degradation in ac
performance for an audio frequency range. Its outputs swing from 0 V to 5 V with a 2.5 V commonmode and accommodate a full-scale input to the ADC.
The total power dissipation of the data acquisition system including ADC driver, ADC, and reference
would be around 17 mW.
Noise Analysis of Fully Differential ADC Driver
Noise Analysis of Fully Differential ADC Driver
The expected SNR of this 18-bit, 1 MSPS data acquisition system can be calculated theoretically by
taking the root sum square (RSS) of each noise source.
The ADA4940-1 offers low noise performance of typically 3.9 nV/√Hz at 100 kHz as shown in Figure
3.
Figure 3. ADA4940 Noise Over Frequency Range
It is important to calculate the noise gain of the differential amplifier in order to find its equivalent
output noise contribution.
The noise gain of the differential amplifier is: NG = 2/(β1 + β2) = 2 V/V, where β1= R1/(R1 + R2) =
0.5 and β2= R3/(R3 + R4) = 0.5 are two feedback factors.
The following differential amplifier noise sources should be taken into account:
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Since the ADA4940-1 input voltage noise is 3.9 nV/√Hz, its differential output noise would be 7.8
nV/√Hz.
The ADA4940-1 common-mode input voltage noise (eOCM) is 83 nV/√Hz from the data sheet, so its
output noise would be –eOCM × (β1 – β2) × NG = 0.
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Noise from the R1, R2, R3, and R4 resistors can be calculated based on Johnson-Nyquist noise
equation for a given bandwidth. eRn = √4KBTR, where KB is Boltzmann’s constant (1.38065 x 10–23
J/K), T is the resistor’s absolute temperature in Kelvin, and R is the resistor value in ohms (Ω). The
noise form the feedback resistors would be eR2 = eR4 = 4.07 nV/√Hz. The noise from the R1 would
be eR1 × (1 – β1) ×NG = 4.07 nV/√Hz and R3 would be × (1-β2) × NG = 4.07 nV/√Hz.
The ADA4940-1 current noise is 0.81 pA/√Hz from the data sheet.
Inverting input voltage noise: iIN– × R1|| R2 × NG = 0.81 nV/√Hz.
Noninverting input voltage noise: iIN+ × R3|| R4 × NG = 0.81 nV/√Hz.
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So, the equivalent output noise contribution from the ADA4940 would be:
The total integrated noise at the ADC input (after RC filter) would be 11.33nV/√Hz × = 23.26 µV
rms.
The rms noise of AD7982 can be calculated from its data sheet typical signal-to-noise ratio (SNR) of
98 dB for a 5V reference.
Using these numbers, the total noise contribution from the ADC driver and ADC would be
Note that the noise contribution from the reference is ignored in this case as it’s negligible.
So, the theoretical SNR of the data acquisition system can be estimated as shown below.
For the tests on this circuit, the audio precision signal generator provides a 10 V p-p differential
output to maximize the ADC dynamic range using a 5 V reference. With an output common-mode
voltage of 2.5 V, each ADA4940-1 output swings between 0 V and 5 V, opposite in phase, providing a
gain of 1 and a 10 V p-p differential signal to the ADC input. The AD7982 achieves typically 96.67 dB
of SNR and –111.03 dB of THD for a 1 kHz input signal as shown in its FFT performance of Figure 4.
The measured SNR of 96.67 dB in this case is pretty close to the theoretical estimated SNR of 96.95
dB above. The actual loss from the target SNR of data sheet specified 98 dB is attributed to the
equivalent output noise contribution from the ADA4940 differential amplifier circuit.
The ADA4940-1 internal common-mode feedback loop forces common-mode output voltage to equal
the voltage applied to the VOCM input and offers an excellent output balance. The differential output
voltage depends on VOCM when two feedback factors β1 and β2 are not equal and any imbalance in
output amplitude or phase produces an undesirable common-mode component in the output and
causes a redundant noise and offset in the differential output. Therefore, it’s imperative that the
combination of input source impedance and R1 (R3) should be 1kΩ in this case (i.e. β1 = β2) to avoid
the mismatch in common-mode voltage of each output signal and prevent the increase in common
mode noise coming from the ADA4940-1.
Figure 4. FFT Plot for a 1 kHz Input Signal with a Sampling Frequency of 1 MSPS
(ADA4940-1 Configured as Fully Differential Driver)
The typical INL and DNL performance of the AD7982 is shown in Figure 5.
Figure 5. INL and DNL Plot with Sampling Frequency of 1 MSPS
(Min/Max INL = +1.6/–1.1 LSB and DNL = ±0.5 LSB)
Low Power, Single-Ended-to-Differential 18-Bit ADC Driver
Low Power, Single-Ended-to-Differential 18-Bit ADC Driver
The same circuit can also accept a ±5 V single-ended input signal to generate the fully differential
output signal of 10 V p-p and drive the ADC inputs as shown in Figure 6. The AD7982 achieves
typically 95.89 dB of SNR and –110.14 dB of THD for a 1 kHz input signal as shown in its FFT
performance of Figure 7.
Figure 6. High Performance, 18-Bit, 1MSPS Single-Ended-to-Differential ADC Driver
(Simplified Schematic: All Connections and Decoupling Not Shown)
Figure 7. FFT Plot for a 1 kHz Input Signal with a Sampling Frequency of 1 MSPS
(ADA4940-1 Configured as Single-Ended-to-Differential Driver)
Evaluation Setup
The simplified test setup using the ADA49xx-1 EVAL-BRDZ, EVAL-AD7982SDZ PulSAR® AD7982
evaluation board connected to the system demonstration platform (EVAL-SDP-CB1Z) is shown in
Figure 8 and actual evaluation setup in the lab is shown in Figure 9.
Figure 8. Evaluation Setup Functional Block Diagram
Figure 9. Evaluation Setup in the Lab
A low distortion signal source, the Audio Precision® SYS-2702, is used in all above cases to achieve
the required performance. A PC with Windows® XP or Windows 7 equipped with a USB port is used
to run the AD7982 PulSAR evaluation software.
Low Power, Fully Differential 16-Bit ADC Driver
The ADA4940-2 fully differential dual amplifier’s excellent dynamic performance and adjustable
output common-mode makes it ideal for driving high resolution, dual SAR ADCs such as AD7903, as
shown in Figure 10. Powered from a single 5 V supply, the ADA4940-2 provides ±5 V differential
outputs with a 2.5 V common-mode and dissipates round 12.5 mW power, available in a tiny 4 mm ×
4 mm, 24-lead LFCSP. Available in a 8.66 mm × 4 mm, 20-lead QSOP, the AD7903 dual, 16-bit, 1
MSPS differential SAR ADC operates from a single 2.5 V power supply and dissipates only 12 mW at
1 MSPS, which linearly scales with throughput.
The 5 V reference voltage for the AD7903 is applied externally on the REF1 and REF2 pins from the
ADR435 precision band gap reference, which operates from an on-board +7.5 V supply and
dissipates typically 4.65 mW. The total power dissipation of the data acquisition system including
ADC driver, ADC, and reference would be less than 30 mW. The signal chain performance summary
including histogram, time domain response, and FFT analysis for one of the ADCs is shown in Figure
11.
The AD7903 offers excellent precision and achieves typically 94.3 dB of SNR and –110.55 dB of THD.
The circuit in Figure 10 can be modified similar to Figure 6 to accept a ±5 V single-ended input
signal on two of the ADA4940-2 amplifiers to generate the fully differential output signal of 10 V p-p
and drive the inputs of dual ADCs differentially with minimal degradation in ac performance.
Figure 10. High Performance, 16-Bit, 1MSPS Fully Differential Dual ADC Driver (Simplified
Schematic: All Connections and Decoupling Not Shown)
Figure 11. FFT Plot for a 1 kHz Input Signal with a Sampling Frequency of 1 MSPS
(ADA4940-2 Configured as Fully Differential Driver)
It is important to scrutinize the noise, bandwidth, input and output headroom/footroom, and power
requirements when selecting an ADC driver for driving the differential ADC. The 16-bit and 18-bit
data acquisition system using a fully differential ADC driver presented here achieves an optimized
signal chain performance at low power and saves board space.
Based on the typical application requirements (performance, power, and throughput), some of the
Analog Devices recommended amplifiers for driving the 16-bit and 18-bit PulSAR® ADCs are shown
in Table 1.
Table 1. Recommended ADC Drivers for 16-Bit and 18-Bit PulSAR® ADCs
Analog Devices Signal Chain Designer toolset can also be used for advanced product selection and
recommended, verified product combinations.
Reference
John Ardizzoni and Jonathan Pearson. "Rules of the Road" for High-Speed Differential ADC Drivers,
Analog Dialogue, Vol. 43, No. 2, 2009.