81 JOURNAL OF ELECTRONIC SCIENCE AND TECHNOLOGY, VOL. 9, NO. 1, MARCH 2011 Design of 35 GHz 1 Watt GaAs pHEMT Power Amplifier MMIC Bo Hong and Wen-Bin Dou Abstract⎯By using 0.15 μm GaAs pHEMT (pseudomorphic high electron mobility transistor) technology, a design of millimeter wave power amplifier microwave monolithic integrated circuit (MMIC) is presented. With careful optimization on circuit structure, this two-stage power amplifier achieves a simulated gain of 15.5 dB with fluctuation of 1 dB from 33 GHz to 37 GHz. A simulated output power of more than 30 dBm in saturation can be drawn from 3 W DC supply with maximum power added efficiency (PAE) of 26%. Rigorous electromagnetic simulation is performed to make sure the simulation results are credible. The whole chip area is 3.99 mm2 including all bond pads. Index Terms⎯GaAs pHEMT (pseudomorphic high electron mobility transistor), millimeter wave, microwave monolithic integrated circuit, power added efficiency, power amplifier. 1. Introduction As an important resource, frequency of millimeter wave has been widely developed in applications, such as automatic radar, satellite communication, and defense. However, circuits working in millimeter wave band are hard to realize due to the complexity nature induced by high frequency. As one of the most important components in a transmission system, millimeter wave power amplifiers have been researched for a long time, and many reports have been presented to investigate and demonstrate the amplifiers in recent years[1]-[5]. Because of the development of microwave monolithic integrated circuit (MMIC) fabrication technology, there are variety of fabrication processes capable of supporting the millimeter wave applications today. Among them, GaAs pHEMT (pseudomorphic high electron mobility transistor) is the widest choice for millimeter wave high power Manuscript received May 10, 2010; revised December 26, 2010. This work was supported by the Innovation Fund of State Key Lab of Millimeter Waves. B. Hong and W.-B. Dou are with the State Key Laboratory of Millimeter Waves, Southeast University, Nanjing 210096, China (e-mail: hongbo-gg@live.cn and wbdou@seu.edu.cn). Color versions of one or more of the figures in this paper are available online at http://www.intl-jest.com/. Digital Object Identifier: 10.3969/j.issn.1674-862X.2011.01.015 amplifier due to its high speed and relatively high breakdown voltage. The proposed design is a power amplifier working at 35 GHz with a bandwidth of approximate 4 GHz. GaAs pHEMT processes with the feature size of 0.25 μm and 0.15 μm have been utilized in this band successfully and reported in former articles[1]-[5]. 0.25 μm technology is more robust resulting in high yield[1], however, 0.15 μm technology can deliver better frequency response in millimeter wave band at the expense of higher cost and slightly lower breakdown voltage. Finally, 0.15 μm GaAs pHEMT technology is chosen to commence this design. 2. Circuit Design To reach the goal of output power as well as gain requirement, the power amplifier is designed as consisting of two stages, with four 4 μm×100 μm devices connected in parallel used as an output stage and driven by two 4 μm×100 μm devices. The simple schematic of this power amplifier is shown in Fig. 1. The output matching network is designed for obtaining the maximum output power and efficiency with low-pass configuration to limit the level of higher order frequencies. Because there is no condition for load pull hardware test, the optimum load impedance required for the maximum output power of one 4 μm×100 μm device is derived by load pull simulation using advanced design system (ADS). By calculation using Cripps’ law[6] and load pull simulation, four of them combined in parallel can be expected to deliver an output power of 30 dBm. The inter-stage matching network is designed for drawing enough power from drive stage to push the output stage into saturation. The flatness of the whole gain is also considered. The input matching network is simply designed for maximizing the gain following the conjugate matching principle. Both the inter-stage matching network and the input matching network adopt high-pass configuration to limit the low-frequency gain in order to make the whole circuit more stable. Because the chip area is the main fact that dominates the chip cost, it is important to confine the area of matching network without degradation on performance. For this reason, metal-insulator-metal capacitors and micro shunt transmission line inductors are used as matching elements along with transmission lines to construct all the matching networks. Traditional power divider or combiner, like Wilkinson or Lange coupler, should be discarded due to their large area occupation and hardness for DC supply[7]. All of the passive structures are simulated using a 2.5D electromagnetic simulation tool. The K-factor and normalized determinant function (NDF)[8],[9] are tested over the whole band from DC to 40 GHz to keep the stability. Considering the existing of bond wire induction, some necessary compromise is made on the matching network. To protect the pads from electro-static discharge (ESD) and surge voltage, all the gate bias bond pads are shunted by large diodes. The layout of the whole chip is shown in Fig. 2. 3. Simulation Results The performances of this MMIC power amplifier were simulated using the ADS simulation tool, All the transistors were biased under the condition of Vds=5.0 V and Id=100 mA, which means 3 W power consumption in total. The small signal performances are shown in Fig. 3. The simulation result shows a flat gain of 15.5 dB with fluctuation of approximate 1 dB ranging from 33 GHz to 37 GHz performed by this power amplifier. The curve of the output power performances versus frequency including the output power at 1 dB gain compressed point (P1dB), saturate output power (Psat), and power added efficiency (PAE) are shown on Fig. 4 and Fig. 5. Gain and return losses (dB) JOURNAL OF ELECTRONIC SCIENCE AND TECHNOLOGY, VOL. 9, NO. 1, MARCH 2011 20 15 10 5 0 Frequency(GHz) −5 −10 −15 −20 −25 32 33 34 35 36 Input power (dBm) 37 38 Fig. 3. Small signal gain S21 (triangle symbol line) and input return loss S11 (squared symbol line), output return loss S22 (circle symbol line). P1dB & Psat (dBm) 82 30.4 30.3 30.2 30.1 30.0 29.9 29.8 29.7 29.6 29.5 29.4 29.3 P1dB Psat 33 34 35 36 Frequency (GHz) 37 Fig. 4. Curve of output power performance versus frequency. PAE 28.0 PAE (%) 27.5 27.0 26.5 26.0 25.5 25.0 Fig. 1. Simple schematic of the power amplifier without bias inductor, capacitor, transistor, and networks ( port). Fig. 2. Layout of the whole power amplifier MMIC (chip size: 2.66 mm×1.5 mm). 33 34 35 36 Frequency (GHz) 37 Fig. 5. Curve of PAE versus frequency. Fig. 6. Photo of TGA-1171-SCC (chip size: 2.863 mm×2.74 mm). 83 HONG et al.: Design of 35 GHz 1 Watt GaAs pHEMT Power Amplifier MMIC A comparison between this design and some typical works of the same category is made as shown in Table 1. It can be seen that this task has obvious advantage on efficiency and output power with a relatively small chip area. Two commercial products of CHA 5296 from United Monolithic Semiconductors and TGA-1171-SCC from Triquint are quoted here for comparison in Table 1. Here this paper gives the detailed performance of TGA-1171-SCC for comparison. The photo of the chip is shown in Fig. 6. This chip is comparable on performance with the chip designed in this paper. The small signal performances and large signal performances of TGA-1171-SCC are shown in Fig. 7 and Fig. 8, respectively. All the photos and data are from the datasheet of TGA-1171-SCC. Compared with the chip designed in this paper, TGA-1171-SCC has a better performance on return losses due to the adoption of Lange coupler, but at the expense of much larger area. 4. Conclusions A millimeter wave high power amplifier MMIC is designed and simulated using ADS. About 15.5 dB gain is obtained over 33 GHz to 37 GHz. The maximum output power can exceed 30 dBm with associated PAE of more than 26%. This power amplifier MMIC exhibits excellent performances in terms of power handling ability as well as a flat gain and relatively wide bandwidth. Therefore it can easily fit the requirements of high power applications like radar and high speed communication. Acknowledgment The authors would like to thank the staff of Institute of RF&OE-ICs, especially Mrs. Zhang Li for her help of providing foundry documents and design PDK, and Dr. Li Qin for her comment and suggestion on our simulation and design. References Table 1: Comparison of this work with some others [1] Works P1dB Gain (dB) Ref. [1] 36 to 45 18.0 26.0 - 2.25 Ref. [2] Ref. [5] CHA 5296 TGA-1171-SCC This work 35 to 45 32 to 33 27 to 30 36 to 40 33 to 37 24.0 16.0 18.0 14.0 15.5 26.0 26.0 29.0 29.0 29.5 16 21 26 3.60 7.80 9.58 7.84 3.99 Gain and return losses (dB) Band (GHz) PAE (%) (dBm) Chip area (mm2) 20 [2] [3] 10 0 −10 [4] −20 −30 36.0 36.5 37.0 37.5 38.0 38.5 39.0 39.5 40.0 Frequency (GHz) Fig. 7. Small signal gain S21 (triangle symbol line), input return loss S11 (square symbol line), and output return loss S22 (circled symbol line) of TGA-1171-SCC. P1dB (dBm) 34 [5] [6] 32 [7] 30 28 [8] 26 24 36.0 36.5 37.0 37.5 38.0 38.5 39.0 Frequency (GHz) 39.5 40.0 Fig. 8. Curve of output power performance with frequency of TGA-1171-SCC. [9] A. Bessemoulin, P. Quentin, H. Thomas, and D. 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Bo Hong was born in Anhui Province, China, in 1986. He received the B.S. degree in radio engineering from Southeast University, Nanjing, in 2008. He is currently pursuing the M.S. degree with the State Key Laboratory of Millimeter Waves, Southeast University. His research interests include GaAs based MMIC design, CMOS RFIC design, and CMOS based millimeter wave application. Wen-Bin Dou was graduated from University of Science and Technology of China, Hefei, in 1978. He received his M.S. and Ph.D. degrees from University of Electronic Science and Technology of China, Chengdu, in 1983 and 1987, respectively, both in electronics and communications. From 1987 to 1989, he worked with Southeast east University as postdoctoral fellow. Since 1989, he has been with the Department of Radio Engineering, Southeast University. In 1994, he was promoted to professor. He is vice director of the State Key Laboratory of Millimeter Waves. His research interests include ferrite devices, millimeter wave quasi-optics, millimeter wave focal imaging, antennas and scattering, millimeter wave binary optics, and so on. He had completed many projects on millimeter waves from State Ministries and Foundations, and now is in charge of some key projects. He has published over 100 technique papers in journals. Two books on ferrite devices and millimeter wave quasi-optical techniques have been published in 1996 and 2000, respectively, and the latter has been republished as the 2nd edition in 2006. He received many awards from state ministry, foundation, and Southeast University. He is the member of State Ministry Expert Committee. He is one of editors of Progress in Electromagnetics Research (PIER, USA) and is invited reviewer for Journals, such as “Applied Optics”, “Journal of Optical Society of America (A)”, “Optical Express” et al., by Optical Society of America and magazines. He is a nterests senior member of Chinese Institute Electronics (CIE), aas worked with of Southeast University member of Microwavepostdoctoral Institute of CIE, and a member of he IEEE. fellow. Since 1989, has He is the co-chairmanbeen of program committee of International with the Department of Radio Conference on Infrared, Millimeter, and University. Terahertz In Waves Engineering, Southeast 1994, (IRMMW-THz) 2006 and the member of international advisory he was promoted to professor. He is vice committee of IRMMW-THz 2009. director of State Key Laboratory of