Single-Phase Five-Level PWM Rectifier N. A. Rahim, Senior Member, IEEE J. A. Jalil Dept. of Electrical Engineering University of Malaya Lembah Pantai, 50603 Kuala Lumpur. UniKL Malaysian Spanish Institute Kulim Hi-Tech Park, Kulim, 09000 Kedah. Abstract- A single-phase five level pulse width modulation (PWM) rectifier is proposed. The control scheme is using the sinusoidal PWM technique to improve the power factor and to achieve a lower total harmonic distortion (THD) for the proposed rectifier. The control method is also aimed to obtain a nearly sinusoidal line current. Five-level PWM output is generated at the ac terminal. The proposed topology is verified by a software simulation. I. INTRODUCTION Power converters are widely used in the industry. High current harmonics and low power factor produced in the distribution network contributed to the main power pollution. Multilevel converters are introduced in recent years to attain high power quality, low switching losses and high voltage capability. The simple structure of the conventional diode rectifiers or phase-controlled rectifiers contributed to the low in cost. However, the decrease in the power factor due to the increase in the firing angle and a relatively high on the harmonic currents are the inherent drawbacks of the above mentioned designed. Several topologies [1-4] of the singlephase switching mode rectifier (SMR) which offers a low current distortion and unity power factor have been proposed to overcome the problems. Several control techniques were proposed to improve the power quality in the multilevel rectifier [5-8]. Active singlephase rectifier has been proposed to draw a nearly sinusoidal line current. [9-11]. A single-phase switching mode multilevel rectifier with six active switches to generate five voltage levels on the ac terminal is proposed in [12] to achieve power factor correction and to reduce line current harmonics. Aiming to reduce the rectifier cost, research in decreasing the number of power switches for multilevel rectifiers are presented in [13-16].The use of a medium-frequency modulation strategy adapted to the single-phase current multilevel rectifiers based on a sinusoidal PWM technique is proposed in [17] to attain an input current that fulfills the harmonic requirements of the international standards. In this paper, a single-phase five-level PWM rectifier is proposed. Aiming in improving the power factor and achieving a lower THD whilst reducing the rectifier cost, the proposed topology with its control strategy shall generate five-level of output voltages at the ac terminal. The strategy of using the sinusoidal PWM technique to control the proposed topology is aimed to draw a nearly sinusoidal line current. The operation strategy and its performance characteristics are verified by software simulations. 1 II. SYSTEM ANALYSIS A. Circuit Configuration A proposed topology of the multilevel rectifier is shown in Fig.1. This configuration is modified from the conventional two-level full-bridge rectifier and a diodebridge rectifier by adding two unidirectional power switches connected in series, two power diodes as a substitute to the second leg of the rectifier, a boost inductor, two fast recovery diodes and two capacitors. The power switches used in this configuration are the IGBT. Figure 1. Proposed single-phase five level rectifier. B. Operation Principles In the first operation mode where the line current (is) is in the positive half cycle, power switch S2 is turned on while power switch S1, S3 and S4 are off. Diode D2 is conducting in this operation mode whereas diode D1, D3 and D4 are in reverse biased. Voltage vab is equal to zero and the boost inductor voltage is equal to vs. The line current is increasing or decreasing depending on the polarity of the mains voltage. The two capacitors are discharging to supply the load. In the second operation mode where the line current (is) is still in the positive cycle, power switches S3 and S4 are both turned on while power switches S1 and S2 are turned off. Diodes D2 and D4 are conducting whereas diodes D1 and D3 are in the blocking condition. The line current is increasing if |vs| > v2 or decreasing if |vs| < v2. Thus voltage vab is equal to vo/2. In the third operation mode and the line current (is) is in the positive cycle, power switch S1 is turned on while power switches S2, S3 and S4 are turned off. Diodes D2, D3 and D4 are conducting whereas diode D1 is off. The positive line current (is) is charging both capacitors, thus generate voltage vo at the ac side. The line current is decreasing since |vs| < vdc. Institute of Research Management & Monitoring, University of Malaya. The fourth operation mode is operating in the negative half cycle of the line current (is). It generates zero voltage on the ac side due to capacitors discharging voltage. Power switch S1 is on while S2, S3 and S4 are off. Diode D1 is conducting whereas diodes D2, D3 and D4 are reversed biased. The fifth operation mode is also operating in the negative half cycle of the line current (is). Power switches S3 and S4 are both turned on while power switches S1 and S2 are turned off. Diodes D1 and D3 are conducting whereas diodes D2 and D4 are in the blocking condition. The line current is increasing if |vs| > -v1 or decreasing if |vs| < -v1. Thus voltage vab is equal to -vo/2. The last operation mode is still operating in the negative half cycle of the line current (is). Power switch S2 is turned on while power switches S1, S3 and S4 are turned off. Diodes D1, D3 and D4 are conducting whereas diode D2 is in the blocking condition. The negative line current (is) is increasing and charging both capacitors, thus voltage vab is equal to -vo. The equivalent circuit for each operation mode is presented in Fig.2. Figure 2. Equivalent circuit for the operation mode III. CONTROL SCHEME The PWM control signals are achieved from the sinusoidal PWM technique. In this technique, the pulse width modulated signals are generated by comparing a high switching frequency triangular carrier signals with a line frequency half-sinusoidal reference voltage. The modulated signals are then used as the input signals to the logic gates in order to generate the switching pulses for the power switches. This control technique is simplified by means of a block diagram as shown in Fig.3. The corresponding switching signals at the IGBT gates are simulated and shown in Fig.4. The multilevel voltage generated at the ac side of the adopted rectifier can also be observed in Fig.4. The five output voltages (vab) generated at the ac side are vo, vo/2, 0, -vo/2 and –vo. Figure 3. The control block diagram Figure 6. Simulated waveforms of the ac side voltage. Figure 4. Corresponding switching signals and the PWM waveform on the AC side. Figure 7. Simulated output dc voltage. IV. SIMULATION RESULTS V. CONCLUSION To verify the proposed topology and the control strategy, computer simulations are performed. The ac mains voltage is 220V with a 50Hz source frequency. The capacitance for each capacitor is 2200uF. The value of the boost inductance is 2mH. Fig.5 shows the simulated waveforms of the line current (is) and it is observed to be a nearly sinusoidal wave. The voltage (vab) on the ac side of the proposed rectifier shows a five-level voltage pattern as depicted in Fig.6. The output dc voltage is 375V as simulated in Fig.7. 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