Low Cost, 80 MHz
FastFET Op Amps
AD8033/AD8034
CONNECTION DIAGRAMS
AD8033
8
NC
7
+VS
+IN 3
6
VOUT
–VS 4
5
NC
NC = NO CONNECT
AD8033
VOUT 1
5
+VS
4
–IN
–VS 2
+IN 3
Figure 1. 8-Lead SOIC (R)
02924-002
NC 1
–IN 2
02924-001
FET input amplifier
1 pA typical input bias current
Very low cost
High speed
80 MHz, −3 dB bandwidth (G = +1)
80 V/μs slew rate (G = +2)
Low noise
11 nV/√Hz (f = 100 kHz)
0.7 fA/√Hz (f = 100 kHz)
Wide supply voltage range: 5 V to 24 V
Low offset voltage: 1 mV typical
Single-supply and rail-to-rail output
High common-mode rejection ratio: −100 dB
Low power: 3.3 mA/amplifier typical supply current
No phase reversal
Small packaging: 8-lead SOIC, 8-lead SOT-23, and 5-lead SC70
Figure 2. 5-Lead SC70 (KS)
VOUT1 1
8
+VS
–IN1 2
7
VOUT2
+IN1 3
6
–IN2
–VS 4
5
+IN2
AD8034
02924-003
FEATURES
Figure 3. 8-Lead SOIC (R) and 8-Lead SOT-23 (RJ)
24
21
VOUT = 200mV p-p
G = +10
18
15
APPLICATIONS
12
GAIN (dB)
Instrumentation
Filters
Level shifting
Buffering
G = +5
9
6
G = +2
3
G = +1
0
–3
The AD8033/AD8034 FastFET™ amplifiers are voltage feedback
amplifiers with FET inputs, offering ease of use and excellent
performance. The AD8033 is a single amplifier and the AD8034
is a dual amplifier. The AD8033/AD8034 FastFET op amps in
Analog Devices, Inc., proprietary XFCB process offer significant
performance improvements over other low cost FET amps, such
as low noise (11 nV/√Hz and 0.7 fA/√Hz) and high speed (80 MHz
bandwidth and 80 V/μs slew rate).
With a wide supply voltage range from 5 V to 24 V and fully
operational on a single supply, the AD8033/AD8034 amplifiers
work in more applications than similarly priced FET input
amplifiers. In addition, the AD8033/AD8034 have rail-to-rail
outputs for added versatility.
G = –1
–6
–9
0.1
1
10
FREQUENCY (MHz)
100
1000
02924-004
GENERAL DESCRIPTION
Figure 4. Small Signal Frequency Response
The AD8033/AD8034 amplifiers only draw 3.3 mA/amplifier of
quiescent current while having the capability of delivering up to
40 mA of load current.
The AD8033 is available in a small package 8-lead SOIC and a
small package 5-lead SC70. The AD8034 is also available in a
small package 8-lead SOIC and a small package 8-lead SOT-23.
They are rated to work over the industrial temperature range of
−40°C to +85°C without a premium over commercial grade
products.
Despite their low cost, the amplifiers provide excellent overall
performance. They offer a high common-mode rejection of
−100 dB, low input offset voltage of 2 mV maximum, and low
noise of 11 nV/√Hz.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
©2002–2008 Analog Devices, Inc. All rights reserved.
AD8033/AD8034
SPECIFICATIONS
TA = 25°C, VS = ±5 V, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Input Overdrive Recovery Time
Output Overdrive Recovery Time
Slew Rate (25% to 75%)
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Distortion
Second Harmonic
Third Harmonic
Crosstalk, Output-to-Output
Input Voltage Noise
Input Current Noise
DC PERFORMANCE
Input Offset Voltage
Conditions
Min
Typ
G = +1, VOUT = 0.2 V p-p
G = +2, VOUT = 0.2 V p-p
G = +2, VOUT = 2 V p-p
−6 V to +6 V input
−3 V to +3 V input, G = +2
G = +2, VOUT = 4 V step
G = +2, VOUT = 2 V step
G = +2, VOUT = 8 V step
65
80
30
21
135
135
80
95
225
MHz
MHz
MHz
ns
ns
V/μs
ns
ns
−82
−85
−70
−81
−86
11
0.7
dBc
dBc
dBc
dBc
dB
nV/√Hz
fA/√Hz
55
fC = 1 MHz, VOUT = 2 V p-p
RL = 500 Ω
RL = 1 kΩ
RL = 500 Ω
RL = 1 kΩ
f = 1 MHz, G = +2
f = 100 kHz
f = 100 kHz
VCM = 0 V
TMIN − TMAX
1
Input Offset Voltage Match
Input Offset Voltage Drift
Input Bias Current
Open-Loop Gain
INPUT CHARACTERISTICS
Common-Mode Input Impedance
Differential Input Impedance
Input Common-Mode Voltage Range
FET Input Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Short-Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Power Supply Rejection Ratio
TMIN − TMAX
VOUT = ± 3 V
89
VCM = −3 V to +1.5 V
−89
±4.75
30% overshoot, G = +1, VOUT = 400 mV p-p
4
1.5
50
92
−90
Rev. D | Page 3 of 24
2
3.5
2.5
27
11
Unit
mV
mV
mV
μV/°C
pA
pA
dB
1000||2.3
1000||1.7
GΩ||pF
GΩ||pF
−5.0 to +2.2
−100
V
dB
±4.95
40
35
V
mA
pF
5
VS = ±2 V
Max
3.3
−100
24
3.5
V
mA
dB
AD8033/AD8034
TA = 25°C, VS = 5 V, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Input Overdrive Recovery Time
Output Overdrive Recovery Time
Slew Rate (25% to 75%)
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Distortion
Second Harmonic
Third Harmonic
Crosstalk, Output to Output
Input Voltage Noise
Input Current Noise
DC PERFORMANCE
Input Offset Voltage
Conditions
Min
Typ
G = +1, VOUT = 0.2 V p-p
G = +2, VOUT = 0.2 V p-p
G = +2, VOUT = 2 V p-p
−3 V to +3 V input
−1.5 V to +1.5 V input, G = +2
G = +2, VOUT = 4 V step
G = +2, VOUT = 2 V step
70
80
32
21
180
200
70
100
MHz
MHz
MHz
ns
ns
V/μs
ns
−80
−84
−70
−80
−86
11
0.7
dBc
dBc
dBc
dBc
dB
nV/√Hz
fA/√Hz
55
fC = 1 MHz, VOUT = 2 V p-p
RL = 500 Ω
RL = 1 kΩ
RL = 500 Ω
RL = 1 kΩ
f = 1 MHz, G = +2
f = 100 kHz
f = 100 kHz
VCM = 0 V
TMIN − TMAX
1
Input Offset Voltage Match
Input Offset Voltage Drift
Input Bias Current
Open-Loop Gain
INPUT CHARACTERISTICS
Common-Mode Input Impedance
Differential Input Impedance
Input Common-Mode Voltage Range
FET Input Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Short-Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Power Supply Rejection Ratio
TMIN − TMAX
VOUT = 0 V to 3 V
87
VCM = 1.0 V to 2.5 V
−80
RL = 1 kΩ
0.16 to 4.83
30% overshoot, G = +1, VOUT = 400 mV p-p
4
1
50
92
−80
Rev. D | Page 4 of 24
2
3.5
2.5
30
10
Unit
mV
mV
mV
μV/°C
pA
pA
dB
1000||2.3
1000||1.7
GΩ||pF
GΩ||pF
0 to 2.0
−100
V
dB
0.04 to 4.95
30
25
V
mA
pF
5
VS = ±1 V
Max
3.3
−100
24
3.5
V
mA
dB
AD8033/AD8034
TA = 25°C, VS = ±12 V, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 3.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Input Overdrive Recovery Time
Output Overdrive Recovery Time
Slew Rate (25% to 75%)
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Distortion
Second Harmonic
Third Harmonic
Crosstalk, Output to Output
Input Voltage Noise
Input Current Noise
DC PERFORMANCE
Input Offset Voltage
Conditions
Min
Typ
G = +1, VOUT = 0.2 V p-p
G = +2, VOUT = 0.2 V p-p
G = +2, VOUT = 2 V p-p
−13 V to +13 V input
−6.5 V to +6.5 V input, G = +2
G = +2, VOUT = 4 V step
G = +2, VOUT = 2 V step
G = +2, VOUT = 10 V step
65
80
30
21
100
100
80
90
225
MHz
MHz
MHz
ns
ns
V/μs
ns
ns
−80
−82
−70
−82
−86
11
0.7
dBc
dBc
dBc
dBc
dB
nV/√Hz
fA/√Hz
55
fC = 1 MHz, VOUT = 2 V p-p
RL = 500 Ω
RL = 1 kΩ
RL = 500 Ω
RL = 1 kΩ
f = 1 MHz, G = +2
f = 100 kHz
f = 100 kHz
VCM = 0 V
TMIN − TMAX
1
Input Offset Voltage Match
Input Offset Voltage Drift
Input Bias Current
Open-Loop Gain
INPUT CHARACTERISTICS
Common-Mode Input Impedance
Differential Input Impedance
Input Common-Mode Voltage Range
FET Input Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Short-Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Power Supply Rejection Ratio
TMIN − TMAX
VOUT = ±8 V
VCM = ±5 V
88
−92
±11.52
30% overshoot, G = +1
4
2
50
96
−85
Rev. D | Page 5 of 24
2
3.5
2.5
24
12
Unit
mV
mV
mV
μV/°C
pA
pA
dB
1000||2.3
1000||1.7
GΩ||pF
GΩ||pF
−12.0 to +9.0
−100
V
dB
±11.84
60
35
V
mA
pF
5
VS = ±2 V
Max
3.3
−100
24
3.5
V
mA
dB
AD8033/AD8034
ABSOLUTE MAXIMUM RATINGS
Rating
26.4 V
See Figure 5
26.4 V
1.4 V
−65°C to +125°C
−40°C to +85°C
300°C
PD = (VS × IS) + (VS/4)2/RL
In single-supply operation with RL referenced to VS−, worst case
is VOUT = VS/2.
2.0
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
1.5
SOT-23-8
1.0
SC70-5
0.5
0
–60
The maximum safe power dissipation in the AD8033/AD8034
packages is limited by the associated rise in junction temperature
(TJ) on the die. The plastic that encapsulates the die locally
reaches the junction temperature. At approximately 150°C,
which is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature limit
can change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the AD8033/
AD8034. Exceeding a junction temperature of 175°C for an
extended period can result in changes in silicon devices, potentially
causing failure.
The still-air thermal properties of the package and PCB (θJA),
ambient temperature (TA), and the total power dissipated in the
package (PD) determine the junction temperature of the die.
The junction temperature can be calculated as
TJ = TA + (PD × θJA)
PD is the sum of the quiescent power dissipation and the power
dissipated in the package due to the load drive for all outputs.
The quiescent power is the voltage between the supply pins (VS)
times the quiescent current (IS). Assuming the load (RL) is
referenced to midsupply, the total drive power is VS/2 × IOUT,
some of which is dissipated in the package and some in the load
(VOUT × IOUT). The difference between the total drive power and
the load power is the drive power dissipated in the package
SOIC-8
–40
–20
0
20
40
60
AMBIENT TEMPERATURE (°C)
80
100
02924-005
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering 10 sec)
If the rms signal levels are indeterminate, consider the worst case,
when VOUT = VS/4 for RL to midsupply
MAXIMUM POWER DISSIPATION (W)
Table 4.
Figure 5. Maximum Power Dissipation vs.
Ambient Temperature for a 4-Layer Board
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θJA. Care must be taken to minimize parasitic
capacitances at the input leads of high speed op amps as discussed
in the Layout, Grounding, and Bypassing Considerations section.
Figure 5 shows the maximum power dissipation in the package
vs. the ambient temperature for the 8-lead SOIC (125°C/W),
5-lead SC70 (210°C/W), and 8-lead SOT-23 (160°C/W) packages
on a JEDEC standard 4-layer board. θJA values are approximations.
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current for
the AD8033/AD8034 will likely cause catastrophic failure.
ESD CAUTION
PD = Quiescent Power + (Total Drive Power − Load Power)
PD = [VS × IS] + [(VS/2) × (VOUT/RL)] − [VOUT2/RL]
RMS output voltages should be considered. If RL is referenced
to −VS, as in single-supply operation, the total drive power is
VS × IOUT.
Rev. D | Page 6 of 24
AD8033/AD8034
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
5
1
6.20 (0.2441)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
SEATING
PLANE
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-A A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
Figure 64. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
2.20
2.00
1.80
1.35
1.25
1.15
5
4
1
2
3
PIN 1
2.40
2.10
1.80
0.65 BSC
1.00
0.90
0.70
1.10
0.80
0.30
0.15
0.10 MAX
0.40
0.10
0.46
0.36
0.26
0.22
0.08
SEATING
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AA
Figure 65. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
2.90 BSC
8
7
6
5
1
2
3
4
1.60 BSC
2.80 BSC
PIN 1
INDICATOR
0.65 BSC
1.95
BSC
1.30
1.15
0.90
1.45 MAX
0.15 MAX
0.38
0.22
0.22
0.08
SEATING
PLANE
8°
4°
0°
COMPLIANT TO JEDEC STANDARDS MO-178-BA
Figure 66. 8-Lead Small Outline Transistor Package [SOT-23]
(RJ-8)
Dimensions shown in millimeters
Rev. D | Page 23 of 24
0.60
0.45
0.30
AD8033/AD8034
ORDERING GUIDE
Model
AD8033AR
AD8033AR-REEL
AD8033AR-REEL7
AD8033ARZ 1
AD8033ARZ-REEL1
AD8033ARZ-REEL71
AD8033AKS-R2
AD8033AKS-REEL
AD8033AKS-REEL7
AD8033AKSZ-R21
AD8033AKSZ-REEL1
AD8033AKSZ-REEL71
AD8034AR
AD8034AR-REEL7
AD8034AR-REEL
AD8034ARZ1
AD8034ARZ-REEL1
AD8034ARZ-REEL71
AD8034ART-R2
AD8034ART-REEL
AD8034ART-REEL7
AD8034ARTZ-R21
AD8034ARTZ-REEL1
AD8034ARTZ-REEL71
AD8034CHIPS
1
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
5-Lead SC70
5-Lead SC70
5-Lead SC70
5-Lead SC70
5-Lead SC70
5-Lead SC70
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOT-23
8-Lead SOT-23
8-Lead SOT-23
8-Lead SOT-23
8-Lead SOT-23
8-Lead SOT-23
DIE
Z = RoHS Compliant Part, # denotes RoHS compliant product may be top or bottom marked.
Rev. D | Page 24 of 24
Package Option
R-8
R-8
R-8
R-8
R-8
R-8
KS-5
KS-5
KS-5
KS-5
KS-5
KS-5
R-8
R-8
R-8
R-8
R-8
R-8
RJ-8
RJ-8
RJ-8
RJ-8
RJ-8
RJ-8
Branding
H3B
H3B
H3B
H3C
H3C
H3C
HZA
HZA
HZA
HZA#
HZA#
HZA#