Bipolar Junction
Transistors (BJTs)
1
Transistor Bipolar
Bipolar
Elétrons e buracos participam do processo de condução de corrente
Foi inventado em 1948 nos Laboratórios Bell
Aplicações:
1.
Amplificadores de Rádio Frequência
2.
Circuitos lógicos de alta velocidade – ECL
3.
MOSFET + BIPOLAR
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Transistor NPN
MODO
J EB
J CB
Corte
Reversa
Reversa
Ativa
Direta
Reversa
Ativa reversa
Reversa
Direta
Saturação
Direta
Direta
Figure 5.1 A simplified structure of the npn transistor.
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Transistor PNP
Figure 5.2 A simplified structure of the pnp transistor.
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Operação na região ativa
Região de base pouco dopada
Região de emissor muito dopada
Figure 5.3 Current flow in an npn transistor biased to operate in the active mode. (Reverse current
components due to drift of thermally generated minority carriers are not shown.)
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Operação na região ativa
n p ( 0) = n p 0 e
v BE / VT
I n = AE qDn
dn p ( x )
dx
⎛ n p ( 0) ⎞
⎟
= AE qDn ⎜⎜ −
⎟
W
⎠
⎝
np0 – valor de equilíbrio térmico da concentração de
portadores minoritários na região de base
Figure 5.4 Profiles of minority-carrier concentrations in the base and in the emitter of an npn transistor
operating in the active mode: vBE > 0 and vCB ³ 0.
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n p ( 0) = n p 0 e
v BE / VT
I n = AE qDn
dn p ( x )
dx
⎛ n p ( 0) ⎞
⎟
= AE qDn ⎜⎜ −
W ⎟⎠
⎝
iC = I S e
Onde:
IS =
Do capítulo 2:
v BE
vT
AE qDn n po
W
ni2
n p0 =
NA
AE qDn ni2
IS =
WN A
IS – corrente de saturação ou corrente de escala
1.
2.
3.
4.
5.
Tipicamente varia entre 10-12 A a 10-18 A.
É inversamente proporcional à largura da base.
É proporcional à área da seção da junção base emissor.
É muito dependente da temperatura (ni).
Dobra de valor para cada 5 oC de aumento da temperatura.
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A corrente de base tem duas componentes:
i B1 =
AE qD p ni2
NDLp
e
Corrente de buracos injetados no emissor através da base
v BE
VT
N D - Concentração de impurezas no emissor
L p - Comprimento de difusão dos buracos no emissor
Corrente de buracos para repor os que foram perdidos por recombinação na base.
iB2 =
τ B - Tempo de vida dos portadores minoritários na base
Qn
τb
Qn - Elétrons na região de base
Qn = AEW
1
n p ( 0 )q =
2
AE qWni2
2N A
e
v BE
VT
iB2 =
1 AE qWni2
2 τbN A
e
v BE
VT
v BE
⎛ Dp N A W 1 W 2 ⎞ V
⎟e T = iC
+
iB = I S ⎜
⎜ Dn N D L p 2 Dnτ b ⎟
β
⎝
⎠
iB =
iC
β
=
IS
β
e
β=
v BE
VT
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Dp N A W 1 W 2
+
Dn N D L p 2 Dnτ b
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Corrente no emissor:
i
β +1
i E = iC + i B = iC + C =
iC
β
iC = αi E
β
α=
β
β +1
iC = β i B
β - Ganho de corrente em emissor comum (50 a 200)
α - Ganho de corrente em base comum (~ 0,99)
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Modelos Equivalentes
⎛I ⎞
i E = ⎜ S ⎟e
⎝α ⎠
v BE
VT
Figure 5.5 Large-signal equivalent-circuit models of the npn BJT operating in the forward active mode.
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Estrutura real do transistor npn
O transistor bipolar não é um componente simétrico
0,01 ≤ α R ≤ 0,5
αF ≈1
0,01 ≤ β R ≤ 1
Ganhos na região ativa reversa
50 ≤ β F ≤ 200
Ganhos na região ativa direta
Figure 5.6 Cross-section of an npn BJT.
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Região ativa direta
Região ativa reversa
Figure 5.7 Model for the npn transistor when operated in the reverse active mode (i.e., with the CBJ
forward biased and the EBJ reverse biased).
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Modelo de Eber - Moll
iC = −i DC + α F i DE
i B = (1 − α F )i DE + (1 − α R )i DC
i E = i DE − α R i DC
Figure 5.8 The Ebers-Moll (EM) model of the npn transistor.
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i E = i DE − α R i DC
i DE = I SE (e
iC = −i DC + α F i DE
i DC = I SC (e
v BE
VT
− 1)
v BC
VT
− 1)
i B = (1 − α F )i DE + (1 − α R )i DC
iC = I S (e
⎛ IS
i E = ⎜⎜
⎝αF
⎛I
i B = ⎜⎜ S
⎝ βF
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v BE
VT
⎞
⎟⎟(e
⎠
⎞
⎟⎟( e
⎠
⎛I
− 1) − ⎜⎜ S
⎝αR
v BE
VT
v BE
VT
⎞
⎟⎟(e
⎠
− 1) − I S (e
⎛I
− 1) + ⎜⎜ S
⎝ βR
v BC
VT
− 1)
v BC
VT
− 1)
⎞
⎟⎟(e
⎠
v BC
VT
− 1)
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O transistor opera na região ativa direta mesmo
com tensão vCB ligeiramente negativa.
Figure 5.9 The iC –vCB characteristic of an npn transistor fed with a constant emitter current IE. The transistor
enters the saturation mode of operation for vCB < –0.4 V, and the collector current diminishes.
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Com a junção base coletor polarizada
diretamente, a concentração de elétrons no
coletor não é igual a zero. A inclinação da reta
de concentração diminui, e a corrente diminui.
Figure 5.10 Concentration profile of the minority carriers (electrons) in the base of an npn transistor
operating in the saturation mode.
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O transistor PNP
Figure 5.11 Current flow in a pnp transistor biased to operate in the active mode.
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Modelo para grandes sinais do transistor PNP
Figure 5.12 Large-signal model for the pnp transistor operating in the active mode.
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Símbolos dos transistores
Figure 5.13 Circuit symbols for BJTs.
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Convenções de Sinais
Figure 5.14 Voltage polarities and current flow in transistors biased in the active mode.
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Exemplo 5.1
β = 100
vBE = 0,7 V para IC = 1 mA
Projete para:
IC = 2 mA
VC = 5V
Figure 5.15 Circuit for Example 5.1.
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Exercício 5.10
VE = -0,7V
β= 50
Determine:
IE , IB , IC e VC
Figure E5.10
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Exercício 5.11
VB = 1 V
VE = 1,7 V
Determine:
α , β e VC.
Figure E5.11
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Característica iC x vBE
iC = I S e
v BE
VT
Figure 5.16 The iC –vBE characteristic for an npn transistor.
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Efeito da temperatura na característica iC x vBE
-2,2 mV/oC
Figure 5.17 Effect of temperature on the iC–vBE characteristic. At a constant emitter current (broken line),
vBE changes by –2 mV/°C.
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Característica iC x vCB para vários valores de iE
Figure 5.18 The iC–vCB characteristics of an npn transistor.
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Efeito Early
Com o aumento de vCE, com vBE constante, vCB aumenta.
Aumenta a largura da região de depleção, diminuindo a
largura efetiva da região de base, W.
Consequentemente, IS aumenta e iC aumenta.
iC = I S e
v BE
vT
V
ro = A
IC
AE qDn ni2
IS =
WN A
Figure 5.19 (a) Conceptual circuit for measuring the iC –vCE characteristics of the BJT. (b) The iC –vCE
characteristics of a practical BJT.
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Modelos para grandes sinais do transistor incluindo a resistência de saída
Figure 5.20 Large-signal equivalent-circuit models of an npn BJT operating in the active mode in the
common-emitter configuration.
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Característica iC x vCE em função de iB
β dc = hFE =
β ac = β = h fe =
I CQ
i BQ
ΔiC
Δi B V = cte
CE
Figure 5.21 Common-emitter characteristics. Note that the horizontal scale is expanded around the
origin to show the saturation region in some detail.
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Dependência de β com IC e com a temperatura
Figure 5.22 Typical dependence of β on IC and on temperature in a modern integrated-circuit npn
silicon transistor intended for operation around 1 mA.
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Zoom da região de saturação
I Csat
β forçado =
IB
β forçado < β F
Figure 5.23 An expanded view of the common-emitter characteristics in the saturation region.
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Modelos do transistor na região de saturação
VCEsat = VCEoff + I Csat RCEsat
≈ 0,1 V
Figure 5.24 (a) An npn transistor operated in saturation mode with a constant base current IB. (b) The
iC–vCE characteristic curve corresponding to iB = IB. The curve can be approximated by a straight line of
slope 1/RCEsat.
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Modelos do transistor na região de saturação
Figure 5.24 (c) Equivalent-circuit representation of the saturated transistor. (d) A simplified equivalentcircuit model of the saturated transistor.
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Figure 5.25 Plot of the normalized iC versus vCE for an npn transistor with bF = 100 and aR = 0.1. This is a
plot of Eq. (5.47), which is derived using the Ebers-Moll model.
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Exercício 5.18
Qual o valor de Vo se o transistor tem BVBCO = 70 V?
Figure E5.18
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Sumário: símbolos e convenções de sinais
Table 5.3
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Sumário: Circuitos equivalentes para grandes sinais
Table 5.3 (Continued)
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Sumário: Modelos de Ebers-Moll
Table 5.3 (Continued)
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Sumário: Operação na região de saturação
Table 5.3 (Continued)
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vo = VCC − RC I S e
vi
VT
vo = vCE = VCC − RC iC
Característica de Transferência
Figure 5.26 (a) Basic common-emitter amplifier circuit. (b) Transfer characteristic of the circuit in (a). The amplifier is biased
at a point Q, and a small voltage signal vi is superimposed on the dc bias voltage VBE. The resulting output signal vo appears
superimposed on the dc collector voltage VCE. The amplitude of vo is larger than that of vi by the voltage gain Av.
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Ganho do amplificador (fig 5.26)
Ponto Q:
IC = I S e
V BE
VT
Av =
VCE = VCC − RC I C
dvo
1
=−
ISe
dv I v =V
VT
I
BE
V BE
VT
RC
I R
V − VCE
Av = − C C = CC
VT
VT
Obs:
1.
2.
3.
O amplificador emissor comum é inversor.
Para maximizar o ganho, devemos maximizar a queda no resitor RC.
No entanto para VCC constante, isto significa reduzir VCE e
conseqüentemente, operar próximo da saturação.
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Figure 5.27 Circuit whose operation is to be analyzed graphically.
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Figure 5.28 Graphical construction for the determination of the dc base current in the circuit of Fig. 5.27.
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Figure 5.29 Graphical construction for determining the dc collector current IC and the collector-to-emitter
voltage VCE in the circuit of Fig. 5.27.
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Figure 5.30 Graphical determination of the signal components vbe, ib, ic, and vce when a signal
component vi is superimposed on the dc voltage VBB (see Fig. 5.27).
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Figure 5.31 Effect of bias-point location on allowable signal swing: Load-line A results in bias point QA
with a corresponding VCE which is too close to VCC and thus limits the positive swing of vCE. At the other
extreme, load-line B results in an operating point too close to the saturation region, thus limiting the
negative swing of vCE.
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Figure 5.32 A simple circuit used to illustrate the different modes of operation of the BJT.
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Figure 5.33 Circuit for Example 5.3.
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Figure 5.34 Analysis of the circuit for Example 5.4: (a) circuit; (b) circuit redrawn to remind the reader of
the convention used in this book to show connections to the power supply; (c) analysis with the steps
numbered.
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Figure 5.35 Analysis of the circuit for Example 5.5. Note that the circled numbers indicate the order of
the analysis steps.
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Figure 5.36 Example 5.6: (a) circuit; (b) analysis with the order of the analysis steps indicated by circled
numbers.
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Figure 5.37 Example 5.7: (a) circuit; (b) analysis with the steps indicated by circled numbers.
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Figure 5.38 Example 5.8: (a) circuit; (b) analysis with the steps indicated by the circled numbers.
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Figure 5.39 Example 5.9: (a) circuit; (b) analysis with steps numbered.
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Figure 5.40 Circuits for Example 5.10.
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Figure 5.41 Circuits for Example 5.11.
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Figure E5.30
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Figure 5.42 Example 5.12: (a) circuit; (b) analysis with the steps numbered.
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Figure 5.43 Two obvious schemes for biasing the BJT: (a) by fixing VBE; (b) by fixing IB. Both result in
wide variations in IC and hence in VCE and therefore are considered to be “bad.” Neither scheme is
recommended.
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Figure 5.44 Classical biasing for BJTs using a single power supply: (a) circuit; (b) circuit with the
voltage divider supplying the base replaced with its Thévenin equivalent.
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Figure 5.45 Biasing the BJT using two power supplies. Resistor RB is needed only if the signal is to be
capacitively coupled to the base. Otherwise, the base can be connected directly to ground, or to a grounded signal
source, resulting in almost total β-independence of the bias current.
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Figure 5.46 (a) A common-emitter transistor amplifier biased by a feedback resistor RB. (b)
Analysis of the circuit in (a).
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Figure 5.47 (a) A BJT biased using a constant-current source I. (b) Circuit for
implementing the current source I.
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Figure 5.48 (a) Conceptual circuit to illustrate the operation of the transistor as an amplifier. (b) The
circuit of (a) with the signal source vbe eliminated for dc (bias) analysis.
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Figure 5.49 Linear operation of the transistor under the small-signal condition: A small
signal vbe with a triangular waveform is superimposed on the dc voltage VBE. It gives rise
to a collector signal current ic, also of triangular waveform, superimposed on the dc
current IC. Here, ic = gmvbe, where gm is the slope of the iC–vBE curve at the bias point Q.
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Figure 5.50 The amplifier circuit of Fig. 5.48(a) with the dc sources (VBE and VCC)
eliminated (short circuited). Thus only the signal components are present. Note that this
is a representation of the signal operation of the BJT and not an actual amplifier circuit.
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Figure 5.51 Two slightly different versions of the simplified hybrid-p model for the small-signal
operation of the BJT. The equivalent circuit in (a) represents the BJT as a voltage-controlled current
source (a transconductance amplifier), and that in (b) represents the BJT as a current-controlled
current source (a current amplifier).
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Figure 5.52 Two slightly different versions of what is known as the T model of the BJT. The
circuit in (a) is a voltage-controlled current source representation and that in (b) is a currentcontrolled current source representation. These models explicitly show the emitter resistance
re rather than the base resistance rp featured in the hybrid-p model.
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Figure 5.53 Example 5.14: (a) circuit; (b) dc analysis; (c) small-signal model.
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Figure 5.54 Signal waveforms in the circuit of Fig. 5.53.
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Figure 5.55 Example 5.16: (a) circuit; (b) dc analysis; (c) small-signal model; (d) smallsignal analysis performed directly on the circuit.
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Figure 5.56 Distortion in output signal due to transistor cutoff. Note that it is assumed that
no distortion due to the transistor nonlinear characteristics is occurring.
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Figure 5.57 Input and output waveforms for the circuit of Fig. 5.55. Observe that this
amplifier is noninverting, a property of the common-base configuration.
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Figure 5.58 The hybrid-p small-signal model, in its two versions, with the resistance ro included.
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Figure E5.40
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Table 5.4
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Figure 5.59 Basic structure of the circuit used to realize single-stage, discrete-circuit BJT amplifier
configurations.
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Figure E5.41
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Table 5.5
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Figure 5.60 (a) A common-emitter amplifier using the structure of Fig. 5.59. (b)
Equivalent circuit obtained by replacing the transistor with its hybrid-p model.
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Figure 5.61 (a) A common-emitter amplifier with an emitter resistance Re. (b) Equivalent circuit
obtained by replacing the transistor with its T model.
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Figure 5.62 (a) A common-base amplifier using the structure of Fig. 5.59. (b) Equivalent circuit obtained
by replacing the transistor with its T model.
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Figure 5.63 (a) An emitter-follower circuit based on the structure of Fig. 5.59. (b) Small-signal
equivalent circuit of the emitter follower with the transistor replaced by its T model augmented with ro. (c)
The circuit in (b) redrawn to emphasize that ro is in parallel with RL. This simplifies the analysis
considerably.
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Figure 5.64 (a) An equivalent circuit of the emitter follower obtained from the circuit in Fig. 5.63(c) by
reflecting all resistances in the emitter to the base side. (b) The circuit in (a) after application of Thévenin
theorem to the input circuit composed of vsig, Rsig, and RB.
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Figure 5.65 (a) An alternate equivalent circuit of the emitter follower obtained by reflecting all basecircuit resistances to the emitter side. (b) The circuit in (a) after application of Thévenin theorem to the
input circuit composed of vsig, Rsig / (b 1 1), and RB / (b 1 1).
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Figure 5.66 Thévenin equivalent circuit of the output of the emitter follower of Fig. 5.63(a). This circuit
can be used to find vo and hence the overall voltage gain vo/vsig for any desired RL.
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Table 5.6
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Figure 5.67 The high-frequency hybrid-p model.
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Figure 5.68 Circuit for deriving an expression for hfe(s) ; Ic/Ib.
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Figure 5.69 Bode plot for uhfeu.
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Figure 5.70 Variation of fT with IC.
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Table 5.7
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Figure 5.71 (a) Capacitively coupled common-emitter amplifier. (b) Sketch of the magnitude of the gain
of the CE amplifier versus frequency. The graph delineates the three frequency bands relevant to
frequency-response determination.
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Figure 5.72 Determining the high-frequency response of the CE amplifier: (a) equivalent circuit; (b) the
circuit of (a) simplified at both the input side and the output side; (c) equivalent circuit with Cm replaced
at the input side with the equivalent capacitance Ceq; (d) sketch of the frequency-response plot, which is
that of a low-pass STC circuit.
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Figure 5.73 Analysis of the low-frequency response of the CE amplifier: (a) amplifier circuit with dc
sources removed; (b) the effect of CC1 is determined with CE and CC2 assumed to be acting as perfect
short circuits;
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Figure 5.73 (Continued) (c) the effect of CE is determined with CC1 and CC2 assumed to be acting as
perfect short circuits; (d) the effect of CC2 is determined with CC1 and CE assumed to be acting as perfect
short circuits;
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Figure 5.73 (Continued) (e) sketch of the low-frequency gain under the assumptions that CC1, CE, and
CC2 do not interact and that their break (or pole) frequencies are widely separated.
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Figure 5.74 Basic BJT digital logic inverter.
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Figure 5.75 Sketch of the voltage transfer characteristic of the inverter circuit of Fig. 5.74 for the case
RB 5 10 kW, RC 5 1 kW, b 5 50, and VCC 5 5 V. For the calculation of the coordinates of X and Y, refer
to the text.
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Figure 5.76 The minority-carrier charge stored in the base of a saturated transistor can be divided into
two components: That in blue produces the gradient that gives rise to the diffusion current across the
base, and that in gray results from driving the transistor deeper into saturation.
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Figure E5.53
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Figure 5.77 The transport form of the Ebers-Moll model for an npn BJT.
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Figure 5.78 The SPICE large-signal Ebers-Moll model for an npn BJT.
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Figure 5.79 The PSpice testbench used to demonstrate the dependence of bdc on the collector bias
current IC for the Q2N3904 discrete BJT (Example 5.20).
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Figure 5.80 Dependence of bdc on IC (at VCE 5 2 V) in the Q2N3904 discrete BJT (Example 5.20).
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Figure 5.81 Capture schematic of the CE amplifier in Example 5.21.
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Figure 5.82 Frequency response of the CE amplifier in Example 5.21 with Rce = 0 and Rce = 130 Ω.
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Figure P5.20
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Figure P5.21
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Figure P5.24
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Figure P5.26
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Figure P5.36
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Figure P5.44
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Figure P5.53
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Figure P5.57
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Figure P5.58
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Figure P5.65
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Figure P5.66
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Figure P5.67
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Figure P5.68
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Figure P5.69
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Figure P5.71
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Figure P5.72
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Figure P5.74
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Figure P5.76
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Figure P5.78
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Figure P5.79
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Figure P5.81
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Figure P5.82
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