ANALOG
W DEVICES
InvertingHigh-Speed
Operational
Amplifier
OP-O1
FEATURES
and excellent DC input characteristics. An internal feedforward frequency compensation network provides simplicity of application - no external capacitors are required for
stable, high-speed performance. The fast output response is
.
Fast Settling Time. . . . .. . . . .. .. .. . . . . 1JLsto 0.1% Max
HlghSlewRate
12VfJLsMIn
Power Bandwidth
150kHzMln
. Low Power Consumption. . . . . . . . . . . . . . . . . . 90mW Max
Excellent DC Specifications
Internally Compensated
Ideal DACOutput Amplifier
MIL-STD-883Processing Available
Fits Standard 741 Sockets
Low Cost
. Available in DieForm
.
.
.
.
.
.
.
.
OBS
ORDERING INFORMATION
PACKAGE
TA
= 25°C
TO-99
CERDIP
a-PIN
PLASTIC
a-PIN
OP01J*
OP01GJ
OP01CJ
OP01CZ
OP01HP
Vos MAX
(mV)
0.7
0.7
5.0
5.0
.
t
achieved without sacrifice of input bias current or power
consumption. A 250kHz typical power bandwidth is attained
with a small-signal bandwidth of only 2.5MHz, thus board
layout is non-critical. The OP-O1 is completely protected at
both input and output, fits standard 741 sockets, and is offset
nulled with a 10kD potentiometer.
The fast output response combined with excellent settling
time makes the OP-O1 ideal for use as a OfA converter output
amplifier.
OLE
t
PIN CONNECTIONS
OPERATING
TEMPERATURE
RANGE
OP01CP
T9E
MIL
COM
MIL
COM
For devices processed in total compliance to MIL-STD-883, add /883 after part
number. Consult factory for 883 data sheet.
Burn-in is available on commercial and industrial temperature range parts in
CerDIP, plastic DIP, and TO-can packages.
EPOXY MINI-DIP
(P-Suffix)
a-PIN HERMETIC DIP
BAL
-IN
B N.C. 7 v+
2
6 OUT
+IN 3
5 BAL
4 v-
(CASE)
TO-99
(J-Sufflx)
(Z-Suffix)
GENERAL DESCRIPTION
The OP-O1series of monolithic inverting high-speed operational amplifiers combines high slew rate, fast settling time
SIMPLIFIED SCHEMATIC
v+
*01.02, Q3 AND 04 FORMA
THERMALLYCROSS-COUPLED
aUAD. os, as'. 06 AND 06'
~~~~~~EL~ ~~b~~OUPLED
OUAD.
014
os
C2
11.SpF
-IN
020
017
CI
2BpF
RIO
R6
OUTPUT
R9
R4
RI
BALANCE
R3
R2
RS
BALANCE
I
RS
Rll
.
OP-O1
ABSOLUTE MAXIMUM RATINGS (Note 1)
Total Supply Voltage, OP-01,OP-01H, OP-01N, OP-01NT,
OP-01G,OP-01GT
:1:.22V
OP-01G, OP-01C, OP-01GR
:1:.20V
Differential Input Voltage
:1:.30V
Input Voltage (Note 2)
:1:.15V
Short-Circuit Duration
Indefinite
Operating Temperature Range
OP-01, OP-01G
5°C to +125°C
DoCto +70°C
OP-01 H, OP-01C
Junction Temperature (Tj)
Storage Temperature
J and Z Packages
P Packages
65°C to +150C
65°C to +150°C
65°C to +150°C
OBS
Lead Temperature (Soldering, 60 sec)
PACKAGE TYPE
+300°C
UNITS
alA (NOTE 3)
alC
TO-99 (J)
170
24
'C/W
8-Pin Hermetic DIP (Z)
162
26
'C/W
8-Pin Plastic DIP (P)
110
50
'c/w
NOTES:
1. Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2. For supply voltages less than :t15V, the maximum input voltage is the supply
voltage.
3. alA is specified for worst case mounting conditions, i.e., alA is specified for
device in socket for TO, CerDIP and P-DIP packages.
ELECTRICALCHARACTERISTICSat Vs= :t15V,TA= 25°C, unlessotherwise noted.
PARAMETER
Input Offset Voltage
Input OffsetCurrent
Input BiasCurrent
Input VoltageRange
Common-Mode
SYMBOL
Vas
los
'e
IVR
CONDITIONS
MIN
-
TYP
0.3
0.5
5.0
20
mV
2.0
25
100
nA
-
V
-
:t12
-
Power Supply
Rejection Ratio
PSRR
Vs = :t5V to :t20V
Rs:5 20kO
-
10
Output Voltage Swing
Vo
RL5kO
RL2kO
Large-Signal
Voltage Gain
Ava
RL2kO
Va =:t 10V
Power Consumption
Pd
VOUT= 0
Settling Time
to 0.1% (Summing
ts
Av = -1
(Notes 1, 2)
SR
Av=-1,
Node Error)
2.0
30
110
UNITS
-
:t13
85
MAX
0.7
2.0
:t12
18
TYP
-
-
VCM= :t 10V
Rs:5 20kO
Slew Rate
MIN
MAX
OLE
Rs:5 20kO
CMRR
Rejection Ratio
OP-O1G
OP-O1C
OP-O1
OP-O1H
60
-
:t13
nA
TE
80
100
-
-
100
150
dB
,.VN
:t12.5
:t12.0
:t13.5
:t 13.0
-
V
25
75
-
V/mV
-
50
90
mW
1.0
-
0.7
1.0
,.s
18
-
12
18
-
V/,.s
150
250
-
150
250
-
kHz
1.5
2.5
-
1.5
2.5
-
MHz
-
150
-
-
150
-
ns
-
2
-
2
-
%
:t12.5
:t 12.0
:t 13.5
:t13.0
-
50
100
-
-
50
90
-
0.7
12
VIN= 5V
(Notes 2, 3)
Rs = 3k to 5kO
Large-Signal
Bandwidth
(Notes 3, 4)
Small-Signal
Bandwidth
(Notes 3, 4)
Aiselime
tr
Overshoot
OS
Av=-1
VIN = 50mV
NOTES:
1. AL = 25kO; CL = 50pF. See Settling Time Test Circuit.
2. Sample tested.
3. See applications Information.
4. Guaranteed by design.
2-498
OPERA TlONAL AMPLIFIERS
REV.
A
OP-O1
ELECTRICAL
CHARACTERISTICS
OP-O1 H, OP-O1 C, unless
otherwise
at Vs = :t15V, -55°C
TA
+125°C for OP-O1, OP-O1G and DoC
OP-O1
OP-O1 H
PARAMETER
Input Offset Voltage
Input Offset Current
SYMBOL
Vas
Input Bias Current
'8
IVR
Common-Mode
Rejection Ratio
CONDITIONS
CMRR
MIN
Rs:5:20kO
+70°C for
TYP
MAX
UNITS
3.0
6.0
mV
OP-O1G
OP-O1C
TYP
MAX
0.4
1.0
-
1
-
30
:1:10
:1:13
VcM=:1:10V
Rs:5:20kO
85
110
'as
Input VoltageRange
TA
noted.
MIN
4
-
4
40
nA
50
-
-
50
nA
:1:10
:1:13
200
-
-
80
100
-
dB
100
150
j.lVN
-
V/mV
Power Supply
Rejection Ratio
PSRR
Vs = :1:5Vto :1:20V
Rs:5:20kO
-
10
60
-
Large-Signal
Voltage Gain
Ava
RL 2kO
Va = :1:10V
30
60
-
15
50
-
Output Voltage Swing
:1:12.5
:1:13.5
Va
:1:12.0
:1:13.0
OBS
Offset
Voltage
Drift (Note 1)
NOTE:
1.
Sample
tested.
TCVos
RL
5kO
:1:12.5 :1:13.5
RL
2kO
:1:12.0
Rs:5: 5kO
:1:13.0
OLE
-
2
8
-
5
20
V
V
j.lV/oC
TE
.
OP-O1
DICE CHARACTERISTICS
(125°C TESTED DICE AVAILABLE)
1. NULL
2. INVERTING
INPUT
3. NONINVERTING
INPUT
4. V5. NULL
6. OUTPUT
7. V+
DIE SIZE 0.047 x 0.043 Inch, 2021 sq. mils
(1.19 x 1.09 mm, 1.30 sq. mm)
OBS
WAFER TEST LIMITS at Vs = :t: 15V, TA = 25°C for OP-O1 N, OP-O1G and OP-O1GR devices;
OP-O1GT devices, unless otherwise noted.
PARAMETER
SYMBOL CONDITIONS
Input Offset Voltage
Vos
Input Offset Current
'os
Input Bias Current
'B
Input Voltage Range
IVR
Common-Mode
Rs:;; 20kO
OLE
TA = 125°C for OP-O1NT and
OP-O1 NT
OP-O1 N
OP-O1 GT
LIMIT
LIMIT
LIMIT
LIMIT
LIMIT
UNITS
1.0
0.7
3.0
2.0
5.0
mV MAX
4
2
10
50
30
100
:t10
:t12
:t10
85
85
80
60
60
100
:t 12.5
:t12.0
:t 12.5
:t12.0
OP-O1G
OP-O1GR
TE
5
20
nA MAX
50
100
nA MAX
:t12
:t12
VMIN
80
80
dBMIN
100
150
:t 12.5
:t 12.0
:t12.5
:t 12.0
:t 12.5
:t12.0
VMIN
CMRR
VCM= :t 10V
Rs:;; 20kO
PSRR
Vs = :t5V to :t20V
Rs:;; 20kO
Output Voltage
Swing
YOM
RL2: 5kO
RL2: 2kO
Large-Signal
Voltage Gain
AyO
RL 2: 2kO
Vo = :t10V
30
50
25
50
25
VlmV MIN
Power Consumption
Pd
VOUT= 0
-
90
-
90
90
mW MAX
Rejection Ratio
Power Supply
Rejection Ratio
/lV;Y MAX
"
NOTES:
For 25°C characteristics of NT & GT devices. see N & G characteristics respectively.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not
guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
TYPICAL ELECTRICAL CHARACTERISTICS
at Vs= :t 15V,TA= 25°C, unless otherwise noted.
ALL GRADES
PARAMETER
SYMBOL CONDITIONS
Slew Rate
SR
AVCL =-1,
Rs=3kOt05kO
TYPICAL
UNITS
18
VI/ls
1.0
/lS
VIN = 5V
Settling
0.1%
Time to
Av=-1
ts
(Summing
Node Error)
RL = 2kO (See Settling
Time Test Circuit)
CL = 50pF
Large-Signal
Bandwidth
250
kHz
Smail-Signal
Bandwidth
2.5
MHz
150
ns
Risetlme
2-500
tr
VIN = 50mV
Av=-1
OPERATIONAL AMPLIFIERS
REV. A
OP-O1
I
TYPICAL PERFORMANCE CHARACTERISTICS
SMALL-SIGNAL
PULSE RESPONSE
LARGE-SIGNAL
PULSE RESPONSE
0;
is
;;
E
0;
is
;;
0
.
....
::>
:=
::>
0
;::
::>
":;;
OBS
TIME (500ms!DIVI
TIME (100ms!DIV)
VS=:':15V,AV=-I,RL
Vs = f15V, AV = ~1, RL = 2kH, CL = 50pF
UNITY-GAIN
BANDWIDTH
va SOURCE
RESISTANCE
~
z
;;:
RS
RS
RS
RS
RS
0 ........
"
~
-2 <t
1
I III
I I! I!IIII
1,
2.
3.
4.
5.
= 2.5krJ
= 5.0krJ
= 10krJ
= 33krJ
= 100krJ
~
.......
3
H5
....
..J
0
> -4
\
2{\
1
80
OLE
OPEN-LOOP GAIN
vs FREQUENCY
12
u;
....
<5 10
~
"<t
UJ
a
....
..J
0
>
6
::>
:=
::>
0 4
'"
<t
~ 2
\
-6
0.01
0,10
FREQUENCY
1.00
10.0
(MHz)
=2kS!,CL=50pF
0.10
1.00
10.0
100
1000
LARGE-SIGNAL OUTPUT
SWING va FREQUENCY
1. INVERTING
AV =~1
21 2. NON.
INVERTING
AV;> 50
3. NON.
INVERTING
AV = 10
4. NON.
INVERTING
AV = 1
(VOLTAGE
FOLLOWER)
TE
0
0.001
10,000
0.01
0.10
FREQUENCY (MHz)
FREQUENCY (kHz)
FAST INVERTING AMPLIFIER
APPLICATIONS INFORMATION
The OP-O1incorporates an internal feed-forward compensation network to provide fast slewing and settling times in all
inverting and moderate-to-high-gain noninverting applications. Unity-gain bandwidth is a function of the total equivalent source resistance seen by the inverting terminal. Proper
choice of this resistance will allow the user to maxmize
bandwidth while assuring proper stability. The equivalentinverting-terminal-resistance is defined as RINIIRF, and it
must be greater than 3.3k!1 to assure stability in all closedloop gain configurations including unity gain. Should
RINIIRFS 3.3k!1, a resistor (Rs) may be placed between the
inverting input and the sum node to provide the required
resistance. (See Fast Inverting Amplifier Diagram.) Lower
values of total equivalent resistance may be used to improve
bandwidth in higher closed-loop gain configurations, as
indicated by the Open-Loop Gain vs. Frequency plot.
RIN
RF
VIN
RS
2
REQ
-3
Rp
REQ= RS + RIN
Rp = REO
----
II RF
FORAV=~I.REQ;>3.3krJ
1.00
10.0
OP-O1
SETTLING-TIME
TYPICAL APPLICATIONS
TEST CIRCUIT
Settling time may be measured using the circuit shown
below. This circuit incorporates the "false sum node" tech:"
nique to produce accurate, repeatable results. For a 5V input
step, 0.1% settling will be achieved when the false sum node
settles to within :t2.5mV of its final value. The oscilloscope
used for observation of the false sum node should have wide
bandwidth, fast overload recovery time, and be used with a
low capacity probe (:S:10pF, including strays). A Tektronix
7504 scope with a 7A11 probe orequivalent is suggested. The
pulse generator should have a 500 output impedance and be
capable of a 5V rise time in :S:20ns with ringing less than
2.5mV afterO.5J.Ls.Measurements toO.1% require RINtOequal
RFwithin 0.01%; R5and R6are used as trimming resistors to
achieve this matching.
OBS
VA TO SCOPE CIN = 10pF
,-
RIN
150iHl%
INPUT
I
RG
50iJ
,
.-
RF----.
10kiJ A lOkiJ
iO.5%
.0.5%
150iHl%
5kiJ
.0.5%
~
+15V
R3
6BOiH5%
1
LSB
MSB
6
~
4.7k!l
TYPICAL
-=
PRECISION
POWER-BOOSTER
OLE
CL<;5OpF
I
SETTLING
TIME0.8",
0.1"Fil0%
10kiJ
RL"
2kiJ
CIRCUIT
+15V
240iJ
-=
-=
-15V
-=
-=
TE
CL.;;
50pF
15kiJ
VIN
-=
0-10V
I OUTPUT
R2
Rl
5kiJ
iO.5%
R9
50iJi1%
2W
0
FAST VOLTAGE-OUTPUT D/A CONVERTER
20kn
-=
2N2907
10kiJ
VOUT
RL
-=
240iJ
OFFSET NULLING CIRCUIT
TYPICAL PERFORMANCE,
SLEWRATE
~
1BV/",
0.1% SETTLlNG
4", IRL "500121
OUIESCENT SUPPL Y CURRENT ---1.5mA
-15V
-=
V+
V-
2-502
OPERATIONAL AMPLIFIERS
REV. A