THREE-PHASE REDUCED TWO SWITCH HIGH POWER FACTOR

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THREE-PHASE REDUCED TWO SWITCH
HIGH POWER FACTOR BUCK-TYPE
RECTIFIER
D.Karthikraj1, A.Sivakumar2, C.Mahendraraj3 and Dr.M.Sasikumar4
1,2,3
4
PG Scholar, Jeppiaar Engineering College, Chennai, Tamilnadu, India.
Professor, Jeppiaar Engineering College, Chennai, Tamilnadu, India.
ABSTRACT
This paper proposes a three-phase, two-switch, buck converter that can operate with input power factor correction. The key
features of the proposed converter are that a switch in it can operate with almost half the voltage stress of that in the standard
three-phase, single-switch buck converter and with less current stress. In the paper, the operation of the converter is discussed
and a detailed mathematical analysis is performed to determine its steady state characteristics. The results of the analysis are
also used to design the converter using a procedure that is explained in detail. The feasibility of the proposed converter is
confirmed with results obtained from an experimental prototype
Keywords: DC–AC power conversion, Power Factor correction, Buck converter.
1.Introduction
Some form of power factor correction (PFC) is typically used to shape the input phase currents in three-phase ac dc
converters so that they are sinusoidal and in phase with the phase voltages. Three-phase PFC can be actively done using
a six-switch converter, but this is an expensive and complicated approach. Researchers have been motivated to find
cheaper and simpler ways for doing so, especially for converters of 6 kW or less (a range just high enough where threephase converters are a better option than single-phase converters. Methods for performing three-phase active input PFC
have been developed using converters with less than six switches, including reduced switch boost and buck converters
[1]–[5]. Each type has its advantages and disadvantages. The focus of the paper will be on the buck-type converters.
Most reduced switch buck-type converters have the serious drawback of excessive switch peak voltage stresses. In [6], a
new reduced switch buck converter (Fig. 1) with almost half these stresses was introduced. In this paper, the operation
of the converter will be analyzed, and a procedure for its design will be given and demonstrated with an example. The
feasibility of the converter will be confirmed with results obtained from an experimental prototype.
Fig.1. Block Diagram
2. CONVERTER OPERATION
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In this section the converter operation is described for the cases when duty cycle D > 0.5 and D < 0.5. For the
analysis purposes the output filter inductor is assumed to be large enough so that output current can be considered
constant.
2.1. CIRCUIT OPERATION FOR D > 0.5
The converter operation is described for duty cycle D > 0.5 as it goes through six main modes operation during a
switching cycle. Fig. 2 shows the equivalent circuits of the various operating modes during a switching cycle for the
case when phase input voltage Va is at its peak value and phase voltages Vb and Vc are both negative and equal in
magnitude to one-half of Va.
Mode 1(t0 − t1) Fig.3: At time t = t0, the switch S1 is turned on. On the ac side, the input capacitor Ca starts to
discharge through output diode Do2. The output diode Do1 is completely off. The switch S2 is conducting from the
previous mode and its current is IS2 = Ib + Ic. The voltage of input capacitors Cb and Cc is already zero. The current
through switch S1 is IS1 = Io. At the end of this mode, the input capacitor Ca completely discharges and VCa is zero.
Mode 2(t1 − t2) Fig.4: At time t = t1, all the input capacitors, Ca, Cb and Cc, are completely discharged. The bridge
diodes D1, D2 and D6 are conducting. Both switches S1 and S2 are conducting such that IS1 = Ia and IS2 = Ib+Ic. Both
output diodes Do1 and Do2 are also conducting
and their respective currents are IDo1 = Io −Ia and IDo2 = Io − (Ib + Ic).
Mode 3(t2 − t3) Fig.5: At time t = t2, the switch S2 is turned off, the input capacitors Cb and Cc start to charge up and
the voltage across each capacitor starts to increase. The bridge diodes D2 and D6 turn off. The output current is
supplied by the switch S1 and through Do1. The current through output diode Do2 is IDo2 = Io.
Mode 4(t3 − t4) Fig.6: At time t = t3, switch S2 is turned on and the current through it is IS2 = Io. The bridge diodes
D2 and D6 start to conduct. At the end of this mode, input capacitors Cb and Cc completely discharge and voltages VCb
and VCC are zero.
Mode 5(t4 − t5) Fig.4: This mode is similar to Mode 2.
Mode 6(t5 − TS)Fig.7: At time t = t5, switch S1 is turned off, input capacitor Ca starts to charge up and the voltage
across capacitor Ca starts to increase. The bridge diode D1 turns off. The output current flows through switch S1 and
through Do1. The current through output diode Do2 is IDo2 = Io. At the end of this mode, the input capacitor Ca is
fully charged.
2.2. Circuit Operation for D < 0.5
The duty cycle of the converter decreases with the reduction in load. When it becomes less than 0.5, there are intervals
when none of the switches is on. During these modes the load current freewheels through the output diodes Do1 and
Do2 while on the ac side, the input capacitors continue to charge up with the currents proportional to their respective
input voltages.
Fig.2. Three-phase two-switch ac-dc buck converter
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3. MATHEMATICAL ANALYSIS
3.1. Analysis with Constant Input Voltage
A dc-dc buck converter with LC input filter is shown in Fig. 3 where the capacitor C operates in DVM. The analysis
of this dc model was originally published in [7] and a part of that analysis is presented here, and will be further
extended to three-phase ac-dc buck-type converters in which input capacitors also operate in DVM. The key switching
waveforms of the converter are shown in Fig.4 that are obtained by using following assumptions,
1) The input filter capacitor C is small enough to allow the voltage across it to be discontinuous.
2) The inductors L1 and L2 are large enough so that currents I1 and I2 can be considered constant during a switching
cycle.
3) The capacitor Cf is large enough so that voltage V2 across it can be assumed constant. This converter typically goes
through three main modes during a switching cycle. The converter switching frequency is fS with time period TS. If D
is the duty cycle of the switch, then these modes are as follows:
Mode 1(t0−D1TS): At time t = t0, the switch S is turned on and the capacitor C, which was charged to its maximum
value in the previous mode, starts to discharge with constant current I1 −I2. The output diode Do is completely off. The
current through switch S is IS = I2.
Mode 2(D1TS −DTS): At time t = D1TS, capacitor C is completely discharged and the voltage across it is clamped to
zero. The diode turns on and carries current I2−I1. Current I1 continues to flow through the switch.
Mode 3(DTS − TS): At time t = DTS, The switch S is t turned off, the capacitor C start to charge up with the turned
off, the capacitor C start to charge
Fig.3.Mode 1(t0 − t1
Fig.4.Mode 2(t1 − t2)
Fig.5.Mode 3(t2 − t3)
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Fig.6.Mode 5(t4 − t5)
Fig.7.Mode 6(t5 − TS)
The above Figure shows the Converter operating modes (a) Mode 1: [t0 − t1], (b) Mode 2:[t1−t2] and Mode 5: [t4−t5],
(c) Mode 3: [t2−t3], (d) Mode 4: [t3−t4],(e) Mode 6: [t5 − TS].
Fig. 8. Dc-Dc buck converter with input LC filter.
Fig.9. Characteristic waveforms of dc-dc buck converter in DVM.
Current I1: The output diode turns on and carries current I2.At t = TS switching cycle ends and voltage across the input
capacitor C is VCM. Mathematically, the maximum voltage across the capacitor C can be written as
(1)
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In steady state, the average voltage across the inductor L1 is zero over a switching cycle.
voltage across input filter capacitor C is equal to the input voltage V1.
Therefore the average
(2)
Similarly, the voltage across inductor L2, in a switching cycle is zero. Therefore the output voltage V2 is given as
(3)
From the ratio of (2) and (3), following equation is evolved
(4)
The normalized discharging time D1 can be expressed from (4) as
(5)
The average input resistance R1 is defined as the ratio between the input voltages V1 from (2) and input current I1
from (1) and is given as
(1 − D)(1 − D + D1)
(6)
Eliminating the normalized discharging time D1 from above equation using (5), we obtain
(1-D) 2
(7)
From the above equation, the expression for the average input resistance in terms of the constant input voltage V1 is
known. Now, this equation can be used further in order to analyze the operation of a three-phase ac-dc buck converter
with an LC input filter at front end followed by the three-phase bridge rectifier.
3.2. Analysis with Three-phase Sinusoidal Input Voltage:
This section deals with the development of analysis for standard three-phase single-switch buck converter shown in
Fig. 5(a) for the cases when the converter operates in the DVM and at the Boundary Voltage Mode (BVM). The main
object of this analysis is to determine the relationship between the output and input voltage of three-phase single switch
buck the converter in terms of its duty cycle.
Fig.10. Conventional three-phase, single-switch, ac-dc single buck converter
Fig.11.Conventional three-phase, single-switch, ac-dc single buck converter in BVM
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Fig.12.Conventional three-phase, single-switch, ac-dc single buck converter in DVM
3.3 Discontinuous Voltage Mode:
The concept of the dc-dc buck converter can be applicable if the source is balanced three-phase ac instead of dc.
Consider a three-phase ac source with LC input filter followed by a three-phase diode bridge rectifier as shown in
Figure 5(a), similar to the voltage across capacitor C as shown in Fig. 4. If phase input voltage Va is positive and at its
peak value and phase voltages Vb and Vc are both negative and equal in magnitude to one-half of Va, and bridge
diodes D1,D2 and D6 are conducting, then these modes are as follows:
Mode 1(t0 − t1): At time t = t0, the switch is turned on and the input capacitors Ca, Cb and Cc start to discharge to
supply load current. The output diode Do is completely off. The current through switch S is IS = Io.
Mode 2(t1 − t2): At time t = t1, input capacitors Ca, Cb and Cc are completely discharged and the voltage across each
capacitor is zero. Current continues to flow through the switch. The output diode turns on and conducts the current
equal to Io − IS .
Mode 3(t2 − TS): At time t = t2, The switch is turned off, the input capacitors start to charge up with the voltages
proportional to their respective phase currents and hence the input phase voltages. On the dc output side, the output
diode is on and the load current freewheels through it.
To develop the analysis for the three-phase single-switch buck converter following assumptions has been considered,
1) The input capacitors Ca ,Cb and Cc are small enough to allow the voltages across them to be discontinuous.
2) The converter switching period is TS is very small as compared to line period TL.
3) The output inductor Lo is large enough so that the current through it can be considered constant during a switching
cycle.
4) The capacitor Co is large enough so that voltage Vo across it can be assumed constant during a switching cycle.
5) Due to symmetry of three-phase circuit, the input filter capacitors are considered to have equal values
i.e. Ca = Cb = Cc = C. Similarly, all three input
inductors are of equal values such that La = Lb =Lc = L.
6) Due to the symmetry of three-phase purely sinusoidal voltage source, the complete system behavior can be obtained
for an interval of π/6 of fundamental period. For this case the duration
( , ) of the line cycle is considered when
the phase input voltage Va is positive and the phase voltages Vb and Vc are both negative
The input voltages for a balanced three-phase voltage source for ὠLt ɛ ( , ).
Va (t) = V1sin (ὠLt)
(8)
Vb (t) = V1sin (ὠLt-
)
(9)
VC (t) = V1sin (ὠLt-
)
(10)
Where V1 is peak value of the each phase of the sinusoidal input voltage source. The average input resistance that is
time dependant is obtained from equation (7) for all the three phases. For phase a, the input resistance can be obtained
by replacing the dc source by phase a voltage given by equation (8), and is written as
ra (t) =
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(1-D) 2
(11)
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For phases b and c the input resistances using (9) and (10) in (7) are
fb(t) =
(1-D) 2
r c(t) =
(1-D) 2
(12)
(13)
The input line currents can be obtained from the ratio of input voltage to the input resistance corresponding to each
phase are written as
ia(t) =
(14)
ib (t) =
(15)
ic(t) =
(16)
The input energy of phase a for ὠLt ɛ( , )can be given as
Wa =
Va(t)ia(t)dὠLt
(17)
Substituting the values from equations (8) and (14) in (17)
V1Sin(ὠLt)
Wa =
dὠLt
(18)
Evaluating the above equation
Wa =
(19)
Now, the input energy for phase b can be given as
Wb =
Vb(t)ib(t)dὠLt
(20)
Substituting the values from equations (9) and (15) in (20) and integrating yields
Wb=
 3 1
2C
3
V12  
  V 1V 2


 2  2
Ts1  D2  2  6 4 


(21)
Similarly, the input energy for phase c can be given as
Wc =
 Vc t Ict dWLt 
(22)
Substituting the values from equations (10) and (16) in (22) and integrating yields
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Wc =
 3 
2C
3 
V 12  

 V 1V 2
 1
Ts 1  D 2  2  6
4 
 2

(23)
Total input energy Wi is
Wi = Wa +Wb +Wc
(24)
Replacing the values from equations (19), (21) and (23) in (24)
CV 12
Wi = 
2 2Ts1  D 2
The output energy Wo over the interval of π/6 of fundamental period
Wo =
 Vo2
6 R
(25)
(26)
The energy balance at efficiency is
Wo =  Wi
Substituting the values from equations (25) and (26) in (27)
Vo 2
3RC

V 12
Ts 1  D 2
(27)
(28)
If VLLrms is the line to line rms voltage, then equation (28) can be rewritten as
Vo2
2RC

VLLrms 2
Ts 1  D 2
(29)
Or
Vo
2VLLrms
=
RC
Ts 1  D 2
(30)
Defining the output to input voltage conversion ratio of the three-phase single-switch buck converter MB as
MB 
Vo
(31)
2VLLrms
Equation (30) can be written as
MB 
RCfs
1  D 2
(32)
3.4. Boundary Voltage Mode:
Depending upon the design or the operating conditions of the converter, its operation can shift to the Continuous
Voltage Mode (CVM). This means that the voltages across the input capacitors will become continuous and hence will
not be bounded by sinusoidal envelope. This will result in the input currents with large amount of low order harmonics,
which is highly undesirable. Therefore it becomes necessary to determine the range of the converter in terms of design
parameters and the operating conditions so that the converter can operate at DVM. Hence, the behavior of the converter
when it operates at the boundary of the continuous and the discontinuous voltage mode is analyzed here.
To determine the relationship between the output to input voltage conversion ratio and the duty cycle of the converter at
the BVM, the interval when phase input voltage va is positive and at its peak value and phase voltages vb and vc are
both negative and equal in magnitude to one-half of va, is considered.
Fig. 5(b) and (c) shows the voltage across input capacitor Ca at duty cycle D where D1TS is the duration when the
voltage across Ca reduces to zero. Operation in the DVM is maintained as long as D1 < D as shown in Figure 5(b). If
the normalized discharging time D1 = D the input
capacitors will operate at the BVM as shown in Figure5(c). In steady state, the average voltage across the inductor La
over a switching cycle is zero. Therefore, the average voltage across input capacitor Ca is equal to the peak value of
input voltage va. Therefore, using equation (2),
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V1 
1  D  D1Vca, pk
2
(33)
Similarly, the voltage across inductor Lo, in a switching cycle is zero. Therefore the output voltage Vo can be written
similar to equation (3) as
D1Vrec , pk
2
Vo 
(34)
The maximum voltage across the diode bridge rectifier
Vrec , pk  3Vca , pk
(35)
Thus, equation (34) becomes
Vo 
D1 3Vca, pk
2
(36)
From the ratio of (33) and (36), following equation is evolved
Vo
3V 1

D1
1  D  D1
(37)
Operation at the boundary can be found by replacing D1 with D in (37) as
Vo
3V 1
D
(38)
If VLLrms is the line to line rms voltage and MBb is the voltage conversion ratio at the boundary, then equation (38)
can be rewritten as
MBp 
Vo
2VLLrms
D
(39)
Fig.13. Simulink model with R load
4. EXPERIMENTAL RESULTS
An experimental prototype of the proposed converter was built to confirm its feasibility. The converter was
implemented with main circuit components La = Lb = Lc =600μH, Ca = Cb = Cc = 200 nf, Lo = 1.3mH and Co = 1000
μf at switching frequency fs = 25 kHz. Fig. 9 shows experimental waveforms obtained with the converter operating
with input voltage Vin = 220 VLLrms, output voltage Vo = 100 V , output power Po = 2 kW. It can be seen from Fig.
9(a) that a nearly sinusoidal input current waveform can be obtained. Fig. 9(b) shows the voltage waveforms across
input capacitors Ca and Cb. Fig. 9(c) shows the converter Power factor waveforms. It should be noted that the voltage
across the switch is triangular, which is characteristic of three-phase, buck converters operating in DCM mode. Fig
9(d) shows the rectifier output voltage Vo=100 volts. 9(e) shows the switching pulse wave form the S1 and S2.
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Fig.14. Sinusoidal input Voltage waveform [V: 50 V/div, I: 5 A/div, t: 4 ms/div]
Fig.15. Sinusoidal input current waveform across input capacitors Ca and Cb [V: 250 V/div, t: 10 μs/div]
Fig. 16. Unity Power Factor Waveform
Fig .17. Output voltage waveform
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Fig.18. Switch S1& S2 Pulse waveforms [V: 250 V/div, I: 10 A/div, t: 10 μs/div]
Fig.19. Voltage conversion ratio MT vs Duty cycle
5. CONCLUSION
To address the switch voltage stress issue of the conventional three-phase single-switch ac-dc buck converter, a new
three-phase, two-switch buck converter is proposed. The peak voltage stress in the proposed two-switch converter is
almost half as compared to that of conventional converter. The operation of the converter is discussed in detail, its
mathematical analysis based on the analysis of conventional buck characteristics is presented, and a systematic design
procedure is presented. The feasibility of the converter is confirmed with the experimental results obtained from the
prototype.
REFERENCES:
[1] E. Ismail and R. Erickson, “Single-switch 3-pwm low harmonic rectifiers,” IEEE Transactions on Power
Electronics, vol. 11, no. 2, pp. 338–346, 1996.
[2] Y. Jang and R. Erickson, “New single-switch three-phase high-power factor rectifiers using multi resonant zerocurrent switching,” IEEE Transactions on Power Electronics, vol. 13, no. 1, pp. 194–201, 1998.
[3] J. Shah and G. Moschopoulos, “A novel three-phase single-switch buck-type rectifier,” in Proc. of the IEEE Applied
Power Electronics Conference, pp. 515–521, 2005.
[4] S. Bassan and G. Moschopoulos, “A three-phase single-switch high power factor buck-type converter operating with
soft-switching,” in Proc. of the Power Electronics Specialists Conference, pp. 3053–3059,2007.
[5] Y. Jang, D. Dillman, and M. Jovanovic, “Three-phase isolated high power factor rectifier using soft-switched twoswitch forward converter,” in Proc. of the IEEE Applied Power Electronics Conference, pp. 809–815, 2007.
[6] S. Bassan and G. Moschopoulos, “A three-phase reduced switch high power factor buck-type converter,” in Proc. of
the Power Electronics Specialists Conference, pp. 3015–3020, 2008.
[7] V. Grigore and J. Kyyra, “High power factor rectifier based on buck converter operating in discontinuous capacitor
voltage mode,” IEEE Transactions on Power Electronics, vol. 15, no. 6, p. 1241 1249, 2000.
[8] A. R. Prasad, P. D. Ziogas, and S. Manias, “An active power factor correction technique for three-phase diode
rectifiers,” in Proc. IEEE Power Electron. Specialist’ Conf. (PESC) Rec., Jun. 1989, vol. 1, pp. 58–66.
[9] D. M. Xu,C.Yang, J. H.Kong, and Z.Qian, “Quasi soft-switching partially decoupled three-phase PFC with
approximate power factor,” in Proc. IEEE Appl. Power Electron. Conf. (APEC), Feb. 1998, vol. 2, pp. 953–957.
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AUTHOR’S
Mr. D.Karthikraj has received the Bachelor degree in Electrical and Electronics Engineering from Anand Institute of
Higher Technology, Chennai, Anna University, India in 2009. He has worked Three years in Dalkia India Pvt Ltd,
Chennai, India in Electrical & Machinery operation cum Maintenance up to 2012. He is pursuing Master Of Engineering
in Power Electronics and Drives from Jeppiaar Engineering College, Chennai, Anna University, India. His Area of
Interest includes in the field of Solar PV Systems and Power factor correction Converters.
E-Mail: rajkarthiii@gmail.com.
Mr. A.Sivakumar has received the Bachelor degree in Electrical and Electronics Engineering from Raja College of
Engineering and Technology, Madurai, Anna University India in 2012. He is pursuing Master of Engineering in Power
Electronics and Drives from Jeppiaar Engineering College, Anna University, India. His Area of interest includes in the
field of Solar PV Systems, Power Converters.
E-mail: sivaeee02@gmail.com
Mr. C.Mahendraraj has received the Bachelor degree in Electrical and Electronics Engineering from Sathiyabama
University, India in 2011. He is pursuing Master of Engineering in Power Electronics and Drives from Jeppiaar
Engineering College, Anna University, India. His area for interest Includes in the field of Solar PV Systems, Power Converters.Email: mahin.sat@gmail.com
Dr.M.Sasikumar was born in Tamilnadu, India on June 17, 1977. He received the B.E degree in electrical and
electronics engineering from K.S.Rangasamy College of Technology, Madras University, India in 1999, and the M.Tech
degree in power electronics from VIT University, in 2006. He has obtained his Ph.d. degree from Sathyabama university, Chennai,
Tamilnadu, India. Currently, he is working as a Professor in Jeppiaar Engineering College, Anna University, Chennai. He has 11
years of teaching experience. He has published over 30 technical papers in National and International Conferences /proceedings /
journals. His research areas are power electronics drives and wind energy systems. E-mail: pmsasi77@yahoo.co.in
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