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Losses in Power Electronic Converters Stephan Meier Division of Electrical Machines and Power Electronics EME Department of Electrical Engineering ETS Royal Institute of Technology KTH Teknikringen 33 SE-100 44 Stockholm Abstract— This work is the proposed solution for Task 1, Problem 1, in the Nordic PhD course on Wind Power, held in Smøla, Norway, between June 5-11, 2005. It discusses the converter losses and the expected costs of the back-to-back converter in a doubly-fed induction generator (DFIG) in a wind turbine application. Two different topologies of back-to-back converters are considered: A conventional two-level converter and a three-level diode-clamped converter. I. I NTRODUCTION During the past few years, variable-speed wind turbines have become the dominant type among newly-installed units. Variable-speed wind turbines are designed to achieve maximum aerodynamic efficiency over a wide range of wind speeds by continuously adapting the rotational speed of the wind turbine to the wind speed. The advantages of variable-speed wind turbines are an increased energy capture, improved power quality and reduced mechanical stress on the structure. In order to achieve variable-speed operation of the wind turbine, the electric system is getting more complicated. In recent years, mainly back-to-back converters are being used in the power conversion field for wind turbines. One solution is to use a fullscale back-to-back converter that allows full variable-speed operation of the wind turbine at the cost of a large, expensive and lossy frequency converter that is rated at nominal generator power. This configuration is used by e.g. Enercon. Another solution is to equip the variable-speed wind turbine with a DFIG. In the DFIG wind turbine configuration, the stator of the wound-rotor induction generator is directly connected to the collection grid whereas the rotor windings are connected to a back-to-back converter over slip rings. However, this solution does only provide a limited speed range, depending on the rating of the frequency converter. A manufacturer using this configuration is e.g. Vestas. The advantage of applying back-to-back converters in the power conversion field for wind turbines is that these converters are completely programmable and due to it, they are very versatile. This allows different control strategies to control the active power flow and to both provide reactive power to the induction generator and to achieve the compensation of reactive power on the line side. According to [1], the DFIG system has the advantage that the back-to-back converter needs only to be dimensioned with a fraction of the rated turbine power depending on the required speed range. Both the costs and the conduction and switching losses of the semiconductor valves are approximately proportional to the converter rating and are thus decreasing with the same proportion. Also the converter filters and the filters for electromagnetic interference (EMI) can be relaxed as they only have to be rated proportional to the converter rating, which signifies an additional large cost reduction. The disadvantage of applying back-to-back converters is that these electronic devices are relatively expensive and that they introduce additional losses in the system due to the conduction and switching losses of the semiconductor valves. Recently, a new and promising technology was introduced, the multilevel converters. These type of converters promise improvements in the harmonic quality of the output voltage which is an advantage because the output filters of the system can be relaxed. But at first sight, these converters seem to increase the cost and the losses of the converters, as the number of components increases compared to the conventional two-level converters. Therefore, this work presents a study of the losses and the expected costs of two different back-to-back converter topologies; a conventional two-level converter and a threelevel diode-clamped converter. At first, the problem is defined properly and it is determined what power flows that can be expected in both the rotor-side and the line-side voltage source converter (VSC). Then, the two considered topologies are presented and the harmonic spectrum in the respective output voltages are analyzed. Finally, a comprehensive simulation of the losses in the back-to-back converter is presented. A basic cost comparison and a summary of the main findings concludes this work. II. P ROBLEM DEFINITION The active and reactive power flows have to be determined in order to know the operation status of the back-to-back converter. Therefore, it is essential to have a generator model and a basic control system for the two VSCs. The parameters of the wound-rotor induction generator are given in p.u.-values and it is very convenient to normalize the voltage-current equations of the DFIG. In this section, it is also described how the base values for the simulation were chosen and how the variables have to be scaled during a transformation between PSfrag replacements different reference frames. Pr −Qs Pr Qr A. Generator model In order to determine the power flows, currents and voltages for different operating conditions, i.e. for different rotor speeds, it is necessary to develop a generator model. The wound-rotor induction generator used in the DFIG system comprises a three-phase stator winding and a three-phase rotor winding, which is fed via slip rings. The used generator model is chosen according to [2], neglecting the stator and rotor transients which are not important in this context. The equations that describe the voltage-current relationship of a doubly-fed induction generator are given in p.u.-values as: P = Ps + Pr , Q = 0 Fig. 1. uqr = −Rr iqr − sωs ((Lrσ + Lm ) idr + Lm ids ) TABLE I Magnetising inductance Lm Stator leakage inductance Lsσ Rotor leakage inductance Lrσ Stator resistance Rs Rotor resistance Rr Stator connection Rotor connection (1) Value [p.u.] 4.0 0.1 0.1 0.005 0.005 Delta Star B. Simulation parameters and their normalization For this work, it is assumed that the rated power SN of the wind turbine is 1 MVA. The collection grid voltage UN at the connection point is 690 V, which is a common choice for wind turbines. The normalized p.u.-values of the woundrotor induction generator can be found in Table I. It is very convenient to work with normalized values as the control system and the design process get independent of the actual generator size. The peak phase voltage and peak phase current are chosen as the base values, base on which the other base values of the model can be calculated as shown in Table II. Ps = uds ids + uqs iqs Pr = udr idr + uqr iqr (2) It has to be considered that all quantities are given in the rotating dq-reference frame, and that the stator windings are delta connected while the rotor windings are star connected. The transformation from the stationary three-phase abc-reference frame to the rotating two-phase dq-reference frame via the stationary two-phase αβ-reference frame is given as (valid for both currents and voltages): 2 1 1 uα = ua − ub − uc 3 2 2 ! √ √ 2 3 3 uβ = ub − uc (5) 3 2 2 The absolute values of the stator and rotor voltages, respective currents, can be calculated as: q us = u2ds + u2qs q ur = u2dr + u2qr q is = i2qs + i2ds q ir = i2qr + i2dr (3) The power factors cos φ on the rotor and stator side are defined as: Ps Ps Ps cos φs = =p = 2 2 Ss us · i s Ps + Q s Pr Pr Pr cos φr = =p = 2 2 Sr ur · i r Pr + Q r WOUND - ROTOR INDUCTION GENERATOR . Parameter In these equations, a synchronous two-phase dq-reference frame is used, that is fixed to the space vector of the stator voltage. This is a convenient alternative because the DFIG operates as a generator being fed with constant stator voltage (in the dq-reference frame). Hence, the stator voltage and current are given for line operation of the DFIG system. The equations for determining active and reactive power flows, which are defined according to Figure 1, are given as: Qs = uqs ids − uds iqs Qr = uqr idr − udr iqr Active and reactive power flows in the DFIG system. PARAMETERS OF THE uds = −Rs ids + ωs ((Lsσ + Lm ) iqs + Lm iqr ) uqs = −Rs iqs − ωs ((Lsσ + Lm ) ids + Lm idr ) udr = −Rr idr + sωs ((Lrσ + Lm ) iqr + Lm iqs ) Ps , Q s ud = uα cos θ − uβ sin θ uq = uβ cos θ + uα sin θ (6) where θ is the angular position of the rotating dq-reference frame relative to the stationary αβ-reference frame. However, the dq-quantities have to be scaled in order to get the same amplitudes as the phase quantities according to Table III [3]. (4) 2 TABLE II 1 P M ODEL BASE VALUES . Parameter Equation Value Base voltage Ubase = UN Base power Sbase Base current Ibase = SN = 32 Ubase Ibase 2Sbase = 3U 1 MVA 1.18 kA Base impedance Zbase = 0.48 Ω Base angular frequency ωbase = 2πfN √ √2 3 V PSfrag563.4 replacements base Ubase Ibase Active, reactive power [p.u.] 0.8 Ps 0.6 Qs 0.4 Pr 0.2 0 Qr 314 rad/s −0.2 −0.3 TABLE III Scaling factor Stator voltages uds , uqs , us 2 √ 3 3 2 3√ 2 3 3 2 3 2 3 2 3 Rotor voltages udr , uqr , ur Stator currents ids , iqs , is Rotor currents idr , iqr , ir Stator power Ps , Qs , Ss Rotor power Pr , Qr , Sr = 0.667 In order to get the operation conditions for different operation points, i.e. for different rotor speeds, a basic vector control scheme was implemented. Its main purpose is to guarantee stable operation and enable the independent control of active and reactive power of the back-to-back converter. The controller is using the generator model equations derived in the previous section in the rotating dq-reference frame. The desired rotor voltage command is determined in order to control the active and reactive rotor power by controlling the rotor currents. The line-side converter is controlling the DClink voltage and the reactive power of the total DFIG system, which is assumed to have unity power factor, i.e. it is neither absorbing nor generating reactive power (Q = 0). 0.2 0.3 Figure 3 shows the rotor and stator voltages and currents over the required speed range. It can be seen that the stator voltage is as expected 1 p.u. Also the stator and rotor currents are constant over the whole speed range, while the rotor voltage is approximately proportional to the absolute value of the slip and becomes zero for zero slip. In this study, it is assumed that the mechanical rotor speed is required to have the possibility to change from 0.7 to 1.3 times the synchronous generator speed, which corresponds to a slip range between -0.3 to +0.3. The slip s of the induction generator is given as ωs − ωmech ωr = , ωs ωs 0.1 Figure 2 shows the active and reactive rotor and stator power over the required speed range. It can be noticed that the active rotor power Pr is flowing through the back-to-back converter, as it cannot generate, consume or store active power (apart from the losses that inherently appear). The total active power generated by the doubly-fed induction generator is the sum of the rotor and stator active power P = Ps + Pr . With the chosen DFIG control scheme, the active stator power is kept constant over the whole speed range while the rotor power is proportional to the slip. In contrary to the active power, the back-to-back converter can generate or consume reactive power, which is utilized in order to get unity power factor at the connection point of the wind turbine. It can be seen that the back-to-back converter operates as a generator of active power above synchronous speed and delivers active power to the grid. At a slip of s = −0.3, the wind turbine delivers rated active power to the collection grid. Contrary, below synchronous speed, the back-to-back converter by-passes active power from the grid into the rotor circuit and the active power delivered to the grid becomes approximatively half the rated power at a slip of s = 0.3. 1.155 0.667 0.667 0.667 C. DFIG vector control s= 0 Slip zero, which means that a pure DC current will flow in the rotor. = 0.385 = = = = −0.1 Fig. 2. Active and reactive power of the rotor and stator as a function of the slip. S CALING FACTORS FOR REFERENCE FRAME TRANSFORMATIONS . Parameter −0.2 (7) III. C ONSIDERED where ωs is the electrical angular frequency of the stator quantities (which is constant and equal to the base angular frequency ωbase ), ωmech is the mechanical angular frequency of the rotor shaft and ωr is the electrical angular frequency of the rotor quantities. This equation is valid for an induction generator with two poles (one pole pair). The number of electrical poles in the induction generator does not influence its electrical behavior but changes the requirement on the gear ratio in the gear box of the wind turbine. It can be noticed that the electrical angular rotor frequency at zero slip becomes TOPOLOGIES The considered topologies for the back-to-back converter are a conventional two-level converter as shown in Figure 4 and a three-level diode-clamped converter as shown in Figure 6. The two-level topology is widely used in VSC transmission systems and in back-to-back converters in DFIG wind turbines at a wide range of power levels. Figure 5 shows the output waveform of the two-level converter which is either positive or negative. 1 p.u. voltage corresponds to half the DC-link voltage. In order to improve the quality of the voltage output, a pulse width modulation (PWM) switching 3 1 us 0.9 0.7 is 0.6 0.5 0.4 ir 0.3 0.2 ur 0.1 0 Fig. 3. −0.3 −0.2 −0.1 0 Slip 0.1 0.2 Fig. 4. 0.3 Conventional two-level converter. 1 Voltage and current of the rotor and stator as a function of the slip. 0.5 Voltage [p.u.] eplacements Voltage, current [p.u.] 0.8 scheme is used that produces a waveform with a dominant fundamental component with the compromise that significant higher-order harmonics are also generated, as shown in the harmonic spectrum of the two-level converter in Figure 5. The applied PWM switching scheme is a carrier-based control method with a switching frequency of 1050 Hz (frequency modulation ratio p = 21). The amplitude modulation ratio in Figure 5 is ma = 0.94, which corresponds to the operation point of the line-side VSC in the back-to-back converter. 0 −0.5 −1 0 2 4 6 8 10 Time [ms] 12 14 16 18 20 0 10 20 30 40 50 60 Harmonic number 70 80 90 100 1 Amplitude [p.u.] 0.8 0.6 0.4 0.2 By splitting up the DC capacitor and the insulated gate bipolar transistor (IGBT) valves and with the help of additional diodes, a three-level diode-clamped converter as shown in Figure 6 can be formed. The output waveform comprises three voltage levels, i.e. 1 p.u., 0, - 1 p.u. as shown in Figure 7. 1 p.u. voltage corresponds to half the DC-link voltage that is the voltage above one of the bus-splitting capacitors. As for the two-level converter, a carrier-based PWM switching scheme with an identical frequency and amplitude modulation ratio is appplied in order to be able to compare the results with the two-level converter topology. Figure 7 shows the harmonic content in the waveform, which has a considerably lower total harmonic distortion (THD). It should be noticed that the effective switching frequency of the IGBT valves is only half the one in the two-level converter topology. This is due to the splitting of the valves and the characteristics of the control method. 0 Fig. 5. Output waveform and harmonic spectrum of the two-level converter. Fig. 6. The advantages and disadvantages of the two-, respectively three-level converter topologies can be summerized according to Table VI. The conduction and switching losses as well as the converter costs and the capacitor size are further investigated in this work. Three-level diode-clamped converter. TABLE IV C OMPARISON BETWEEN TWO - AND A. Choice of components Table V shows the characteristics of the back-to-back converters and the choice of the IGBT semiconductor components from Semikron [4] and the DC link capacitors from Evox Riva [5]. Please refer to the corresponding datasheets for further information about the chosen components. 4 THREE - LEVEL CONVERTERS . Characteristic Two-level Three-level Circuitry Control Capacitor size IGBT duty IGBT blocking voltage Harmonic content Switching losses Footprint (size) Very simple Very simple Small Equal Large Large High Small More complex More problematic Large Different Small (half) Small Relatively low Somewhat larger 1 from the characteristic turn-on and turn-off energy (Eon , respectively Eof f ) given in the datasheets. Unfortunately, the switching losses for the antiparallel diodes are not mentioned and could therefore not be included in this study. Also the losses from the reverse recovery energy Err have to be considered. A reverse recovery current is required in order to sweep out the excess carriers in the anti-parallel diode and allow it to block a negative polarity voltage. The switching losses are also dependent on the switched current and the device temperature. The switching losses Psw can be calculated by summing up the switching events during a fundamental period according to X X X Psw = f Eon (Ice ) + Eof f (Ice ) + Err (Ice ) (9) Voltage [p.u.] 0.5 0 −0.5 −1 0 2 4 6 8 10 Time [ms] 12 14 16 18 20 0 10 20 30 40 50 60 Harmonic number 70 80 90 100 1 Amplitude [p.u.] 0.8 0.6 0.4 0.2 0 A. Results of the loss comparison Fig. 7. Output waveform and harmonic spectrum of the three-level diodeclamped converter. The results of the loss comparison between the two- and three-level converter topologies is shown in Table VI. Different operation points corresponding to slip levels between -0.3 and 0.3 are investigated. The total losses are divided in switching losses, IGBT conduction losses and diode conduction losses and presented both for the rotor- and line-side converter. The conclusions from Table VI can be summerized as follows: • The total losses of the three-level converter are approximately 20 % bigger for all points of operation. This is mainly due to the dominating conduction losses, which are increasing by approximately 30 % compared to the conventional two-level converter. The conduction losses are contributing with over 90 % to the total losses. • The switching losses of the three-level converter are approximately 60 % smaller for all points of operation. This is a huge improvement but does not influence the total losses due to their relatively low significance at the chosen switching frequency of 1050 Hz. However, for increasing switching frequencies, the switching losses are getting more important. Another advantage of the threelevel converter is that the low harmonic content allows to decrease the switching frequency considerably compared to the two-level converter, which will further decrease the switching losses. • It is also interesting to see how the distribution of the conduction losses between the IGBT and their antiparallel diodes changes depending on the operation point and the line- or rotor-side converter. • It is also noticeable that the total losses are the smallest when the DFIG system is operating near the synchronous speed. The total losses are slightly increasing with an increasing slip. TABLE V C HOICE OF COMPONENTS . DC link voltage 1200 V Semiconductor components [4] IGBT IGBT IGBT IGBT module module module module (2-level (2-level (3-level (3-level rotor-side): line-side): rotor-side): line-side): Clamping diode module (3-level): SKM SKM SKM SKM 500GA123D 400GA123D 400GB066D 300GB066D SKKD 205F DC link capacitors [5] 2-level (3 series-capacitors à 400 V): 3-level (6 series-capacitors à 200 V): PEH200VV447AM 4.7 mF PEH169RV510VM 10 mF IV. L OSSES The losses are calculated in Matlab under the assumption that the three-phase currents on the rotor- and line- side are perfectly sinusoidal, which can be assumed as the current ripple in average will not generate any additional losses. The total losses consist of conduction and switching losses in the IGBT and clamping diode modules. The conduction losses Pcond depend on the on-state voltage drop across the device and the current through it. They can be calculated from the on-state threshold voltage Vce0 , the onstate slope resistance rce0 , and the device current Ice according to Z f1 2 Pcond = f · Vce0 · Ice (t) + rce0 · Ice (t) dt (8) t=0 V. C OST Both the on-state slope resistance and the threshold voltage depend on the device temperature and were chosen according to the typical values given in the datasheets. The switching losses consist of turn-on and turn-off losses of the IGBTs, the anti-parallel diodes and the clamping diodes in the three-phase converter topology. The switching losses can be calculated COMPARISON A cost comparison ist not simple and would require further design consideration in order to get accurate results. However, it is possible to estimate the thendency by watching at the rating of the semiconductor devices and the size of the DClink capacitors. 5 TABLE VI L OSS COMPARISON BETWEEN TWO - AND THREE - LEVEL CONVERTER TOPOLOGIES FOR DIFFERENT OPERATION POINTS . Slip s Shaft speed ωmech 0.3 0.7 ωs 0.2 0.8 ωs 0.1 0.9 ωs 0 ωs -0.1 1.1 ωs -0.2 1.2 ωs -0.3 1.3 ωs 97.5 475.5 -0.71 1.1 475.5 N.A. 99.2 475.5 0.76 197.2 475.5 0.73 295.8 475.5 0.72 563.4 332.8 -0.18 563.4 328.0 0.0 563.4 333.9 0.18 563.4 349.3 0.34 563.4 374.1 0.48 Electrical phase quantities of the rotor-side converter Voltage ur [V̂] Current ir [Â] cos φr 294.1 475.5 -0.72 196.1 475.5 -0.72 Electrical phase quantities of the line-side converter Voltage us [V̂] Current is [Â] cos φs 563.4 374.1 -0.48 563.4 349.3 -0.34 Losses in the rotor-side converter Topology Switching losses [W] IGBT conduction [W] Diode conduction [W] Total [W] 2level 3level 2level 3level 2level 3level 2level 3level 2level 3level 2level 3level 2level 3level 305 1419 572 2295 102 1661 885 2648 305 1313 648 2266 102 1538 1002 2642 305 1205 725 2235 103 1413 1121 2637 320 1130 824 2274 98 1329 1275 2702 305 991 879 2175 151 1161 1360 2673 305 888 953 2146 150 1041 1475 2666 305 784 1028 2117 150 921 1589 2660 2level 3level 2level 3level 2level 3level 2level 3level 2level 3level 2level 3level 2level 3level 250 560 944 1753 119 652 1351 2123 234 593 791 1619 109 694 1138 1941 226 646 670 1541 102 756 965 1823 221 733 578 1532 96 858 833 1788 226 855 511 1593 93 998 737 1828 234 1009 467 1710 94 1173 671 1939 249 1208 439 1897 95 1397 629 2121 211 531 205 541 194 531 244 539 Losses in the line-side converter Topology Switching losses [W] IGBT conduction [W] Diode conduction [W] Total [W] Total losses in the DFIG back-to-back converter Switching losses [W] Difference [%] 555 221 539 -60 -61 -61 -64 Conduction losses [W] Difference [%] 3493 4550 +30 3346 4372 +31 3245 Total losses [W] Difference [%] 4048 4771 +18 3885 4583 +18 3776 4460 +18 4255 3265 +31 -54 4296 3237 +32 3806 4257 +32 4490 +18 3768 4501 +19 244 -55 3317 554 -56 245 4361 +31 3460 4536 +31 3856 4605 +19 4014 4781 +19 level converter, it is not possible for the three-level converter. Even the largest available capacitor with 10 mF does not limit the voltage ripple to below 40 %. It can be noticed that the DC-link voltage has to be actively controlled by the line-side VSC in order to keep it in a reasonable range. A comparison for the chosen configuration shows that the capacitor size is twice as large for the three-level compared to the twolevel converter topology. Both implemented capacitors have the same dimensions (75 mm diameter, 145 mm length), but the number of required components differs with a factor two. The rating of the semiconductor devices is comparable for the two different converter topologies. The three-level converter, however, has an additional clamping diode module for each VSC. The costs for the gate drive and control system are also increasing somewhat for the three-level converter, as the number of IGBTs is twice the one in the two-level converter and the control of mainly the DC capacitor voltage is more complex as it is shown below. The DC capacitor volume will also affect the costs for the two converter topologies. It has to be calculated in order to limit the voltage ripple to a comparable level. An acceptable voltage ripple is 5 %. The size of the capacitance is then determined by the capacitor current, which is shown in Figure 8 for the twoand three-level converters. It can be seen that the short-time average current in the two-level converter is approximately zero, unlike for the three-level converter, where it is varying considerably. This is due to the different duty ratios of the semiconductor devices. As expected, this fact has a strong influence on the voltage ripple, as shown in Figure 9. While the voltage ripple can easily be limited to below 5 % for the two- In order to do an appropriate cost comparison, it would also be essential not only to consider the initial costs but also the costs due to increased or decreased system losses. However, this is out of the scope of this work. VI. C ONCLUSIONS A conventional two-level and a three-level diode-clamped converter have been introduced for the application in the backto-back converter of a DFIG wind turbine. A comprehensive loss evaluation showed that the system losses are lower for the two-level converter for any point of operation. This is valid 6 2−level converter Capacitor current [A] 400 200 0 −200 −400 −600 0 0.002 0.004 0.006 0.008 0.01 Time [s] 0.012 0.014 0.016 0.018 0.02 0.014 0.016 0.018 0.02 3−level diode−clamped converter Capacitor current [A] 400 200 0 −200 −400 −600 0 Fig. 8. 0.002 0.004 0.006 0.008 0.01 Time [s] 0.012 Capacitor current for the 2- and 3-level converter topologies. 2−level converter DC−capacitor voltage [V] 1230 1220 1210 1200 1190 1180 1170 1160 0 0.002 0.004 0.006 0.008 0.01 Time [s] 0.012 0.014 0.016 0.018 0.02 3−level diode−clamped converter DC−capacitor voltage [V] 750 700 650 600 550 500 450 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 Time [s] Fig. 9. Capacitor voltage for the 2- and 3-level converter topologies. for the investigated switching frequency of 1050 Hz, where the conduction losses are dominating over the switching losses. It was also shown that the initial costs of the three-level converter are somewhat increased due to the larger DC-link capacitors required. The future will show if and in what applications the obvious advantages of multi-level converters can stand up to the simplicity and robustness of conventional two-level converters. R EFERENCES [1] S. Müller, M. Deicke, R. W. de Doncker, Doubly Fed Induction Generator Systems for Wind Turbines, IEEE Industry Applications Magazine, May/June 2002. [2] Wind Power in Power Systems, Editor T. Ackermann, John Wiley & Sons, Ltd. 2005. [3] R. Pena, J. C. Clare, G. M. Asher, Doubly Fed Induction Generator using Back-to-back PWM Converters and its Application to VariableSpeed Wind-Energy Generation, IEE Proc.-Electr. Power Appl., Vol. 143, No. 3, May 1996. [4] Semikron, http://www.semikron.com. [5] Evox Riva, http://www.evox-rifa.com/europe/index.html 7