1
LECTURE 2: CHAPTER 1 - OPERATIONAL AMPLIFIERS AND APPLICATIONS
Commonly-found OpAmp circuit configurations : inverting amplifier, summing amplifier, noninverting amplifier, difference amplifier, integrator, and differentiator.
INVERTING AMPLIFIER
Because the output resistance of the OpAmp is nearly zero, the output voltage vO will not depend
on the current that might be supplied to a load resistor connected between the output and ground.
Rf
+VCC
R
S
vi
+
−
v1
1
i1
v2
−
vO
+
i2
-VCC
Figure 1.3-1. The inverting amplifier configuration.
v
Voltage gain for the inverting amplifier, vO ,
i
Rf
vO
vi = − RS .
(1.3-4)
Notice that the voltage gain is dependent only on the ratio of the resistors external to the
OpAmp, Rf and Rs.
The output voltage is also constrained by the supply voltages VCC and −VCC,
|vo| < VCC .
R
The maximum resistor ratio R f for a given input voltage vi is,
S
R f VCC
.
<
RS vi
Lecture 2 - OpAmps
(1.3-5)
2
The resistance that the signal source vi encounters is simply RS due to the virtual short to ground
at the inverting terminal. In most applications, the input resistance of the inverting amplifier is
low to moderate.
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Example 1.3-1
For the circuit shown in Figure 1.3-2, find the gain and iO. If vi = 2 sin ωοt V, what is the
output? What input voltage amplitude will cause the amplifier to saturate?
Rf
47 k Ω
+15V
R
S
vi
v1
10 k Ω
+
−
v2
if
−
iO
a
R
+
L
22 k Ω
il
-15V
+
vO
−
Figure 1.3-2. Inverting amplifier with load resistor, RL.
The output voltage vO is independent of the load resistor, RL, because of the low output
resistance of the OpAmp. Therefore, the gain of the amplifier is,
Rf
vo
=−
vi
RS
=−
47kΩ
= −4.7
10kΩ
Using KCL at node a,
0 = iO + if + i .
The currents if and i are ,
v
4.7 • 2 sin ωOt
i = − 22Ok = −
22 k
and
v
4.7 • 2 sin ωOt
if = − 47Ok = −
.
47 k
Solving for iO yields,
Lecture 2 - OpAmps
3
1 ⎞
⎛ 1
iO = ⎜ 47 k + 22k⎟ • 4 • 4.7 sin ωOt
⎝
⎠
= 1.255 sin ωOt
mA.
For an input voltage signal of vi = 2 sin ωt V,
v
vO = vO • 2 sin ωt
i
= − 4.7 • 2 sin ωt = − 9.4 sin ωt V
For operation in the linear region of the amplifier, the input amplitude must not exceed,
+ VCC
vi <
Rf
RS
15
< 4.7 = 3.19 V.
Input signal amplitudes greater than or equal to 3.19 will cause the amplifier to saturate.
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SUMMING AMPLIFIER
The output voltage of a summing amplifier is an inverted, amplified sum of the input voltages.
Rf
+VCC
R1
vi1
1
R2
vi2
v1
v2
R3
vi3
−
+
vO
+
−
-VCC
Figure 1.3-3. Summing amplifier with three input signals.
v
v
v
v
0 = Ri1 + Ri2 + Ri3 + RO .
1
2
3
f
Lecture 2 - OpAmps
(1.3-7)
4
Solving for the output voltage vO yields,
R
R
⎡R
⎤
vo = −⎢ f vi1 + f vi 2 + f vi 3 ⎥ .
R2
R3 ⎦
⎣ R1
(1.3-8)
When R1 = R2 = R3 = RS. In this case, Equation (1.3-8) is simplified to,
R
vO = − R f (vi1 + vi2 + vi3) .
(1.3-9)
S
For n input signals,
Rf n
.
(1.3-10)
∑ (vi ) j
RS j =1
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Example 1.3-2
vO = −
Two voltage signals,
vi1 = 2 cos(ωOt + 25°) V
and
vi2 = 1.5 cos(ωOt − 35°) V
are added by the summing amplifier in Figure (1.3-4).
Rf
10 kΩ
+15 V
Ri1
5.1 k Ω
v i1
vi2
v1
v2
Ri2
5.1 kΩ
−
+
vO
+
−
- 15 V
Figure 1.3-4. Summing amplifier with two input voltages.
Find the output voltage, vO.
Since R1 = R2, the expression for the output voltage is,
Lecture 2 - OpAmps
5
R
vO = − Rf ( vi1 + vi2 ) .
1
Tthe two input voltages can be combined using phasor representation,
Vi = Vi1 + Vi2 .
The sum of the voltages is,
vi = vi1 + vi2
= 2 cos(ωOt + 25°) + 1.5 cos(ωOt − 35°) .
The sum of the voltages in phasor representation is,
Vi = Vi1 + Vi2
= 2 ∠ 25° + 1.5 ∠−35°
= (1.81 + j 0.845) + (1.23 − j 0.860)
= 3.04 − j 0.015
= 3.04 ∠−0.285° V .
The output voltage in phasor notation is,
⎛R ⎞
VO = − ⎜R f ⎟ Vi
⎝ 1⎠
⎛ 10 k ⎞
= − ⎜ 5.1 k⎟ (3.04 ∠−0.285°)
⎝
⎠
= − 5.96 ∠−0.285° V .
In time domain notation, the output voltage is,
vO = − 5.96 cos(ωOt − 0.285°) V.
Note that the resulting output voltage requires the use of the phase of the two input signals. The
R
output voltage in this case is the amplifier gain, − R f = −1.96, multiplied by phasor sum of the
1
two input voltages. This example demonstrates that proper attention to the phase and frequency
of the input signals is required when designing and analyzing circuits.
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Lecture 2 - OpAmps
6
NON-INVERTING AMPLIFIER
A non-inverting amplifier is shown in Figure 1.3-5 where the source is represented by vS and a
series resistance RS.
RG
Rf
1
+VCC
v1
RS
vS
i1
v2
−
+
vO
−
+
i2
+
−
-VCC
Figure 1.3-5. Non-inverting amplifier configuration.
The gain of the non-inverting amplifier is,
Rf
vO
vi = 1 + RG .
(1.3-13)
Unlike the inverting amplifier, the non-inverting amplifier gain is positive.
DIFFERENCE AMPLIFIER
The output voltage signal of a difference amplifier is proportional to the difference of the two
input voltage signals. A schematic of a difference amplifier is shown in Figure 1.3-6.
Lecture 2 - OpAmps
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RA
va
RB
1
+VCC
+
−
v1
RC
i1
2
v2
−
+
+
i2
vb
+
−
RD
-VCC
vO
−
Figure 1.3-6. Difference amplifier with input voltages va and vb.
By assuming an ideal OpAmp operating in the linear region, the current constraints can be used
to yield the voltages at nodes 1 and 2 as a simple voltage division at the non-inverting input:
⎞
⎛ R
v1 = v2 = vb ⎜ R +DR ⎟ .
⎝ C
D⎠
(1.3-15)
Substituting Equation (1.3-15) into (1.3-17) provides the output voltage as a function of the input
voltages,
R
R
⎞
⎛R
vO = R +DR ⎜ RB +1 ⎟ vb − RB va .
⎠
C
D⎝ A
A
(1.3-18)
When:
RA RC
=
.
RB RD
(1.3-19)
The gain becomes:
R
vO = RB ( vb - va ) .
(1.3-20)
A
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Example 1.3-3
Lecture 2 - OpAmps
8
The difference amplifier in Figure 1.3-7 has an input voltage va = 3 V. What values of vb will
result in operation in the linear region?
R
RA
2.2 kΩ 1
va
5.1 kΩ
+15 V
+
−
v1
R
v2
RD
5.1 k Ω
+
−
−
C
2.2 k Ω 2
vb
B
+
+
-15 V
vO
−
Figure 1.3-7. Difference amplifier of Example 1.3-3.
Solution:
The limits on the output voltage are determined by the power supply rail voltages. In this
example, the supply voltages are +15 V and −15 V. Therefore, the output voltage must be,
−15 V < vO < +15 V .
R
R
Since RA = RC the input voltage vb from Equation (1.3-20) can be calculated,
B
D
R
vb = RA vO + va .
B
Substituting RA = 2.2 kΩ and RB = 5.1 kΩ into the equation for vb yields for the upper and lower
limits of the output voltage,
vO = +15 V :
vb = 9.47 V ,
and
Lecture 2 - OpAmps
9
vO = −15 V :
vb = −3.47 V .
Then the input voltage range for vb to insure linear operation of the amplifier is,
−3.47 V < vO < 9.47 V .
The SPICE circuit file and simulation results are given below. The simplified model of the
OpAmp is used. The voltage vb is swept from -15 V to 15 V. The output voltage is at node 4.
Note that the voltage at node 4, V(4) , extends well above 15 V and below −15V. The excursion
occurs because the simplified OpAmp model assumes operation in the linear region. Therefore,
care must be taken when using this model to take into account the limits on the output voltage.
As shown in the PROBE output, the range of values for vb is from −3.47 V
to 9.47 V as indicated by the cursors C1 and C2 for output voltages of −15 V and 15 V,
respectively.
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INTEGRATOR
The integrator is commonly used in signal generation or processing applications. The name of
the circuit is accurately descriptive; the integrator performs an integration operation on the input
signal. An integrator is shown in Figure 1.3-8. The circuit is similar to the inverting amplifier
with the feedback resistor Rf replaced by a capacitor C.
C
+VCC
R
vi
+
−
1
v1
v2
−
+
vO
−
+
-VCC
Figure 1.3-8. Integrator circuit.
1
vO = − RC ⌠
⌡ vi dt
.
DIFFERENTIATOR
Lecture 2 - OpAmps
(1.3-23)
10
If the capacitor and resistor positions in the integrator schematic are switched, the circuit
performs a differentiation operation on the input signal. The resulting circuit is shown in Figure
1.3-9.
R
+VCC
C
1
vi
+
−
v1
v2
−
+
vO
−
+
-VCC
Figure 1.3-9. Differentiator circuit.
The output voltage vO is
dv
vO = −RC d i .
t
(1.3-26)
Lecture 2 - OpAmps