74LVX374 Low Voltage Octal D Flip-Flop with TRI

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74LVX374
Low Voltage Octal D Flip-Flop with TRI-STATEÉ Outputs
General Description
Features
The LVX374 is a high-speed, low-power octal D-type flipflop featuring separate D-type inputs for each flip-flop and
TRI-STATE outputs for bus-oriented applications. A buffered Clock (CP) and Output Enable (OE) are common to all
flip-flops. The inputs tolerate up to 7V allowing interface of
5V systems to 3V systems.
Y
Y
Y
Y
Input voltage translation from 5V to 3V
Ideal for low power/low noise 3.3V applications
Available in SOIC JEDEC, SOIC EIAJ and TSSOP
packages
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Logic Symbols
Connection Diagram
Pin Assignment for
SOIC and TSSOP
IEEE/IEC
TL/F/11612–1
TL/F/11612 – 2
TL/F/11612 – 4
Pin Names
Description
D0 – D7
CP
OE
O 0 – O7
Order Number
Data Inputs
Clock Pulse Input
TRI-STATE Output Enable Input
TRI-STATE Outputs
SOIC JEDEC
SOIC EIAJ
TSSOP
74LVX374M
74LVX374MX
74LVX374SJ
74LVX374SJX
74LVX374MTC
74LVX374MTCX
M20B
M20D
MTC20
See NS Package Number
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1996 National Semiconductor Corporation
TL/F/11612
RRD-B30M17/Printed in U. S. A.
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74LVX374 Low Voltage Octal D Flip-Flop with TRI-STATE Outputs
January 1996
Functional Description
Truth Table
The LVX374 consists of eight edge-triggered flip-flops with
individual D-type inputs and TRI-STATE true outputs. The
buffered clock and buffered Output Enable are common to
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With
the Output Enable (OE) LOW, the contents of the eight flipflops are available at the outputs. When the OE is HIGH, the
outputs go to the high impedance state. Operation of the
OE input does not affect the state of the flip-flops.
Inputs
Outputs
Dn
CP
OE
On
H
L
X
L
L
X
L
L
H
H
L
Z
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Z e High Impedance
L e LOW-to-HIGH Transition
Logic Diagram
TL/F/11612 – 3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Absolute Maximum Ratings (Note)
Recommended Operating
Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (VCC)
2.0V to 3.6V
0V to 5.5V
0V to VCC
b 40§ C to a 85§ C
0 ns/V to 100 ns/V
Input Voltage (VI)
Output Voltage (Vo)
Operating Temperature (TA)
Input Rise and Fall Time (Dt/DV)
b 0.5V to a 7.0V
Supply Voltage (VCC)
DC Input Diode Current (IIK)
b 20 mA
VI e b0.5V
b 0.5V to 7V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
b 20 mA
VO e b0.5V
a 20 mA
VO e VCC a 0.5V
b 0.5V to VCC a 0.5V
DC Output Voltage (VO)
DC Output Source
g 25 mA
or Sink Current (IO)
DC VCC or Ground Current
g 75 mA
(ICC or IGND)
b 65§ C to a 150§ C
Storage Temperature (TSTG)
Power Dissipation
180 mW
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operarting Conditions’’ table will define the conditions for actual device operation.
DC Electrical Characteristics
Symbol
Parameter
VCC
Min
VIH
VIL
VOH
VOL
IOZ
IIN
ICC
High Level
Input
Voltage
2.0
3.0
3.6
Low Level
Input
Voltage
2.0
3.0
3.6
High Level
Output
Voltage
2.0
3.0
3.0
Low Level
Output
Voltage
2.0
3.0
3.0
TRI-STATE
Output
Off-State
Current
3.6
Input
Leakage
Current
3.6
Quiescent
Supply
Current
3.6
74LVX374
74LVX374
TA e a 25§ C
TA e
b 40§ C to a 85§ C
Typ
Max
1.5
2.0
2.4
Min
1.9
2.9
2.58
2.0
3.0
0.0
0.0
V
0.5
0.8
0.8
1.9
2.9
2.48
V
VIN e VIH or VIL
IOH e b50 mA
IOH e b50 mA
IOH e b4 mA
VIN e VIH or VIL
IOL e 50 mA
IOL e 50 mA
IOL e 4 mA
V
0.1
0.1
0.36
0.1
0.1
0.44
g 0.25
g 2.5
V
mA
g 0.1
Conditions
Max
1.5
2.0
2.4
0.5
0.8
0.8
Units
g 1.0
VIN e VIH or VIL
VOUT e VCC or GND
VIN e 5.5V or GND
mA
4.0
40.0
VIN e VCC or GND
mA
3
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Noise Characteristics
74LVX374
Symbol
VCC
(V)
Parameter
TA e 25§ C
Typ
Units
CL (pF)
Limit
VOLP
Quiet Output Maximum Dynamic VOL
3.3
0.5
0.8
V
50
VOLV
Quiet Output Minimum Dynamic VOL
3.3
b 0.5
b 0.8
V
50
VIHD
Minimum High Level Dynamic Input Voltage
3.3
2.0
V
50
VILD
Maximum Low Level Dynamic Input Voltage
3.3
0.8
V
50
Note: Input tr e tf e 3 ns
AC Electrical Characteristics
Symbol
VCC
(V)
Parameter
74LVX374
74LVX374
TA e a 25§ C
TA e
b 40§ C to a 85§ C
Min
tPLH
tPHL
Propagation
Delay Time
CP to On
2.7
3.3 g 0.3
tPZL
tPZH
TRI-STATE Output
Enable Time
2.7
3.3 g 0.3
tPLZ
tPHZ
TRI-STATE Output
Disable Time
tW
CP Pulse
Width
tS
tH
fMAX
Min
16.3
1.0
Max
19.5
CL e 15 pF
11.0
19.8
1.0
23.0
CL e 50 pF
6.7
10.6
1.0
12.5
9.2
14.1
1.0
16.0
CL e 50 pF
7.6
14.5
1.0
17.5
CL e 15 pF, RL e 1 kX
10.1
18.0
1.0
21.0
5.9
9.3
1.0
11.0
8.4
12.8
1.0
14.5
18.5
1.0
22.0
3.3 g 0.3
9.6
13.2
1.0
15.0
2.7
7.5
8.0
3.3 g 0.3
5.0
5.5
Setup Time
Dn to CP
2.7
6.5
6.5
3.3 g 0.3
4.5
4.5
Hold Time
Dn to CP
2.7
2.0
2.0
3.3 g 0.3
2.0
2.0
3.3 g 0.3
tOSLH
tOSHL
Max
8.5
11.5
2.7
Output to Output
Skew (Note 1)
60
115
50
45
60
40
100
160
85
60
95
55
2.7
1.5
ns
ns
ns
Min
ns
CL e 15 pF
MHz
ns
74LVX374
TA e a 25§ C
TA e
b 40§ C to a 85§ C
Units
Typ
Max
CIN
Input Capacitance
4
10
COUT
Output Capacitance
6
pF
CPD
Power Dissipation
Capacitance (Note 1)
32
pF
Max
10
pF
Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption
without load.
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4
CL e 50 pF
CL e 15 pF
CL e 50 pF
74LVX374
CPD c VCC c fIN a ICC
Average operating current can be obtained by the equation: ICC(opr.) e
8 (per F/F)
CL e 50 pF, RL e 1 kX
CL e 50 pF, RL e 1 kX
ns
1.5
Min
CL e 50 pF, RL e 1 kX
CL e 15 pF, RL e 1 kX
ns
Capacitance
Parameter
CL e 15 pF
CL e 50 pF, RL e 1 kX
Note 1: Parameter guaranteed by design. tOSLH e l tPLHm b tPLHn l , tOSHL e l tPHLm b tPHLn l
Symbol
Conditions
Typ
2.7
Maximum Clock
Frequency
Units
CL e 50 pF
74LVX374 Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
TL/F/11612 – 5
5
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Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (M)
Order Number 74LVX374M or 74LVX374MX
NS Package Number M20B
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package EIAJ SOIC (SJ)
Order Number 74LVX374SJ or 74LVX374SJX
NS Package Number M20D
7
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74LVX374 Low Voltage Octal D Flip-Flop with TRI-STATE Outputs
Physical Dimensions All dimensions are in millimeters (Continued)
20-Lead Thin Shrink Small Outline Package, JEDEC
Order Number 74LVX374MTC or 74LVX374MTCX
NS Package Number MTC20
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