Appendix
Q
Philips XPLA Support Supplement
Introduction
This appendix is intened to give you specific information for user-directed partitioning when targeting Philips
XPLA CPLDs.
The following table lists the resources for the XPLA family.
Table Q-1. XPLA CPLD Resources
XPLA32
XPLA64
XPLA128
Pins
44
44/68/84/100
84/100/128/160
I/O Pins
32
16/32
64/96/80
Input/Clock Pins
1
1
1
Input Only Pins
3
3
3
Logic Blocks
2
4
8
Total Macrocells
32
64
128
Buried Macrocells
0
16/32
64/32/48
Pterm Clocks
1
3
3
Automatic or User-Directed Partitioning
PLDSynthesis II can take care of the physical partitioning of the design with its patented partitioner. You can
also direct the partitioning by means of a Physical Information (.pi) file. With user-directed partitioning, you can
assign specific functions/nodes to a device and its internals. For more detailed information on the use and structure of a .pi file, see Chapters 14 through 16.
PLDSynthesis II can also use the .pi file to recreate the pinout of a previously automated partition. During the
automated partitioning process solution(s) are found and you choose one from the Solutions menu. Placement
information, including pinout, is then placed in a new physical information (filename.npi) file. The .npi file
becomes a record of how the design is fit onto the device. To recreate a pinout, the .npi file is copied over to the
.pi file so that subsequent refits of the design will maintain the older/previous pin-out.
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Appendix Q - Philips XPLA Support Supplement
Example
DEVICE
“ Device Specified is an XPLA32_32
TARGET ’TEMPLATE XPLA32_32 jlcc-44-P32’;
“ Input clk has to be on pin 43
INPUT clk:43;
“ Input in1 has to be on pin 2
INPUT in1:2;
DEFAULT; “place all remaining (unspecified) outputs into this device
“ Do not use the following pins
NO_CONNECT 4, 5, 6, 7, 9, 10, 11, 12,13, 14, 16, 18, 19, 20, 21, 23, 24, 25, 26, 28;
END DEVICE;
Using the .pi file with Philips XPLA Devices
The Philips fitter for PLDSynthesis II has the following .pi capabilities to increase fitting and refitting of designs:
q
Logic block assignment for functions.
q
Pin and node assignments for functions.
q
Maximum number of product terms.
q
Utilization of the device specifications.
Existing properties are usable with the XPLA32 fitter without modification. These global properties include the
following:
Table Q-2. Global .PI File Properties for Use With XPLA
DEMORGAN_SYNTH
DISABLED_ONLY_FOR_TEST
FF_SYNTH
FIT_AS_OUTPUT
FIT_WITH
MAX_PTERMS
MAX_SYMBOLS
MAX_XOR_PTERMS
NO_COLLAPSE
POLARITY_CONTROL
XOR_POLARITY_CONTROL
XOR_TO_SOP_SYNTH
Assigning Logic Blocks
Philips devices require that you be able to specify how a design is partitioned into the various logic blocks. The
general syntax is shown below.
Syntax
TARGET <block_id>
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Appendix Q - Philips XPLA Support Supplement
Example
For instance, you can specify the targeted block as follows:
TARGET ’TEMPLATE XPLA32_32 jlcc-44-P32’: "place group into XPLA32_32
SECTION
TARGET ’B’;
q1;
END SECTION;
SECTION
TARGET ’A’;
...
out7, out8;
END SECTION;
END DEVICE;
"section targeted at logic block B
"force out7..out8 into Philips logic block A
"assignment without physical pin or node numbers
Assigning Pins
Philips devices have:
q
Physical (absolute) pins - pins on the device package, available to the outside world.
q
Relative node numbers - node locations within the device.
For each node number there is a corresponding node name. Node names are handy because they correspond to
the logic block layout and do not require you to memorize node numbers.
Note that there are two feedbacks associated with each macrocell in a Philips device:
q
Macrocell (register) feedback - feedbacks immediately after the macrocell.
q
Pin feedback - feedback after the tristate buffer.
0 - 16
Product
Terms
P
I/O
Cell
CLK
R
To Array
ZIA
To Array
ZIA
Register
Feedback
Pin
Feedback
Figure Q-1. Simplified Diagram Showing Macrocell and Pin Feedback
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Appendix Q - Philips XPLA Support Supplement
Syntax
B<block_id><feedback_id>
Where:
<block_id> is an optional block identifier from a..h
<feedback_id> = M<mcell_number> | P<mcell_number>
<mcell_number> is the macrocell number from 0 to 15
M<mcell_number> is the macrocell feedback>
P<mcell_number> is the pin feedback.
The feedback ordering above assumes internal feedback precedes the pin feedback and visible macrocells precede buried macrocells.
NOTE !
Specifying pin feedback for buried macrocells will cause the fitter to indicate a semantic
error, since there isn’t pin feedback on buried macrocells.
If the pin feedback is bonded-out, there is a corresponding absolute pin number for the pin feedback as well. This
means the absolute pin numbers can be substituted for the pin feedback.
The following table lists relative node names and their virtual pin numbers. These are followed by absolute pin
numbers for combinations of I/O and package type.
Table Q-3. Relative, Virtual Pins and Absolute for XPLA32_32 Package (JLCC)
Relative Node
Names
Package Pin Number
JLCC
BaM00..BaM15
BaP00..BaP15
4-9,11-14,16-21
BbM00..BbM15
BbP00..BbP15
41-36,34-31,29-24
Example
SECTION
TARGET ’A’;
"put into block A
" Explicitly use buried node to place internal signal in logic block A on macrocell 1 and
" explicitly use the feedback path from the macrocell
"
internalSig:BaM01;
END SECTION;
PLCC (Plastic Leaded Chip Carrier) is the default package for XPLA devices. Although you can specify any
package type for a device, package type information is used only for Timing Path Analysis (found in the fitter
report.) As far as pin assignments are concerned, the current fitter accepts pin numbers only for the default
packages. This means if a non-default package is used, you must translate the design file pin numbers for that
package into equivalent PLCC pin numbers, or use the relative node numbers. For more information on package
pin numbering, see the appropriate XPLA documentation.
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Appendix Q - Philips XPLA Support Supplement
Specifying Device Utilization
The UTILIZATION property allows you to specify the maximum percentage of internal device resources used.
This lets you specify reserve resources in the device. Using the UTILIZATION property affects the use of
pterms and macrocells.
There are two reasons to reserve some resources in a device:
1) Resources may be reserved to allow for expansion of logic.
2) Resources may be reserved to ease and speed the fitting process. Simply put, it is easier for the
Philips XPLA fitter to place and route a solution at 80% utilization, than at 100% utilization. If
design iteration speed is more important than density (e.g., earlier in the design cycle), set the utilization factor to a lower value.
Syntax
{UTILIZATION percent};
Where percent is the maximum percentage of device resources to be used. Values are from 0 to 100.
Unused resources are distributed throughout the device.
Using the XPLA Global Tri-State
The global tri-state (also called Device Under Test or DUT) of the XPLA32 device lets you tri-state all outputs
with a single low-true signal. This is most important during circuit board test, since it effectively removes (electrically) the XPLA device from the board under test.
The global tri-state enable is on pin 44 of the XPLA32 PLCC package. The following table summarizes the tristate enable’s functions.
Table Q-4. XPLA32 Global Tri-State Enable Functions
Signal level
Function
Result
Low (not asserted)
All I/O pins enabled
High (asserted)
All I/O pins tri-state
Normal operation of all macrocell
output enable buffers
All I/O pins tri-state, regardless of
whether or not each macrocell’s
output enable buffer is tri-stated
Setting the Global Tri-State in the .pi File
PLDSynthesis II provides a .pi file property specifically for controlling the XPLA global tri-state. The property
is GLOBAL_ENALBLE and defines which signal in your design will function as the global tri-state enable. The
property will be ignored if used with any device other than an XPLA.
Syntax
{ GLOBAL_ENABLE };
The GLOBAL_ENABLE property must be attached to an input signal in the .pi file. The signal to which the
property is attached will be placed on the input/GTSN pin of the XPLA device (pin 44 of the XPLA32, PLCC).
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Appendix Q - Philips XPLA Support Supplement
If the GLOBAL_ENABLE property is not specified for an XPLA device, the input/GTSN pin on the device can
be used as an ordinary input pin.
The signal used as the global tri-state and the GLOBAL_ENABLE property attached to it must appear in a
DEVICE construct inside the .pi file (the property is ignored if used outside a DEVICE construct.) You can
attach the GLOBAL_ENABLE property to only one input signal per device; However, the input signal may be
specified any number of times in the DEVICE construct. The input signal used as the global tri-state enable may
also be specified inside a SECTION construct. You cannot attach the property on an output in the .pi file.
If you attach the GLOBAL_ENABLE property to a signal, the only device pin you can assign that signal to
explicitly is the input/GTSN pin. Likewise, if you have assigned the property to an input signal, you cannot
assign another signal to the input/GTSN pin.
Since PLDSynthesis II’s functional simulator is device independent, the simulator will ignore the
GLOBAL_ENABLE property and the special function of the GTSN signal.
The GLOBAL_ENABLE property does not affect the functionality or implementation of the ENABLED_BY
construct or the DISABLED_FOR_TEST property. The property also does not affect the differentiation of internal and pin feedback.
Examples
Source File
INPUT i[5], gtsn;
OUTPUT o[5];
o=i;
Physical Information (.pi) Files
The following are examples of valid .pi file usage of GLOBAL_ENABLE.
Example 1
DEVICE
TARGET ’TEMPLATE XPLA32_32 JLCC-44-P32’;
o[1];
gtsn {GLOBAL_ENABLE} ;
"gtsn is the GTSN for this device
END DEVICE;
Example 2
DEVICE
TARGET ’TEMPLATE XPLA32_32 JLCC-44-P32’;
INPUT o[2]:44 { GLOBAL_ENABLE }; " o[2] is the GTSN for this DEVICE, with
O[3];
" a valid pin assignment
END DEVICE;
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Appendix Q - Philips XPLA Support Supplement
The following are examples of invalid .pi file usage of GLOBAL_ENABLE.
Example 3
DEVICE
TARGET ’TEMPLATE XPLA32_32 JLCC-44-P32’;
i[1]:44;
gtsn {GLOBAL_ENABLE} ;
"invalid because i[1] is assigned to pin 44
0[2];
END DEVICE;
Example 4
DEVICE
TARGET ’TEMPLATE XPLA32_32 JLCC-44-P32’;
i[1] {GLOBAL_ENABLE};
gtsn:44 {GLOBAL_ENABLE} ;
"invalid because i[1] is also
"GLOBAL_ENABLE
o[4] {GLOBAL_ENABLE};
"invalid because o[4] is an output
END DEVICE;
Example 5
DEVICE
TARGET ’TEMPLATE XPLA32_32 JLCC-44-P32’;
SECTION
gtsn:01 {GLOBAL_ENABLE} ;
gtsn:02 {GLOBAL_ENABLE};
"OK, but redundant
END SECTION;
END DEVICE;
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Appendix Q - Philips XPLA Support Supplement
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Appendices