E3 238 Analog VLSI Circuits
Lecture 4: Threshold Voltage, Second Order Effects
Gaurab Banerjee
Department of Electrical Communication Engineering,
Indian Institute of Science, Bangalore
banerjee@ece.iisc.ernet.in
Threshold Voltage
->
Onset of inversion in an NMOS device (opposite for PMOS): Interface is as
much n-type as the bulk is p-type
->
Gate voltage that achieves this condition = threshold voltage (VTH)
->
More accurate definition:
Φ MS = poly-Si to semiconductor work function
difference --> “BUILT-IN FERMI POTENTIAL” ->
subscript “MS” used for older technologies
Φ F = Difference between the Fermi potential of
the substrate and intrinsic silicon
Threshold Voltage
•
Positive bias on gate -> Holes repelled from bulk -> Immobile negative
charge left behind -> depletion region charge modifies VTH -> Qdep/Cox
•
Charge trapped in thin oxide leads to voltage drop across the oxide
-> Qox/Cox
Native transistor threshold voltage
Adjustment using
implanted charge
under the gate
xd = depletion region width
Nox = 109 ions/cm3 , almost always positive
Modern CMOS processes have native, low-VT, high-VT and thick oxide (very high VT)
devices
-> Carefully choose the device that you need in your application !!!
Body Effect
fixed charge
More fixed charge !!
•
Depletion region charge is a key component of threshold voltage
•
As VSB (source to substrate voltage) is increased, depletion region
“expands”, uncovering more charge.
Body Effect
•
If the bulk potential is different from the source potential -> body effect is
present.
•
Changes the effective transconductance of the device -> more on this later
•
Additional degree of freedom in adjusting threshold voltage -> used in
digital circuits (body/well bias) to reduce leakage
Channel Length Modulation
Increase in depletion layer width at the drain end as drain voltage is increased.
Pinch-off => VDS = VGS – VTH = VDSAT
Channel Length < L for VDS > VDSAT
Channel Length Modulation
Infinite output impedance ->
ideal current source
•
λ -> relative variation in length for a given increase in VDS
•
λ is smaller for longer channel lengths in the same technology
•
Linear approximation ∆L/L = λ VDS is less accurate for shorter channel devices ->
variable slope is observed!
•
VDS dependence of drain current is NOT an additional degree of freedom in setting
up bias current -> DO NOT use this to “adjust” biases -> not very accurate and reliable!
•
Question: what happens if the high impedance (drain) node is stacked on another
high impedance node ? More on this later (CMFB)…