Module 3:Digital Electronics
Derived Gates
Quote of the day
“Never think you are nothing, never
think you are everything, but think you
are something and achieve anything ”.
― Albert Einstein
Review basic gates
X
0
0
1
1
Y
0
1
0
1
AND
X·Y
0
0
0
1
X
0
0
1
1
X
Y
X
X·Y
Y
Y
0
1
0
1
OR
X+Y
0
1
1
1
NOT
Y
0
1
X+Y
Y
Ȳ
1
0
Ȳ
Derived gates
AND + NOT=NAND
A
Logical Symbol
A·B
B
A
B
A
0
0
1
1
NAND
B
A·͞ B
0
1
1
1
0
1
1
0
A·B
Derived gates
• OR + NOT=NOR
Logical Symbol
A
B
A
0
0
1
1
NOR
B
A+͞ B
0
1
1
0
0
0
1
0
A+B
Derived gates
• Exclusive-OR EX-OR
Boolean Expression
for EX-OR
ĀB + AB̄
• Logical Symbol
A
0
0
1
1
EX-OR
B AB
0
0
1
1
0
1
1
0
Derived gates
• Exclusive-NOR EX-NOR
Boolean Expression
for EX-NOR
AB+ĀB̄
• Logical Symbol
A
B
AʘB
EX-NOR
A
B
0
0
0
1
1
0
1
1
AʘB
1
0
0
1
Universal gates
• NAND and NOR gates are called as universal gates
because we can implement all gates using these
gates.
• NAND as Universal gates
• NOT using NAND
A
A
A·A=Ā
• AND using NAND
A
B
A·B = A·B
NAND as Universal gates
• OR using NAND
Ā
A
AB  A  B  A  B
B
B̄
• NOR using NAND
A
Ā
AB
B
B̄
AB
EX-OR using NAND
A
A .A  B   A  A  B  A  AB
2
A
B
1
4
A·B
3
B


B . A  B  B  A  B  B  AB
OUTPUT OF GATE 4:
B  A A  B  B  A  A  B  B  A  A  B  AB  AB
EX-NOR using NAND
A
A .A  B   A  A  B  A  AB
2
A
B
 A B
1
4
A·B
5
3
B


B . A  B  B  A  B  B  AB
 B A
OUTPUT OF GATE 4:
B  A A  B  B  A  A  B  B  A  A  B  AB  AB
OUTPUT OF GATE 5:
AB  AB
   

 AB  AB  A  B  A  B

NOR as universal gate
• OR using NOR
• NOT using NOR
A͞+A=Ā
A
A͞+B
A
B
A
• AND using NOR
Ā
A
A  B  A B  A B
B
• NAND using NOR
A
Ā
B
B̄
B̄
A  B  A B  A B
A B
A+B
EX-NOR using NOR
A
A
B A
B
A͞+B
B
OUTPUT OF GATE 2:


A  . A  B  A  A  B  A   A  B  A  A  A  B  A  B
OUTPUT OF GATE 3:


B  . A  B  B  A  B  B   A  B  B  A  B  B  A  B
OUTPUT OF GATE 4:
A  B  A  B  A  B A  B  A  B A  B  A  B A  B
EX-OR using NOR
A
B
• Output of Gate 4
A  B A  B
• Output Gate of 5
A  B A  B  A  B A  B  AB  AB  AB  AB
Half adder using basic gates
• Half adder is a circuit which adds two one bit
binary data.
• The result of half adder generates sum(S) and
carry (C).
Half Adder
• Observe the truth table.
A
B
S
C
• S=AB and C=A·B,
0
0
0
0
• S=Ā·B+A·B̄
S=ĀB + AB̄
C=A.B
Fig. Logic Diagram using basic gates
0
1
1
1
0
1
1
1
0
0
0
1
Half adder using Logic gates
• Use EX-OR gate for
sum and AND gate
to generate carry
• Half adder using
NAND
A
B
A
B
S=AB
C=A.B
A
2
1
4
A·B
S=AB
3
B
C=A·B
• Half adder does not add the carry generated
from previous stage.
Full Adder
• Full adder is the circuit which adds two bits along with
carry in(Cin) and generates Sum(S) and carry out (Cout).
• From Truth Table Writing equation for S and Cout.
• S=ĀB̄Cin+ĀBCin̄ +AB̄Cin̄ +ABCin
• S=(ĀB̄+AB)Cin+ (ĀB+AB̄)Cin̄
• S=(AʘB)Cin+(AB) Cin̄
S=(AB) Cin
Now writing for Cout
• Cout =ĀBCin+AB̄Cin+ABCin̄ +ABCin
• Cout =ĀBCin+AB̄Cin+AB(Cin̄ +Cin)
• Cout =(ĀB+AB̄)Cin+AB
Cout =(AB) Cin+AB
A
Full Adder
B Cin S
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
0
0
1
1
1
0
1
1
Cout
0
1
1
0
0
0
0
1
0
0
1
0
1
1
1
1
Full adder using Logic gates
AB
Full adder using NAND gates
A
A
B
1
Cin
2
4
A·B
B
3
7
6
AB
9
8
10
5
A·B
S=AB  Cin
11
Cout=(AB ) Cin +A·B
Reduction of carry out expression using Boolean algebra
Consider the expression for carry out.
Cout =ĀBCin+AB̄Cin+AB(Cin̄ +Cin)
Cout =ĀBCin+A(B̄Cin+B)
Cout =ĀBCin+A(Cin+B)
Cout =(ĀB+A)Cin+AB=(B+A)Cin+AB
Cout = AB + Acin + Bcin
• This expression consists of product terms which
are summed together to form Boolean
expression. Such expressions are referred as sum
of product form(SOP) equations.
• Now let us implement this expression using basic
gates(AND-OR-NOT).
Implementation of SOP equation using Basic Gates
• Cout = AB + Acin + Bcin
• To Implement this expression using basic gates
we require three AND gates and one OR gate.
A
1
B
A
2
Cin
B
Cin
3
4
Cout
Implementation of SOP equation using NAND Gates
A
Double Inversions cancel's out
1
B
A
2
Cin
B
Cin
3
Cout
4
Bubbled OR gate
A  B  C  A B C


Bubbled OR gate is
equivalent to NAND
gate, So Replace
Implementation of SOP equation using NAND Gates
A
1
B
A
2
Cin
B
Cin
4
Cout
3
Bubbled OR gate is
equivalent to NAND
gate, So Replace