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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 9, SEPTEMBER 2002
A Novel Frequency-Independent Third-Order
Intermodulation Distortion Cancellation Technique
for BJT Amplifiers
Mark P. van der Heijden, Student Member, IEEE, Henk C. de Graaff, Member, IEEE, and
Leo C. N. de Vreede, Member, IEEE
Abstract—Second-harmonic control is implemented in a balanced common-emitter configuration to facilitate frequency-independent third-order intermodulation distortion cancellation.
Moreover, this circuit configuration facilitates a simultaneous
match for either power and linearity or noise and linearity.
Experiments demonstrated an improvement of over 15 dB in the
output third-order intercept point while maintaining freedom in
the choice of load and source impedance.
Index Terms—Bipolar junction transistor, differential amplifier,
distortion cancellation, linearization, LNA, matching, third-order
intermodulation distortion.
I. INTRODUCTION
Fig. 1. Matching triangle for LNAs.
B
IPOLAR devices still dominate today’s market for high
dynamic-range low-noise amplifiers (LNAs) for wireless
communication systems. This is due to their high transconductance at low current levels and their relatively good noise
performance. Currently, there is a move toward SiGe heterojunction bipolar transistors (HBTs) because they have inherently
better low-noise performance and higher cutoff frequency
than their more conventional homojunction counterparts.
Generally, bipolar devices are strongly nonlinear due to their
exponential nature. To meet the increasing demands on linearity
made by today’s mobile communication standards, linearity is
traded off against collector current, which increases the dc power
consumption. A common technique to circumvent this and still
reduce distortion is to apply series feedback in the emitter of
the transistor in a common-emitter (CE) configuration [1]. This
reduces the distortion due to the nonlinear exponential current
relationship by reducing the available gain of the CE stage.
The ultimate goal in LNA design is to obtain a simultaneous
device-matching condition for all the amplifier requirements
, low noise
, and high linearity
yielding high gain
(IP3 ) as shown in Fig. 1. A simultaneous noise and impedance
match has already been reported in [2]. The focus of this work is
on the requirements for linearity and impedance matching.
This paper presents a novel circuit concept which facilitates excellent linearity at low dc collector current while maintaining
excellent noise or gain performance with maximum freedom in
Manuscript received December 5, 2001; revised February 28, 2002. This
work was supported by RF Modules, Philips Semiconductors, Nijmegen, The
Netherlands.
The authors are with the Laboratory of Electronic Components, Technology
and Materials ECTM, DIMES, Delft University of Technology, 2600 GB Delft,
The Netherlands (e-mail: m.p.vanderheijden@its.tudelft.nl).
Publisher Item Identifier 10.1109/JSSC.2002.801198.
sourceandloadmatching.First,toaccomplish thegoalofhighlinearity at low and high frequencies, a fully frequency-independent cancellation technique for third-order intermodulation distortion (IM3) has been developed. The basic principle of this IM3
cancellation relies on the separate treatment of IM3 products generated directly by third-order nonlinearities, and IM3 products
that are generated indirectly by mixing of first- and second-order
products with second-order nonlinearities. Obviously, cancellation can only occur if both contributions have opposite signs. Essential for this requirement is the presence of shunt or series elementsinthebaseor intheemitter ofthedevice.This techniquewas
first reported in [3], in which third-order distortion cancellation is
achieved via the series resistances in the base and emitter. In practice, however, this effect is masked when the device is operated at
RF frequencies, where the reactive components dominate the device and circuit performance [4]. In yet another report, partial IM3
canceling at higher frequencies was attributed to the interaction
of the base–emitter diffusion capacitance and the exponential current relationship [5]. More recent work also includes the contribution of the base–emitter depletion capacitance to the high-frequency nonlinear behavior of a CE stage but does not focus on
IM3 cancellation effects [1]. Second, to accomplish the goal of
orthogonality in the matching requirements, we propose a differential circuit topology. This topology allows for a simultaneous
impedance/IP3 or noise/IP3 match (see Fig. 1). This is accomplished by using the common-mode signal path to tune IP3 and
the differential signal path to tune for impedance or noise.
Section II describes the theory for the full frequency-span
IM3 cancellation by identifying the missing circuit/device
requirements by means of a Volterra series analysis. In
Section III, these requirements are implemented in a balanced
0018-9200/02$17.00 © 2002 IEEE
VAN DER HEIJDEN et al.: INTERMODULATION DISTORTION CANCELLATION TECHNIQUE
1177
where the Taylor coefficients are
Fig. 2. Simplified large-signal model of a bipolar transistor in commonemitter configuration.
CE stage and verified using harmonic balance (HB) simulations
with a Gummel–Poon model of a commercially available
GHz). Section IV
double-polysilicon transistor (
discusses the implementation and experimental verification of
an IM3-compensated balanced CE-amplifier circuit in support
of our theory. Conclusions are given in Section V.
II. IM3 ANALYSIS OF A COMMON-EMITTER STAGE
In this section, the IM3 cancellation requirements are derived
using a Volterra series analysis. First, we calas a function of
culate the full expression and identify the requirements for lowfrequency IM3 cancellation. Then, the requirements for highfrequency cancellation are calculated and verified by an HB
simulation.
Fig. 2 shows the large-signal model of a bipolar transistor
and
in CE configuration used in the analysis.
are the source and load impedance, respectively, and
and
are, respectively, the input and output voltages of the circuit. We
assume that the transistor is properly biased at an intermediate
and relatively low . For these lower collector currents,
exponential distortion dominates [6], whereas quasi-saturation
and high injection effects are still negligible. Consequently, the
predominant source of distortion is the nonlinear exponential
characteristic, which in our analysis, for reasons of simplicity,
[7]:
is set equal to the ideal forward current
(3)
Furthermore, we assume the base–emitter depletion capacitance
and the collector–base depletion capacitance
to be linear.
This is justified as long as the transistor is operated at a relatively
in order to keep the comlow . For the moment, we omit
plexity of the equations manageable. Since this assumption is
not entirely correct, it will be addressed in Section II-B.
A. Volterra Series Analysis of a CE Stage
The Volterra series is solved symbolically by calculating the
Volterra kernel transforms of the node voltages up to the third
order [8]. We do this by computing the voltage transfer functions
in increasing order by repeatedly solving a linear network as
shown in the Appendix. The linear transfer function of the network is represented by the first-order kernel transform at node 2
of the linearized network (see Fig. 11 in the Appendix)
(4)
.
where
The calculation of the third-order Volterra kernel is restricted
. The
to the third-order intermodulation frequency at
complete expression is given by (5), shown at the bottom of the
page, where
(1)
and the diffusion charge
The base current
are linearly proportional to with the maximum forward
and the forward transit time as constants. For
current gain
. Thus, the basic nonlinthe analysis, we assume that
earities can be described as a Taylor series expansion up to the
third degree, as follows:
(2)
(6)
can now be calculated
The magnitude of IM3 at
using (3)–(5) as in [8], shown in (7) at the bottom of the page.
The numerator in (7) has two factors. The first factor depends
and
at the IM3 frequency
. Hence,
only on
cancellation of this term can only occur at a single frequency
(5)
IM3
(7)
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 9, SEPTEMBER 2002
using an inductor as source impedance [1]. Moreover, it is not
possible to obtain orthogonality in the matching requirement
for power and IP3. The second factor in the numerator of (7)
is expanded into (6). Surprisingly enough, this factor depends
both at the
only on the linearized transistor parameters and
and
second-order intermodulation (IM2) frequency
. Note that the zeros
the second harmonic (H2) frequency
of result in a cancellation of the IM3 products. Since the IM3
compensation is in principle based on the canceling of the direct third-order nonlinear terms with the indirect mixing of the
second-order nonlinear terms with the fundamental, is considered to be the controlling factor in this process. At low frequencies, (6) reduces to
(8)
Setting this equation to zero, we obtain the well-known low-frequency IM3 cancellation requirement for the source impedance
[3]
(9)
in (6) and
Substitution of
setting to zero result in the high-frequency IM3 cancellation
requirement
(10)
If both requirements are fulfilled, this yields a frequency-independent cancellation of the real and imaginary part of . We
observe that the current level at which cancellation occurs is
and . Confixed for a given intrinsic bipolar transistor by
at
sequently, (9) and (10) reduce to a single requirement for
fixed
at
If we set
cancellation
In Fig. 3, the circuit schematic of the CE stage is shown together
and
with a list of parameters used in the model of Q1 [10].
are the dc blocking capacitor and dc feed inductor, respectively, which are assumed here to be ideal components with infinite values. In the previous calculations, we did not consider the
. If we add this capacitance as a linear compoinfluence of
nent to our model, the calculations, as described in the Appendix,
yield an extra high-frequency IM3 cancellation requirement for
the load impedance in addition to (11). This additional requirecauses
ment can be found as follows. For higher frequencies,
a voltage–current feedback to the base. Since this feedback disturbs the IM3 cancellation condition at the input, the voltage drop
must be zero for second-order harmonic signals. To acover
) and the
complish this, the second-order voltage at the base (
) must be equal.
collector (
(14)
where
Using (2), (3), (11), and (25),
becomes
(11)
, (6) yields another solution for IM3
at
(12)
However, this solution requires a second-harmonic short at the
input of the transistor, which would limit the bandwidth for
IM3 cancellation in the circuit. Note that more freedom can be
by placing a linear capacitor in
obtained in the choice of
parallel with the base–emitter junction or by scaling the emitter
(
and
are in principle
length of the device to increase
independent of the emitter length [9]).
B. Harmonic Balance Simulation of a CE Stage
As an illustration of the presented theory, we have used the
HB simulator of Agilent’s Advanced Design System (ADS) to
compute the output third-order intercept point (OIP3) versus
at different frequencies by using the simplified nonlinear model.
The OIP3 is defined as in [8]
OIP3
Fig. 3. Schematic of the single-ended CE amplifier, which is used for
harmonic balance simulations with V
= 1:5 V and swept V .
[V]
(13)
(15)
As long as condition (14) is satisfied, IM3 cancellation exists,
and in theory, there is no third-order voltage at the output. Since
the cancellation process only depends on the proper ratio between fundamental and second-order voltages over the junction,
which has been fixed by the proper choice of , the linear feedback will not affect the cancellation. Hence, the requirements for
IM3 cancellation of the circuit in Fig. 3 become
and
according to (11) and (15), respectively. Fig. 4
at different center frequenshows the simulated OIP3 versus
cies and a fixed delta frequency. It is observed that the peak OIP3
is largely independent of frequency as expected from the theory.
A drawback of this configuration is that we cannot obtain a
conjugate power match or noise match at the fundamental frequency required in (11) and (15) without introducing harmonic
terminations. This fixes the operating frequency and is difficult to implement. Furthermore, the bias circuitry is also part
of the load and source impedance. In order to meet the requireand
have to be
ments in (11) and (15), the values of
very high. However, a balanced equivalent of the CE stage circumvents the problems related to the bias circuitry and avoids
VAN DER HEIJDEN et al.: INTERMODULATION DISTORTION CANCELLATION TECHNIQUE
1179
Fig. 5. Schematic of the balanced CE-amplifier including bias circuitry, which
= 1:5 V and swept V .
is used for harmonic balance simulations with V
The transformer impedance ratio from the primary to the secondary winding
is 4.
Fig. 4. Simulated OIP3 versus collector current I (=I ) of the single-ended
CE amplifier at three different center frequencies f , where Z = 1500 and
Z
= 10 (solid curves) and Z = Z = 50 (dotted curves) using the
simplified large-signal model.
the use of harmonic terminations. The proposed configuration
uses a center-tapped transformer for second-harmonic control
at the input of the device and facilitates orthogonality in the
matching requirements for linearity and power/noise. Moreover,
even-order harmonics are suppressed at the output, which basically improves the total distortion behavior of the amplifier.
Due to the differential nature of the circuit, the second-order
Volterra kernel is zero at all nodes except at the base of both
transistors (nodes 2 and 3) and at the center tap of the input
transformer (node 7). The third-order Volterra kernel is now
given by (17) shown at the bottom of the page, where
, and
III. BALANCED CE AMPLIFIER
The balanced CE amplifier configuration and its simplified
linearized equivalent circuit are shown in Figs. 5 and 6, respectively. In Section II, we demonstrated that IM3 cancellation
depends completely on the proper loading of the IM2 and H2
harmonics. In a balanced configuration, we can discriminate
between even- and odd-order frequency components by making
use of common-mode (CM) and differential-mode (DM)
signal paths. Note that at the input transformer the generated
but not . At the
even-order voltages are developed across
output transformer, the even-order voltages at nodes 4 and 5,
, are all zero. The odd-order voltages at the input
and across
instead of
, and at the output these
are developed across
. Using the discrimination between the
are developed across
even and odd harmonics in the balanced circuit, we have an
extra degree of design freedom. This freedom can be utilized to
improve for gain or noise matching.
The above can be supported by a Volterra series analysis on the
balanced configuration using the simplified large-signal model,
. This analysis is not included here, but can be
in which
performed in a manner similar to that used for the unbalanced CE
amplifier. Therefore, only the main results are presented here. The
linear transfer function at node 6 (see Fig. 6) becomes
(16)
where
.
(18)
Solving (18) for a
independent of frequency, we obtain
at
(19)
at
(20)
or
and
Note that the latter solution is not entirely frequency indepen, and it is therefore
dent due to the required harmonic short at
in
discarded. Furthermore, in this situation the inclusion of
our balanced configuration does not lead to an extra IM3 cancellation requirement. This is due to the short-circuit condition
for even-order harmonics imposed by the output transformer at
(17)
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 9, SEPTEMBER 2002
Fig. 6. Linearized equivalent circuit of the balanced CE amplifier.
the collector output of the transistors. Consequently,
is effectively in parallel with the base–emitter depletion capacitance
for second-order voltages as given by the Miller approximation,
and (19) becomes
at
(21)
If this condition is satisfied, the third-order distortion will
can be chosen by scaling up
cancel. Note that also a higher
in parallel with
as
the device or by adding a capacitor
shown in Fig. 6. One half the value of this capacitor has to be
in (21) because it is a CM capacitance. The
added to and
latter solution will not degrade the linear device performance
in terms of gain, noise, and .
is shown
In Fig. 7, the simulated OIP3 versus
for the balanced circuit using the simplified model including
. From these results, it is clear that the OIP3 is frequency in, calculated from (21). A theoretical
dependent for
improvement of more than 30 dB can be achieved compared to a
balanced CE amplifier without control of the CM signal, when
. In Fig. 8, the independence of the IM3 cancellation technique on the source impedance is demonstrated. Lines
plane in the Smith chart
of constant OIP3 are plotted on the
resulting from a two-tone source-pull analysis for
and
at
GHz. The optimum source reflecwith related minimum noise figure
tion coefficient
is also indicated on these plots. Note that the very low value
is a consequence of the neglected base resistance and
of
. The figure shows that the OIP3 is
the rather high value of
well above 40 dBm (peak value in Fig. 7) and that the source
impedance basically does not affect the cancellation. The variations found can be explained by numerical deviations of the simwith respect to the noise performance of
ulator. The role of
an LNA will not pose a problem. The voltage noise source origcan be shifted over node 7 toward node 2
inating from
and node 3 (see Fig. 6) resulting in two correlated noise sources
with equal phase. Ideally, these sources will transform back to
the input in antiphase and cancel out due to the differential nature of the transformer balun.
is shown
In Fig. 9, the simulated OIP3 versus
when using the complete Gummel–Poon model for the transistors with the parameters found in [10]. In this simulation,
is chosen to be 600 to compensate for the presence of
base and emitter resistances and some additional capacitive parasitics. For example, additional parasitic capacitance will add
Fig. 7. Simulated OIP3 versus collector current I
(=2I ) of the
balanced CE amplifier at three different center frequencies f , where
R
= 652 (solid curves) and R = 0 (dotted curves), and
Z = Z = 50 using the simplified large-signal model.
linearly to . This affects both the current level and the value
. The CM resistance of the two base resistors
at node
of
, so
must be subtracted. The CM
7 is in series with
resistance of the emitter resistors at node 7 is approximately
and must also be subtracted from
. When using the
full Gummel–Poon model, the OIP3 is less pronounced and less
frequency independent than expected from theory. This can be
and
explained by contributions from the weak nonlinearities
, from the base resistance, and from the forward and reverse
Early effects that deteriorate the pure exponential behavior of
the device. Another observation in Fig. 9 is that the current level
at which cancellation occurs is lower than that is observed in
Fig. 7. This effect is mainly caused by the reverse Early voltage
and the forward Early voltage
, which reduces the
by [7]
current gain and the collector current
(22)
Since the cancellation technique depends on the ideal forward
rather than , also the current level shifts at which
current
cancellation occurs. Substitution of the Early voltages
V and
V (see [10]) reduces
approximately
by 45% as observed in Fig. 9. In support of the theory presented
in this paper, Section IV describes the implementation and experimental results of a balanced CE amplifier.
VAN DER HEIJDEN et al.: INTERMODULATION DISTORTION CANCELLATION TECHNIQUE
1181
Fig. 8. Simulated constant OIP3 contours plotted in the source reflection plane of the Smith chart for
reflection coefficient 0
for minimum noise figure F
is indicated in both charts.
Fig. 10.
board.
Fig. 9. Simulated OIP3 versus collector current I
of the balanced CE
amplifier at three different center frequencies f , whereR = 600 (solid
curves) and R = 0 (dotted curves), and Z = Z = 50 using the full
Gummel–Poon model.
IV. EXPERIMENTAL VERIFICATION
Fig. 10 shows a photograph of a balanced CE amplifier imple) high-frequency laminate of
mented on a RO4003® (
Rogers Corporation using two BFG410W wide-band transistors
of Philips Semiconductors and Mini-Circuits transformers. The
center-tapped transformers of type TC4-14 have an impedance
ratio of 4 and are in cascade with a balun of type TCML1-11
to ensure good amplitude and phase balance over a wide frequency range. Note that the IM3 cancellation is based on the
proper termination of the second-order products. Therefore, the
transformer must have at least one octave of bandwidth. Since
the transformer combinations have an upper cutoff frequency of
approximately 1 GHz, two-tone measurements were performed
MHz and
MHz.
at
In Fig. 11(a) and (b), the OIP3 is shown as a function of
MHz and
MHz,
the total dc current for
. The gain
respectively, at three different frequency spacings
of the amplifier is around 16 dB at these frequencies, measured
in a 50- environment. The experiment is in agreement with
the developed theory that is even more clearly supported by
R = 652 and R = 0 . The optimum source
Implementation of the balanced CE amplifier on a printed circuit
comparing the results for the same circuit with and without the
. An improvement of more
second-harmonic control resistor
than 15 dB in OIP3 is obtained by applying the correct resistor
. Fig. 12 shows the output power of the
value
fundamental, IM3, and IM5 as a function of input power for a
MHz and
MHz. We observe
two-tone test at
an improvement in IM3 and IM5 of more than 20 and 10 dB,
respectively, over a wide range of input powers. These results
demonstrate that this circuit concept can dramatically extend
the spurious-free dynamic range of an amplifier with complete
freedom for power or noise matching. Extension of this technique to higher frequencies should be feasible by on-chip IM3compensating elements in a balanced CE configuration utilizing
robust biasing techniques [4].
V. CONCLUSION
A novel design technique has been presented for broad-band
high-linear low-power LNAs. The technique utilizes exponential IM3 canceling by proper termination of the second-order
products, facilitating orthogonality in OIP3 and impedance or
noise matching. Experimental data confirms the theory and
demonstrates an improvement of more than 15 dB in OIP3
compared to a noncompensated design, yielding a dramatic
improvement in dynamic range at low dc power consumption.
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 9, SEPTEMBER 2002
Fig. 13.
Linearized equivalent circuit of the single-ended CE amplifier.
APPENDIX
The linearized circuit of the unbalanced CE amplifier is
shown in Fig. 13. In order to calculate the first-order (linear)
response, the circuit is excited with an external voltage source
. The solution of the following matrix equation, which results
from the compacted MNA method, produces the first-order
Volterra kernels [8]
(a)
(23)
(b)
Fig. 11. Measured OIP3 versus I
MHz for different tone spacing
R
(dotted curves).
385
=0
at (a) f = 225 MHz and (b) f =
1f with R = 600 (solid curves) and
is the admittance matrix of the circuit,
is the
where
vector of the first-order Volterra kernel transforms of the node
is the vector of excitations with the excitation
voltages, and
. Equation (4) can be obtained by solving (23)
voltage
, and
.
using Cramer’s rule and setting
The second-order Volterra kernel transforms of the node voltages in the nonlinear circuit are found by solving the following
matrix equation:
(24)
are the second-order Volterra kernels and
where
is the vector of nonlinear current sources of order two.
These current sources are placed in parallel with their linear
is replaced by a short. The secondequivalents in Fig. 13 and
order current sources are
(25)
The second-order Volterra kernels are now obtained by solving
(24) using Cramer’s rule as shown in (26) at the top of the next
page.
The third-order Volterra kernel transforms of the node voltages in the nonlinear circuit are found by solving the following
matrix equation:
Fig. 12. Measured output power of the fundamental, IM3, and IM5 versus
input power at f
MHz with R
and R
.
= 385
= 600 =0
Moreover, the technique is effective up to the compression
region, making it applicable to medium-power amplifiers.
(27)
are the third-order Volterra kernels and
where
is the vector of nonlinear current sources of order three.
VAN DER HEIJDEN et al.: INTERMODULATION DISTORTION CANCELLATION TECHNIQUE
1183
(26)
These current sources are placed in parallel with their linear
equivalents in Fig. 11 and their values are
(28)
where
.
Equation (5) can be obtained by solving (27) using Cramer’s
,
and
.
rule and setting
ACKNOWLEDGMENT
The authors would like to thank Prof. Dr. J. N. Burghartz and
Prof. Dr. L. K. Nanver for their support.
REFERENCES
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[4] G. V. Klimovitch, “On robust suppression of third-order intermodulation
terms in small-signal bipolar amplifiers,” in IEEE MTT-S Int. Microwave
Symp. Dig., June 2000, pp. 477–479.
[5] S. A. Maas, B. L. Nelson, and D. L. Tait, “Intermodulation in heterojunction bipolar transistors,” IEEE Trans. Microwave Theory Tech., vol.
40, pp. 442–448, Mar. 1992.
[6] L. C. N. de Vreede, H. C. de Graaff, J. A. Willemen, W. van Noort, R.
Jos, L. E. Larson, J. W. Slotboom, and J. L. Tauritz, “Bipolar transistor
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[7] P. Antognetti and G. Massobrio, Semiconductor Device Modeling with
SPICE. New York: McGraw-Hill, 1988.
[8] P. Wambacq and W. Sansen, Distortion Analysis of Analog Integrated
Circuits. Norwell, MA: Kluwer, 1998.
[9] L. C. N. de Vreede, “HF silicon ICs for wide-band communication systems,” Ph.D. dissertation, Delft Univ. Technol., Delft, The Netherlands,
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[10] NPN 22 GHz wideband transistor, product information. Philips
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Mark P. van der Heijden (S’98) was born in Benthuizen, The Netherlands, in 1976. He received the
B.S. degree in electrical engineering from The Hague
Polytechnic, The Hague, The Netherlands, in 1998,
and the Master of Technological Design (M.T.D.) degree in microelectronics from the Delft University of
Technology, Delft, The Netherlands, in 2000, where
he is currently working toward the Ph.D. degree in
electrical engineering.
He joined the Laboratory of Electronic Components, Technology and Materials, Department
of Information Technology and Systems, Delft University of Technology, in
1998. From 1998 to 2000, he worked on isothermal characterization of MOST
devices and power amplifier design for linearity. His research interests include
design of RF building blocks for linearity and dynamic range.
Henk C. de Graaff (M’92) was born in Rotterdam,
The Netherlands, in 1933. He received the M.Sc. degree in electrical engineering from the Delft University of Technology, Delft, The Netherlands, in 1956,
and the Ph.D. degree from the University of Technology, Eindhoven, The Netherlands, in 1975.
He joined Philips Research Laboratories, Eindhoven, in 1964, where he has been working on
thin-film transistors, MOST, bipolar devices, and
material research on polycrystalline silicon. His
current field of interest is device modeling for circuit
simulation. Since his retirement from Philips Research in November 1991, he
has been a Consultant to the University of Twente, Twente, The Netherlands
(until 1996) and the Delft University of Technology, Delft, The Netherlands.
Leo C. N. de Vreede (M’01) was born in Delft, The
Netherlands, in 1965. He received the B.S. degree in
electrical engineering from The Hague Polytechnic,
The Hague, The Netherlands, in 1988 and the Ph.D.
degree from Delft University of Technology, Delft,
The Netherlands, in 1996.
In 1988, he joined the Laboratory of Telecommunication and Remote Sensing Technology,
Department of Electrical Engineering, Delft University of Technology. From 1988 to 1990, he
was involved in the characterization and physical
modeling of CMC capacitors. From 1990 to 1996, he worked on modeling
and design aspects of HF silicon ICs for wide-band communication systems.
In 1996, he was appointed as Assistant Professor with the Delft University of
Technology, working on the nonlinear distortion behavior of bipolar transistors
at the device physics, compact model, and circuit level, at the Delft Institute
of Microelectronics and Submicron Technology (DIMES). In the winter of
1998–1999, he was a guest of the High-Speed Device Group, University of San
Diego, San Diego, CA. In 1999, he became an Associate Professor, responsible
for the Microwave Components Group of the Delft University of Technology.
His current research interest is technology optimization and circuit design for
improved RF performance and linearity.