APL3518E
USB Power-Distribution Switches
General Description
Features
•
•
•
•
•
•
•
•
The APL3518E series of power switches are designed
for USB applications. The 62mΩ N-channel MOSFET
55mΩ High Side MOSFET
Wide Supply Voltage Range: 2.7V to 5.5V
power switch satisfies the voltage drop requirements of
USB specification.
Current-Limit and Short-Circuit Protections
Over-Temperature Protection
The protection features include current-limit protection,
short-circuit protection, and over-temperature protection.
Fault Indication Output
Enable Input
The device limits the output current at current limit threshold level. When VOUT drops below 1.5V, the devices limit
UL Approved-File No. E328191
Nemko IEC 60950-1:2005(2nd Edition); Am 1:2009
the current to a lower and safe level. The over-temperature protection limits the junction temperature below
CB Scheme Certified, No.62377
•
TUV IEC 60950-1:2005+A1:2009 and
140oC in case of short circuit or over load conditions.
Other features include a deglitched OCB output to indi-
EN 60950-1:2006+A11:2009+A1:2010 Certified,
No.44 780 11 393954
•
cate the fault condition and an enable input to enable or
disable the device.
Lead Free and Green Devices Available
(RoHS Compliant)
Simplified Application Circuit
5V
Applications
•
•
•
USB Port
VIN
VOUT
APL3518E
USB
Controller
Notebook and Desktop Computers
USB Ports
High-Side Power Protection Switches
OCB
EN
GND
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
1
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APL3518E
Pin Configurations
GND 1
8 VOUT
VIN 2
7 VOUT
VIN 3
6 VOUT
EN 4
5 OCB
VOUT 1
5 VIN
GND 2
OCB 3
MSOP-8
APL3518E
(Top View)
4 EN
SOT-23-5
APL3518E
(Top View)
Ordering and Marking Information
APL3518E
Package Code
X : MSOP-8
B : SOT-23-5
Operating Ambient Temperature Range
o
I : -40 to 85 C
Handling Code
TR : Tape & Reel
Assem bly M aterial
G : Halogen and Lead Free Device
Assembly Material
Handling Code
Tem perature Range
Package Code
APL3518E X:
L518E
XXX
XX
XXXXX - Date Code
APL3518E B:
L8EX
X - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings
S ymbol
V IN
VIN_PEAK
(Note 1)
Param eter
VIN Input Volta ge (VIN to GND)
VIN Input Peak Volta ge (width<1 0µs)
Rating
Unit
-0.3 ~ 7
V
9
V
VOUT
VOUT to GND Vo ltag e
-0.3 ~ 7
V
V EN
EN to GND Vo ltag e
-0.3 ~ 7
V
VOCB
OCB to G ND Voltage
-0.3 ~ 7
TJ
Ma xim um Junction Tempera tu re
T STG
Sto rage Temperature
T SDR
Ma xim um Le ad So lderin g Tempe ratu re, 1 0 S econd s
V
150
o
-65 ~ 15 0
o
260
o
C
C
C
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
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APL3518E
Thermal Characteristics
S ymbol
Pa ram ete r
Junctio n-to-Amb ient Resistance in Fr ee A ir
Typica l Value
Unit
(N ote 2)
θ JA
MSOP-8
SOT-2 3-5
o
16 0
23 5
C/W
Note 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions (Note 3)
Pa ra mete r
Sym bol
VIN
V IN In put Vol tag e
I OUT
O UT Output Curren t
Range
Unit
2.7 ~ 5.5
V
0~2
A
TA
A mbient Temp erature
-40 ~ 85
o
TJ
Jun ction Temper ature
-4 0 ~ 125
o
C
C
Note 3 : Refer to the typical application circuit
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
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APL3518E
Electrical Characteristics
Unless otherwise specified, these specifications apply over VIN=5V, VEN =5V and TA= -40 ~ 85 oC. Typical values are at TA=25oC.
Sym bol
Param ete r
APL351 8E
Te st Conditions
Unit
Min.
Typ.
Max .
No lo ad, V EN=0 V
-
-
1
SUPPLY CURRENT
VIN Suppl y Curren t
µA
No lo ad, V EN=5 V
-
60
100
µA
Lea ka ge Curren t
VOUT=GND, VEN=0V
-
-
1
µA
Reverse Leaka ge Current
VIN=GND, VOUT =5 V, V EN =0V
-
-
1
µA
-
55
65
mΩ
1.7
-
2 .6 5
V
-
0.2
-
V
3.1
3.4
3.8
A
POWER SWITCH
R DS(ON)
Po wer S witch On Resistan ce
o
T A= 2 5 C
UNDE R-VOLTAGE LOCKOUT (UVLO)
VIN UVL O Thr eshold Voltage
o
V IN risin g, T A= -40 ~ 85 C
VIN UVL O Hysteresis
CURRENT- LIMIT AND SHORT-CIRCUIT PROTECTIONS
ILIM
I SHORT
Curren t Limit Th reshold
VIN=2 .7V to 5.5V, T A= - 40 ~ 85 oC
Sho rt- Ci rcu it Ou tpu t Curre nt
V IN =2.7V to 5.5V
-
1.5
-
A
IOCB=5mA
-
0.2
0.4
V
OCB Le akage Curren t
VOCB=5V
-
-
1
µA
OCB Deglitch Time
OCB asse rtio n, T A= -40 ~ 8 5 C
5
12
20
ms
OCB OUTPUT PIN
OCB Outpu t Lo w Voltage
t D(OC B)
o
EN INPUT PIN
VIH
In put Logic HIG H
VIN=2 .7V to 5V
2
-
-
V
VIL
In put Logic LOW
VIN=2 .7V to 5V
-
-
0.8
V
-
-
1
µA
In put Cu rrent
-
40
-
Ω
t D(ON )
Tu rn On Delay Time
-
30
-
µs
t D(OFF)
Tu rn Off De lay Time
-
30
-
µs
No lo ad, C OUT =1µF, VIN=5V
-
4 00
-
µs
TJ rising
-
1 40
-
°C
-
20
-
°C
VOUT Dischar ge Resistance
tSS
Soft-Start Time
VEN=0V , or VEN B=5V, VOUT =1V
OVER-TEMPERATURE PROTECTION (OTP)
T OTP
Over-Temp erature Thresho ld
Over-Temp erature Hystere sis
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
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APL3518E
Typical Operating Characteristics
Switch On Resistance vs. Input
Voltage
Switch On Resistance vs. Ambient
Temperature
120
Switch On Resistance , RDS(on) (mΩ)
Switch On Resistance , RDS(on) (mΩ)
120
110
100
90
80
70
60
50
40
VIN =5V, IOUT =1A
30
-50
0
50
100
IOUT =1A, TA=25oC
110
100
90
80
70
60
50
40
30
150
2.5
3.0
Ambient Temperature (℃)
5.5
55
Supply Current, ICC (µA)
Supply Current, ICC (µA)
5.0
60
60
40
20
VIN =5V, RLOAD = Open,
CIN =COUT =33µF/Electrolytic
-50
0
50
50
45
40
35
30
25
100
20
150
RLOAD = Open,
CIN =COUT =33µF/Electrolytic, TA=25oC
2.5
3.0
Junction Temperature (oC)
4.0
4.5
5.0
5.5
Input Voltage (V)
4.3
Current Limit Threshold, ILIM (A)
4.0
3.5
3.0
2.5
2.0
1.5
VIN =5V
1.0
-50
3.5
Current Limit Threshold vs.
Input Voltage
Current Limit Threshold vs.
Junction Temperature
Current Limit Threshold, ILIM (A)
4.5
Supply Current vs. Input Voltage
80
0
4.0
Input Voltage (V)
Supply Current vs.
Junction Temperature
100
3.5
4.1
3.9
3.7
3.5
3.3
3.1
2.9
2.7
TA =25℃
2.5
0
50
100
2.5
150
Junction Temperature C)
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
(o
5
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APL3518E
Typical Operating Characteristics (Cont.)
Current-Limit Response vs. Output
Peak Current
Short-Circuit Output Current vs.
Input Voltage
VIN = 5V, TA=25oC
450
Current-Limit Response ( s)
Short-Circuit Output Current, ISHORT (A)
500
400
350
300
250
200
150
100
50
0
0
1
2
3
4
5
6
7
8
9
10
2.3
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
VIN = 5V,RLOAD =0.5 , TA=25oC
0.5
2.5
3.0
3.5
Output Peak Current (A)
EN pin Threshold Voltage, VEN (V)
EN pin Threshold Voltage, VEN (V)
Junction Temperature
2.5
2.0
EN Rising
1.5
EN Falling
1.0
0.5
RLOAD =50Ω,
CIN = COUT =33µF/Elctrolytic
-50
0
50
100
150
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
EN Falling
VIN =5V, RLOAD =50Ω,
CIN = COUT =33µF/Elctrolytic, TA=25oC
2.5
3.0
3.5
4.5
5.0
5.5
OCB Deglitch Time vs.
Junction Temperature
Junction Temperature
18
VIN =5V, Shutdown mode, RLOAD =0Ω,
CIN = COUT =33µF/Elctrolytic
OCB Deglitch Time , TD(OCB) (ms)
Turn-Off Leakage Current, ILEAK (µA)
4.0
Input Voltage (V)
Turn-Off Leakage Current vs.
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-50
5.5
EN Rising
Junction Temperature ( C)
3.5
5.0
EN pin Threshold Voltage vs.
Input Voltage
o
4.0
4.5
Input Voltage (V)
EN pin Threshold Voltage vs.
3.0
4.0
17
16
15
14
13
12
11
10
RLOAD =1Ω,
CIN = COUT =33µF/Elctrolytic
9
0
50
100
150
-50
Junction Temperature (oC)
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
0
50
100
150
o
Junction Temperature ( C)
6
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APL3518E
Typical Operating Characteristics (Cont.)
OCB Deglitch Time vs.
UVLO Threshold Voltage, VUVLO (V)
Input Voltage
18
OCB Deglitch Time , TD(OCB) (ms)
UVLO Threshold Voltage vs.
Junction Temperature
17
16
15
14
13
12
11
RLOAD =1Ω,
CIN = COUT =33µF/Elctrolytic
10
9
2.5
3.0
3.5
4.0
4.5
5.0
3.2
2.8
UVLO Rising
2.4
1.6
ILOAD =15mA,
CIN = COUT =33µF/Elctrolytic
1.2
0.8
5.5
UVLO Falling
2.0
-50
0
Turn-On Rising Time, tR (µs)
Turn-Off Falling Time, tF (µs)
100
50
0
50
100
Junction Temperature
700
VIN = 5V, RLOAD =30Ω,
CIN = 33µF/Elctrolytic, COUT =1µF/X7R
-50
500
400
300
200
100
0
150
VIN = 5V, RLOAD =30Ω,
CIN = 33µF/Elctrolytic, COUT =1µF/X7R
600
-50
0
Junction Temperature ( C)
6
VIN = 5V, RLOAD = Open,
CIN = COUT =33µF/Elctrolytic
Output Voltage, VOUT (V)
Switch Off Supply Current, ICC(off)(µA)
150
100
Output Voltage vs. Output
Current
Switch Off Supply Current vs.
Junction Temperature
3.5
3.0
2.5
2.0
1.5
1.0
5
4
3
VIN = 5V, TA=25oC
2
1
0.5
0.0
50
Junction Temperature ( oC)
o
4.0
( oC)
Turn-On Rising Time vs.
150
0
150
100
Junction Temperature
Input Voltage (V)
Turn-Off Falling Time vs.
Junction Temperature
200
50
0
-50
0
50
100
150
0
Junction Temperature ( oC)
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
0.5
1
1.5
2
2.5
3
3.5
Output Current (A)
7
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APL3518E
Operating Waveforms
The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Turn On Response
Turn Off Response
VE NB
1
1
V E NB
V OUT
VOUT
2
2
VIN =5V, RLOAD =30Ω, CIN =33µF/Electrolytic,
COUT =1µF/Electrolytic
VIN =5V, RLOAD =30Ω, CIN =33µF/Electrolytic,
COUT =1µF/Electrolytic
CH1: VENB, 5V/Div, DC
CH2: VOUT, 2V/Div, DC
TIME: 200µs/Div
CH1: VENB, 5V/Div, DC
CH2: VOUT, 2V/Div, DC
TIME: 100µs/Div
UVLO at Rising
UVLO at Falling
VIN
V OUT
VIN
1
1
VOUT
2
2
VIN =5V, RLOAD =30Ω, CIN =33µF/Electrolytic,
COUT =1µF/Electrolytic
VIN =5V, RLOAD =30Ω, CIN =33µF/Electrolytic,
COUT =1µF/Electrolytic
CH1: VIN, 1V/Div, DC
CH2: VOUT, 1V/Div, DC
TIME:2ms/Div
CH1: VIN, 1V/Div, DC
CH2: VOUT, 1V/Div, DC
TIME:5ms/Div
Copyright  ANPEC Electronics Corp.
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APL3518E
Operating Waveforms (Cont.)
The test condition is VIN=5V, TA= 25oC unless otherwise specified.
OCB Response during Short Circuit
OCB Response with Ramped Load
VOCB
1
VE N
VOUT
1
VOCB
2
2
IOUT
3
I OUT
3
APL3518E, VIN =5V, OUT short to GND,
CIN =COUT=33µF/Electrolytic
CH1: VEN, 5V/Div, DC
CH2: VOCB, 5V/Div, DC
CH3: IOUT, 4A/Div, DC
TIME: 5ms/Div
APL3518E, VIN =5V, CIN =COUT=33µF/Electrolytic
CH1: VOCB, 5V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: IOUT, 4A/Div, DC
TIME: 5ms/Div
Short Circuit Response
Load Transient Response
VOUT
VIN
VOUT
1
2
1
I OUT
3
IOUT
2
APL3518E, VIN =5V, RLOAD =1kΩ to 2.2Ω,
CIN =COUT=33µF/Electrolytic
CH1: VOUT, 1V/Div, DC
CH2: IOUT, 1A/Div, DC
TIME: 1ms/Div
APL3518E, VIN =5V, OUT Short to GND,
CIN =33µF/Electrolytic, No COUT
CH1: VIN, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: IOUT, 5A/Div, DC
TIME: 50µs/Div
Copyright  ANPEC Electronics Corp.
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APL3518E
Pin Description
PIN
NO.
FUNCTION
NAME
MSO P-8
SO T-23-5
1
2
GND
Grou nd.
5
V IN
Power Su pply In put. Conn ect this pin to exte rnal DC supp ly.
4
4
EN
Ena ble Inp ut. Pulling this pin to high wil l ena ble the device and pulling this pin to
low wil l d isable device. The E N pin cann ot be l eft floa tin g.
5
3
OCB
Fault Ind icatio n Pin. Th is pin g oes lo w when a curr ent lim it or an o ver- temp erature
condition is detected after a 12ms deglitch time .
1
VO UT
Outpu t Vo lta ge Pin . The o utput voltag e follows the input voltage. When E NB is
high o r EN is low, the output vol tag e is dischar ged by an internal resistor.
2
3
6
7
8
Block Diagram
VIN
VOUT
UVLO
Charge
Pump
Short-Circuit
Protection
Current
Limit
Gate Driver and
Control Logic
OCB
EN
GND
OTP
Copyright  ANPEC Electronics Corp.
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APL3518E
Typical Application Circuit
3.3V
USB Port
5V
CIN
50kΩ
VIN
1µF
USB
Controller
VOUT
APL3518E
CBYP
COUT
0.1µF
150µF
VBUS
D+
D-
OCB
GND
EN
GND
Copyright  ANPEC Electronics Corp.
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APL3518E
Function Description
VIN Under-Voltage Lockout (UVLO)
Over-Temperature Protection
The APL3518E series of power switches have a built-in
When the junction temperature exceeds 140oC, the inter-
under-voltage lockout circuit to keep the output shutting
off until internal circuitry is operating properly. The UVLO
nal thermal sense circuit turns off the power FET and
allows the device to cool down. When the device’s junc-
circuit has hysteresis and a de-glitch feature so that it will
typically ignore undershoot transients on the input. When
tion temperature cools by 20 oC, the internal thermal
sense circuit will enable the device, resulting in a pulsed
input voltage exceeds the UVLO threshold, the output
output during continuous thermal protection. Thermal
protection is designed to protect the IC in the event of
voltage starts a soft-start to reduce the inrush current.
over temperature conditions. For normal operation, the
junction temperature cannot exceed TJ=+125oC.
Power Switch
The power switch is an N-channel MOSFET with a low
RDS(ON). The internal power MOSFET does not have the
body diode. When IC is off, the MOSFET prevents a current flowing from the VOUT back to VIN and VIN to VOUT.
Current-Limit Protection
The APL3518E series of power switches provide the current-limit protection function. During current-limit, the devices limit output current at current limit threshold. For
reliable operation, the device should not be operated in
current-limit for extended period.
Short-Circuit Protection
When the output voltage drops below 1.5V, which is
caused by an over-load or a short-circuit, the devices limit
the output current down to a safe level. The short-circuit
current limit is used to reduce the power dissipation during short-circuit conditions. If the junction temperature
reaches over-temperature threshold, the device will enter the thermal shutdown.
OCB Output
The APL3158/9 series of power switches provide an
open-drain output to indicate that a fault has occurred.
When any of current-limit or over-temperature protection
occurs for a deglitch time of tD(OCB), the OCB goes low.
Since the OCB pin is an open-drain output, connecting a
resistor to a pull high voltage is necessary.
Enable/Disable
Pull the EN below 0.8V will disable the device, and pull
EN above 2V will enable the device. When the IC is
disabled, the supply current is reduced to less than 1µA.
The enable input is compatible with both TTL and CMOS
logic levels. The EN/ENB pin cannot be left floating.
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APL3518E
Application Information
Input Capacitor
Layout Consideration
A 1µF or higher ceramic bypass capacitor from VIN to GND,
located near the APL3518E, is strongly recommended to
The PCB layout should be carefully performed to maximize thermal dissipation and to minimize voltage drop,
suppress the ringing during short circuit fault event.
When the load current trips the SCP threshold in an over
droop and EMI. The following guidelines must be
considered:
load condition such as a short circuit, hot plug-in or heavy
load transient the IC immediately turns off the internal
1. Please place the input capacitors near the VIN pin as
close as possible.
power switch that will cause VIN ringing due to the inductance between power source and VIN. Without the by-
2. Output decoupling capacitors for load must be placed
near the load as close as possible for decoupling high-
pass capacitor, the output short may cause sufficient ringing on the input to damage internal control circuitry.
frequency ripples.
3. Locate APL3518E and output capacitors near the load
Input capacitor is especially important to prevent VIN from
ringing too high in some applications where the induc-
to reduce parasitic resistance and inductance for excellent load transient performance.
tance between power source to VIN is large (ex, an extra
bead is added between power source line to VIN for EMI
4. The negative pins of the input and output capacitors
and the GND pin must be connected to the ground plane
reduction), additional input capacitance may be needed
on the input to reduce voltage overshoot from exceeding
of the load.
5. Keep VIN and VOUT traces as wide and short as possible.
the absolute maximum voltage of the device during over
load conditions.
Output Capacitor
A low-ESR 150µF aluminum electrolytic or tantalum between VOUT and GND is strongly recommended to reduce
the voltage drop during hot-attachment of downstream
peripheral. (Per USB 2.0, output ports must have a minimum 120µF of low-ESR bulk capacitance per hub).
Higher-value output capacitor is better when the output
load is heavy. Additionally, bypassing the output with a
0.1µF ceramic capacitor improves the immunity of the device to short-circuit transients.
Copyright  ANPEC Electronics Corp.
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APL3518E
Package Information
MSOP-8
D
b
0.25
A
A1
A2
c
L
GAUGE PLANE
SEATING PLANE
0
e
E
E1
SEE VIEW A
VIEW A
S
Y
M
B
O
L
MSOP-8
MILLIMETERS
MIN.
INCHES
MIN.
MAX.
MAX.
0.043
A
1.10
A1
0.00
0.15
0.000
0.006
A2
0.75
0.95
0.030
0.037
0.015
b
0.22
0.38
0.009
c
0.08
0.23
0.003
0.009
D
2.90
3.10
0.114
0.122
E
4.70
5.10
0.185
0.201
E1
2.90
3.10
0.114
0.122
e
0.65 BSC
0.026 BSC
L
0.40
0.80
0.016
0.031
0
0°
8°
0°
8°
Note: 1. Follow JEDEC MO-187 AA.
2. Dimension “D”does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil
per side.
3. Dimension “E1”does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 5 mil per side.
Copyright  ANPEC Electronics Corp.
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APL3518E
Package Information
SOT-23-5
D
e
E
E1
SEE
VIEW A
b
c
0.25
A
GAUGE PLANE
SEATING PLANE
A1
A2
e1
NX
aaa C
0
L
VIEW A
S
Y
M
B
O
L
SOT-23-5
MILLIMETERS
MIN.
INCHES
MAX.
A
MIN.
MAX.
1.45
0.057
0.00
0.15
0.000
0.006
A2
0.90
1.30
0.035
0.051
b
0.30
0.50
0.012
0.020
c
0.08
0.22
0.003
0.009
0.122
A1
D
2.70
3.10
0.106
E
2.60
3.00
0.102
0.118
E1
1.40
1.80
0.055
0.071
e
0.95 BSC
e1
L
0.037 BSC
1.90 BSC
0.075 BSC
0.30
0.60
0.012
0.024
0°
8°
0°
8°
0
aaa
0.10
0.004
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
15
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APL3518E
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
SOP-8
Application
MSOP-8
Application
SOT-23-5
A
H
T1
C
d
D
330.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
6.40±0.20
5.20±0.20
2.10±0.20
T1
C
d
D
W
E1
F
1.5 MIN.
20.2 MIN.
4.0±0.10
8.0±0.10
A
H
330.0±2.00
50 MIN.
P0
P1
12.4+2.00 13.0+0.50
-0.00
-0.20
W
E1
12.0±0.30 1.75±0.10
12.0±0.30 1.75±0.10
F
5.5±0.05
5.5±0.05
P2
D0
D1
T
A0
B0
K0
2.00±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
5.30±0.20
3.30±0.20
1.40±0.20
4.00±0.10
8.00±0.10
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
4.0±0.10
4.0±0.10
(mm)
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
16
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APL3518E
Devices Per Unit
Package Type
Unit
Quantity
SOP-8
Tape & Reel
2500
MSOP-8
Tape & Reel
3000
SOT-23-5
Tape & Reel
3000
Taping Direction Information
SOP-8
USER DIRECTION OF FEED
MSOP-8
USER DIRECTION OF FEED
SOT-23-5
USER DIRECTION OF FEED
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
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APL3518E
Classification Profile
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3 °C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
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APL3518E
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.2 - May., 2016
19
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