Abstract —Active control and monitoring of the distribution system is a crucial part to successfully integrating variable generation in the distribution grid. This may require a large deployment of Phasor
Measurement Units (PMU’s) on the distribution system, which can be prohibitively expensive due to installation cost. Additionally, devices at medium to high voltage possess a significant risk to system reliability due to line to ground paths in the device. Alternatives to the traditional voltage measurement transformers are non-contact electric field measurements and capacitively coupled electrostatic devices. However these devices are unable to reach the metering quality required due to changes in conductor and ground geometry.
Here we present a class of Actively Calibrated Capacitively Coupled
Electrostatic Devices as a viable non-contact instrumentation option for deploying large numbers of Phasor Measurement Units onto the medium voltage distribution system. We develop the instrument physics and evaluate the performance in a laboratory setting.
I. I NTRODUCTION
Modern smart grid infrastructure envisions extensive deployment of renewable generation, PHEV and controllable loads.
Since much of these changes occur on the distribution side of the overall power system, there is a need of increased monitoring and control in the distribution system. With the growing deployment of Phasor Measurement Units (PMU’s) in the substation level, there is increasing research interest in distribution level PMU
development [7], [6].
PMU’s in the distribution system feeder consist of voltage and current transducers giving a timestamped measurement of the respective waveforms. Therefore, the full phasor (magnitude and
phase) of each waveform can be extracted [2]. Measurements can
be taken at the substation as well as the line level (substation level being much more common). There are a handful technologies used in voltage instrumentation in either substation and line level:
At the substation level, Instrumentation Voltage Transformers
(IVT) and Capacitively Coupled Voltage Transformers (CCVT) are used. These are traditional devices with little research work done in their development. Here we focus on Capacitively Coupled Electrostatic Devices (CCED) which connect directly to the high voltage line without connection to ground.
A. Capacitively Coupled Electrostatic Devices
CCEDs lead to more compact, inexpensive PMUs with no need of bulky insulation even at very high voltages. There has been little academic publication related to capacitively coupled voltage transducers for high voltage measuring. Two previously
published patents; [5], [1] have introduced ’body capacitive
voltage measurement’ along same lines as those published in this work.
In [5] the authors state the use of a calibrated capacitor divider
circuit for determining the voltage on the line. The device under patent is a doughnut shaped capacitive plate with a similar charge
amplifier circuit discussed in III-A. The method of calibration
is not mentioned, so the most likely method of calibration is evaluation of C probe in a free space environment. Since the device is designed for High Voltage transmission lines ( > 300 KV) the spacing between conductors is large enough to assume that an open loop calibration is satisfactory.
In [1] the authors introduce a ’body capacitive’ probe com-
prising of a fixed size sphere which hangs on the power line.
They present the sensing circuitry to measure the accumulated
charge on the device as well. Like [5] the calibration of the probe
capacitance is done offline.
Recent work at around the time this work was completed show very similar reasoning in developing a capacitively coupled
device. In [8], [3] the authors develop a similar understanding of the capacitive coupling. In [8] multiple conductors are used
to mitigate the effect of nearby conductors. The results show a nominal voltage magnitude error of %3
. In [3] an algorithm is
proposed to mitigate the nearby conductors and determine the height of the device from ground.
We consider the work by [5], [1] to fall into the category of
passive offline CCED. A passive signal is received and from it a
voltage magnitude is estimated. In contrast the work [8], [3] tracks
specific changes such as the height of the device or proximity to conductors by processing multiple passive sources (multiple capacitive plates). This is a passive online calibrated CCED. Our work proposes the use of active voltage injection leading to an actively calibrated CCED. We show that this leads to increased accuracy.
II. P HYSICAL M ODEL O
S
F B ODY
ENSOR
C APACITIVE V OLTAGE
We illustrate various properties of a body capacitive probe through the first principles of the devices physical operation. First we discuss the charge accumulation of an ideal sphere held at the high voltage, leading to the standard capacitor definition. Then we introduce a charging power line to show the effective capacitance of the system.
R. Sevlian is with the Department of Electrical Engineering and the Stanford
Sustainable Systems Lab, CA, 94305. Email: rsevlian@stanford.edu.
J. Lizerazo is with Verivolt LLC Email:
R. Rajagopal is with the Stanford Sustainable Systems Lab, Department of Civil and Environmental Engineering, Stanford University, CA, 94305. R. Rajagopal is supported by the Powell Foundation Fellowship. Email: ramr@stanford.edu.
A. Ideal Body Capacitive Probe Model
We introduce an ideal body capacitive probe in Figure 1(a)
The probe is an idealized sphere of radius r probe
. Although it is extremely impractical for a final device to be a round sphere, this model is used since it’s capacitance is simple to compute.
Connected to the sphere is an ideal charge sensor which measures the charge that accumulates on the surface of the sphere. We
1

2 r probe   Capaci8ve  Probe
Charge  Sensor   r probe   r s
Therefore the corrected probe charge given the attached conductor at V
L
C
I
V 0
L
( t ) and nearby conductor V 0
L
( t ) is Q ( t ) = C
E
V
L
( t ) −
( t ) . In this work we do not deal with interference mitigation or cancellation but merely state it for completeness of the physical model.
AC  High  Voltage   Transmission  Line
III. S
ENSING
M
ETHODOLOGY
A. Circuit Model of Body Capacitive Sensor
(a) (b)
Fig. 1.
1(a) Ideal CCED consisting of a body capacitive probe connected to an ideal charge sensor connected to AC voltage source. 1(b) Ideal CCED with
proximity to nearby conductor.
Interference
Effec%ve  Body
Capacitance
CCED  w/  Ac%ve  Calibra%on
+
-­‐ assume that the voltage source and the sensor take infinitely small volume compared to the conducting sphere, therefore producing no electric field of its own. Furthermore, there is no voltage drop between the ideal charge sensor and the conducting sphere.
Assume at time t ≤ t
0 the device previously being uncharged is now connected to the voltage source. At t > t
0 the device is connected to the high voltage source. Computing the accumulated charge on the sphere necessary to maintaining a voltage of V
L leads to V
L
=
4 π
0
Q r probe
. Which is the basic interpretation of body capacitive probe, where C p
= 4 π
0 r probe with the relation
Q = C p
V
L
. If we know with certainty the value of C p
, for example by building a probe with a spherical shape of known radius placed in free space, then measuring the waveform of Q ( t ) gives us the waveform for V
L
( t ) .
Interference
Signal
Amplifier
DAC
AC  Signal
ADC
(a)
Fig. 2.
Equivalent circuit diagram representing basic voltage measurement. The body capacitor is shown as a shunt capacitance C
E source is capacitively coupled with value C
I to ground. The interference
. The charge sensing device is built by a feedback amplifier with impedance C
S
.
B. Ideal Probe with Power Line
The proximity of the capacitive probe to the charging power line, or any other charged conductor will decrease the effective
capacitance of the sphere. Consider Figure 1(b). Again we have
the same instrument as before, but now attached between the device and the ideal voltage source is a power line. The center of the conducting sphere is at a distance of r s the power line.
from the center of
At t ≤ t
0 the cable is charged at V
L the probe. Given that the line is at V
L but disconnected from there is a non-zero electric potential at various points in the system, V ( r, φ, z ) .
From the infinite length power line assumption, we assume a rotational symmetry as well as uniformity along the cable and only consider V ( r ) . Therefore at the moment t > t
0
, in order to bring the device to line voltage V
L
, only Q = C p
( V
L
− V ( r s
)) amount of electrons need to accumulate on the probe surface. The voltage at surface of the sphere due to the accumulated charge is
V
L
− V ( r s
) while the contribution from the power line is V ( r s
) leading to both the power line and the device being charged to
V
L
. We can define an effective capacitance C
E
, Q/V
L which holds regardless of power line proximity.
Since Q = C p
( V
L
− V ( r s
)) , we have:
C
E
= C p
(1 − α ( r )) (1)
Where α ( r s
) = V ( r s
) /V
L which is invariant to the actual voltage level, and is computed from the system geometry.
The circuit equivalent of the body capacitive probe with both
proximity effect and interference is shown in Figure 2(a). The
ideal charge sensor used in Section II which measures the charge
induced can be implemented in practice by an op-amp with a capacitor in feedback. To see why this is true, recall the transfer function of a non-inverting operation amplifier with feedback amplifier Z
F and input impedance Z
IN is
V out
( jω )
V in
( jω )
Z
F
= 1 +
Z
IN
= 1 +
C
E
C
S
.
(2)
(3)
Here we assume that the feedback capacitor is ideal. In practice a low M Ω resistor is put in parallel with the capacitor to maintaining the leakage current of the system.
Since the device is sitting at high voltage, V in
( t ) = V
L
( t ) . So the differential voltage measured at the input of the analog input is v ( t ) =
C
E
C
S
V
L
( t ) .
The addition of an interference source can be done via superposition principle. Shorting the AC voltage source and the body capacitor, leads to a negative feedback amplifier setup leading to the final form:
V ( t ) =
C
E
V
L
( t ) −
C
S
C
I
C
S
V
I
( t ) .
(4)
Since we conduct all experiments in an enclosed environment, we can neglect the C
I for now. In future work, we model the problem of interference in CCEDs and present solutions for mitigation/cancelation.
C. Coupling Interference Source
Adding interference sources, such as nearby conductors to the system adding additional sources of charge on the body capacitor.
B. Active Calibration
We propose that one or multiple out of band pilot signals near
60 Hz be inserted between the line voltage and the charge sensing

3 stage. This can be performed with a general DSP platform, as in
Figure 2(a). In this situation, we have the device at
V
L
( t ) , an
ADC outputting the pilot signal V
P op-amp input is: V + ( t ) = V
L
( t ) +
( t
V
)
P
, so the voltage level of the
( t ) .
From (4), omitting the interfering power lines, we have that the
input of a differential measurement is
C
E ( V
L
( t ) + V
P
( t )) . Using
C
S the DSP platform the pilot signal can be detected and an accurate estimate of the effective capacitance C
E given. This eliminates the need of performing offline calibration for ’typical arrangements’ of capacitive probes on transmission and distribution systems.
Active calibration may be possible even in transmission system application. Consider a 300 KV high voltage line, and an injected pilot signal of 10 V. Given the typical body capacitance of C
E
=
20 pF , if we want the input scaled to ± 5 V, then the feedback capacitor must be 600 nF. Also, in this situation, the amplitude of the pilot in the ADC is 167 µV . This may be lower than the noise floor, but since the geometry in high voltage lines changes so infrequently averaging periods can be rather large. In comparison, for a distribution line with nominal voltage of 10 kV, the minimum pilot voltage is 5 mV which will be close to but higher than the noise floor.
IV. E XPERIMENTAL E VALUATION P HYSICAL M ODEL OF
B ODY C APACITIVE V OLTAGE S ENSOR
A. Low Voltage Test Environment
The test environment we use is a metallic mesh cage connected to ground. Since low voltage tests are performed, they are susceptible to 60 Hz interference at 120/240 V which is an order of magnitude larger than the line voltage. Therefore the cage is useful in making an interference free environment.
Consider prototyping a system with V
L
= 10 V. Unfortunately, all nearby interference sources are scattered randomly in a real laboratory environment with V 0
L
= 120 V.
B. Verifying Probe Capacitance in Low Voltage Testing
Shielded  Cable   Bare  Cable   Grounded  Cage
3
4
1
2
TABLE I
I DEAL P LATE C APACITANCE E VALUATION . S IMULATION (S) AND
E XPERIMENTAL (E) VALUES ARE IN CLOSE AGREEMENT .
Plate
5
# Dim. [in x in] C
P
[pF] (S) C
P
[pF] (E)
12x12
8x8
4x4
2x2
1x1
15.00
10.34
4.78
2.3
1.2
14.99
10.27
4.88
1.84
0.38
0.14
0.12
0.1
0.08
0.06
0.04
0.02
P
1
P
2
P
3
P
4
P
5
0.9
0.85
0.8
0.75
0.7
0.65
0.6
0.55
0.5
0.45
1
Simulation
Experiment
0
0 2 4 6
V
R M S
I N
8 10 12 14
1.5
2 2.5
Probe Location
3 3.5
4
(a) (b)
Fig. 4.
4(a) Input/Output voltage relationship of body capacitive probe. Results from plate test verifying the theoretical linear relationship from Eq. (4) . 4(b)
Simulation and experimental values of α ( r ) at various distances from the charged power line. Results show the values are close leading to acceptance of the model.
source with no proximity effect reducing the effective capacitance we perform the following.
1) Place the voltage source (NI Hardware) and charge sensing device (metallic box) outside the grounded cage.
2) Connect the plate to a shielded cable which becomes unshielded at the entrance of the cage
3) Compute the total capacitance of the cable and plate body capacitance. This is done by measuring the rms input/output
voltage (Figure 4(a)). This leads to an experimental value
of C
P
.
4) Repeat step 3 with the cable alone. The difference in capacitances being that of the plate alone.
Table I shows that for larger plates, the simulated value
matches very closely to the electrostatic simulation. However the simulation and experiment diverge for smaller plates. Regardless, the experiments validate the basic premise of the body capacitor
model. Figure 4(a) validates the model in Eq. (4), since there is
a linear relation between V
L and V
CAP for each plate.
Instrumenta*on  /
AC  Source
Capaci*ve  Plate
(a)
Fig. 3.
3(a) Experiment setup for evaluating the voltage input/output relation
and body capacitance C
P of an ideal rectangular plate in fixed environment.
Here we demonstrate the basic body capacitive effect. First given a set of sheet metal plates of various sizes, we compute the theoretical capacitance of the probe with no charged device in proximity of the of the charged plate. This is done in COM-
SOL Multiphysics simulation environment using the electrostatic simulation package.
The test arrangement of this is shown in Figure 3(a). To
experimentally evaluate the charged plate with an ideal voltage
C. Effective Capacitance
We show a method of verifying the proposed model for the effect of power line proximity to the body capacitance of a probe.
Figure 5(a) shows a test setup inside the grounded cage. Like the
test in Section the instrumentation is placed outside of the cage to prevent any unintentional charge to act on the probe. However, there is an external field from the copper power line in the experiment. The probes are copper wires set on at fixed distances from the power line. This is done to minimize measurement error in evaluating various distances.
A similar procedure is conducted as in Section IV-B where the
capacitance of the cable and the probe is computed first. Then the capacitance of the cable alone. The difference of the two being the experimental effective capacitance under a charged ( C
E
) and uncharged ( C
P
) power line. An experimental value of α ( r ) =

4
Grounding  Cage   Charged  Power  line   AC  Source   Cylindrical  Probe   r
1   r
4
Instrumenta&on  /
AC  Source
Capaci&ve  "Plates"
(a)
Ba3ery   NI  sbRIO   Analog  Circuitry
(a)
Fig. 6. Experimental setup for testing active calibration procedure. Setup includes battery powered NI sbRIO board for pilot injection and sampling V
CAP
( t ) waveform. Entire setup enclosed in grounded cage to shield external interference sources.
(b)
Fig. 5.
5(a) Experiment setup for evaluating the proximity effect on the probe
capacitance. Setup similar to the plate test, except with wire probe and a charged conducted (at V
L
) to simulate a power line the device will be connected to. 5(b)
Iso-surface of voltage level computed in COMSOL for specific geometry.
1 − C
E
C
P is computed, where distance. A theoretical α ( r k
)
C
E and C
P are computed at each can be computed easily without computing the individual C
E or C
P since α ( r ) =
V ( r )
V
L
. Given the simulation tool, we can evaluate V ( r ) from the geometry as
shown in Figure 5(b). For simplicity we evaluate the CFD solution
for the point voltage along the same position of the cable probe.
An average of the solution vector is then V ( r ) .
Figure 4(b) shows the results of measuring the quantity
α ( r ) at the various locations of capacitive probe. The results show considerable agreement between the two models thus leading us to accept the model. The proximity effect is important to consider in the design of a final body capacitive probe. Notice that in location
4 which is only 4.3 cm from the line, α ( r ) is 0.8. Therefore any probe that is closer to the power line will have an effective capacitance that is much smaller than in the uncharged case. So there is a minimum separation we need between the probe and the power line so as to have a value of C
E that works in practice.
and V + ( t ) of the op-amp. The maximum allowable output of the
DAC is 10V which we set as the pilot amplitude.
The ADC rate is set to 55 KHz. The rate could not be set any higher while simultaneously allowing the received data to be logged on the device. This sample rate is more than sufficient for the pilot signal which was placed at 3 KHz.
1) Generating Line Voltage: Two voltage sources were used in the experiment. First, an artificial signal was generated using an NI DAQ. The signal was buffered using a high current mosfet amplifier as well as a 1:3 and 1:5 transformer. The output signal has a maximum amplitude of 650 V. This signal represents an ideal line voltage with low noise outside of 60 Hz and very low harmonic distortion as well as low noise.
The second test signal is a step-up of the wall outlet voltage.
The maximum achievable voltage under this technique is 1.28
kV. This signal has much higher harmonic distortion. However, achieving high accuracy under this condition lends confidence of the pilot mechanism working in an actual distribution feeder where out of band noise is common.
V. A CTIVE
A. Experiment Setup
C ALIBRATION AT H IGH V OTLAGE
Here we show experimental verification for the active cali-
bration mechanism proposed in Section III-B. The setup follows exactly the system proposed in Figure 2(a).
The charge measuring circuit is a low bias current operational amplifier (LTC2054CS5). The maximum input range of the device is ± 6 V. Since the goal of the tests is to measure moderate distribution feeder voltage, we aim for a maximum measurable voltage of 10 kV. Typical body capacitor values range from 5-20 pF. This led to a choice of C s
= 10 nF.
We use a National Instrument sbRIO-9636 board for signal injection and estimation. The ADC for the hardware is set to differential mode. A differential mode is preferred over single ended mode since we care about the difference between V
OU T
( t )
B. Estimating Body Capacitance
Given the known parameters of the injected pilot signal:
V IN J
P
= 10 V and amplitude V CAP
P f p
= 3 kHz. We can estimate the receive which is detected on the voltage difference across capacitor C
S
. The problem is that of estimating the amplitude many orders of magnitude less than the line voltage.
For example if
V CAP
P
= 10 V
C
10 pF
10 nF p
= 10 pF, the received pilot signal will be
= 10 mV. This may be difficult to detect if a single pilot is used under an environment with high interference at the pilot frequency.
The method in [4] is used to extract the pilot amplitude. A
processing output rate of 100 ms is used for amplitude detection.
During every processing period the following is computed
V
P
= max
ω
2
N
X x n exp( − jωnT ) .
n
(5)
For a given period, we assume a independent shot estimate of the capacitance given by:
C
P
=
V CAP
P
V IN J
P
C
S
(6)

5
1) Estimation of V
L
( t ) : For each line voltage, we generate a set percentage of the source maximum: V
L feedback capacitor. The time series is used to estimate the probe capacitance and finally the line voltage.
=
{ 10% , . . . , 90% , 100% } (totaling 10 points). For each experiment, a 4 minute capture is recorded of the voltage across the
16.95
16.9
16.85
16.8
16.75
16.7
16.95
1 2 3 4 5 6 7 8 9 10
Test #
(a)
Pilot Based
V
L
Regression
16.9
16.95
16.9
16.85
16.8
16.75
16.7
16.95
1 2 3 4 5 6 7 8 9 10
Test #
(b)
Pilot Based
V
L
Regression
16.9
1.5
1
0.5
0
−0.5
1.5
1
0.5
0
−0.5
−1 −1
−1.5
−1.5
1 2 3 4 5 6 7 8 9 10
Test #
(a)
1 2 3 4 5 6 7 8 9 10
Test #
(b)
Fig. 8.
8(a) Relative magnitude error for each experiment using source
V
L 1
8(b) Relative magnitude error for each experiment using source
V
L 2
( t ) .
( t ) .
accuracy from prior methods, and is a step to achieving meter quality CCEDs. Additionally, since a full waveform is recorded in the process, phase estimates are also possible which is left as future work.
16.85
16.8
16.75
16.7
0 50 100 150 200 250 300 350
Line Voltage
16.7
0 200 400 600 800 1000 1200
Line Voltage
(c) (d)
Fig. 7.
Estimate of pilot signal amplitude under different test values for V
L 1
( t )
(7(a)) and
V
L 2
( t )
(7(b)). Estimate of probe capacitance from pilot amplitude
estimate for V
L 1
( t )
(7(c)) and
V
L 2
( t )
(7(d)).
Figure 7(a), 7(b) shows the output of the pilot amplitudes.
Notice for V
L 1
( t ) , which is the result of a standard signal generator, the pilot amplitude is invariant to the test voltage V
L 2
.
However, for V
L 2
( t ) this is not the case; increased line voltage leads to increased pilot voltage. This value is extremely minute
( < 100 µ V) but can effect the voltage estimate since the line voltage is many orders of magnitude larger than the pilot.
Figure 7(c), 7(d) shows the estimated probe capacitance during
each test. The figure also sets the estimate of the capacitance derived by regressing V CAP
L on V
L following the same procedure
as in Section IV-C. The second estimate value is a more accurate
indicator since it comes directly from the line voltage and is the proportionality constant that is of interest. For V
L 1 there is no bias, while using V
L 2
, there is a slightly positive bias in the estimate. This is attributed in a slight positive bias in the estimate of V
P
CAP
.
Once the probe capacitance is estimated, arriving at a one shot estimate of the line voltage magnitude is simply:
V
L
=
C
S
C
P
16.85
16.8
16.75
CAP
L
(7)
Given the estimation period of 100 ms, a box plot of the relative error for the combined estimation procedure is shown in Figure
8(a), 8(b). The mean relative error under the clean source is
0 .
15% on average while that of the wall outlet is 0 .
7% . To achieve meter quality the total vector error (magnitude and phase) must in the worst case be 1% . Although, the current paper does no report this milestone, the pilot mechanism introduced greatly increases
VI. C
ONCLUSION
We propose a class of actively calibrated capacitively coupled electrostatic voltage meters for monitoring medium to high voltage. We show that the method of active capacitance tracking which eliminates the problems with previous designs.
This method offers a promising roadmap to having inexpensive ungrounded measurement devices capable of metering quality for relatively high voltage.
We envision this methodology of actively tracking probe capacitance be used in developing line level PMU’s. Since the full waveform is extracted from the ADC end, it is possible to have
GPS enabled device with line of sight to satellites at all times.
Also, with inexpensive wireless technology and self powering electronics (scavenging power from the line) an inexpensive and simple to deploy PMU is possible. In future work, we aim to develop such a prototype. Using a single device on each line, it is possible to remove interference coupling between lines, thereby increasing accuracy as well.
R EFERENCES
[1] C.N. Gunn, S.H. Lightbody, J.B. Forth, M.A. Hancock, and G.T. Hyatt. Body capacitance electric field powered device for high voltage lines, October 16
2007. US Patent 7,282,944.
[2] KE Martin, G Benmouyal, MG Adamiak, M Begovic, RO Burnett Jr, KR Carr,
A Cobb, JA Kusters, SH Horowitz, GR Jensen, et al.
Ieee standard for synchrophasors for power systems.
Power Delivery, IEEE Transactions on ,
13(1):73–77, 1998.
[3] Rohit Moghe, Amrit R Iyer, Frank C Lambert, and Deepak M Divan. A low-cost wireless voltage sensor for monitoring mv/hv utility assets.
Smart
Grid, IEEE Transactions on , 5(4):2002–2009, 2014.
[4] D. Rife and R.R. Boorstyn. Single tone parameter estimation from discretetime observations.
Information Theory, IEEE Transactions on , 20(5):591–598,
Sep 1974.
[5] W.R. Smith-Vaniz and R.L. Sieron. Apparatus for measuring the potential of a transmission conductor, September 4 1991. EP Patent 0,218,221.
[6] Alexandra von Meier, David Culler, Alex McEachern, and Reza Arghandeh.
Micro-synchrophasors for distribution systems.
IEEE Innovative Smart Grid
Technologies (ISGT 2013) , 2013.
[7] M Wache and DC Murray. Application of synchrophasor measurements for distribution networks. In Power and Energy Society General Meeting, 2011
IEEE , pages 1–4. IEEE, 2011.
[8] Yi Yang. Power line sensor networks for enhancing power line reliability and utilization. 2011.