SOLID STATE FUNDAMENTALS – Fourth Edition
Chapter 11 – JFETs, MOSFETs, and IGBTs
1) Field-Effect Transistors
a) The cornerstone of new developments in semiconductor
technology over the last couple of decades
b) Three or four terminal device
i) Gate, drain, and source (equates functionally to the
base, collector, and emitter terminals of the BJT
respectively)
ii) Fourth terminal is usually a ground for metal case
packages
c) Output current is controlled by an input voltage
i) FETs are voltage operated whereas BJTs are considered
to be current operated
d) Two common types include:
i) JFET
(1) Junction Field-Effect Transistor
ii) MOSFET
(1) Metal Oxide Field-Effect Transistor
e) IGBT is the latest development
i) Insulated Gate Bipolar Transistor
ii) Combines the best features of a BJT and a power
MOSFET
f) Provided in many of the same package styles as the BJT
i) Do not assume what the device may be by its package
2) Junction Field-Effect Transistors
a) Two common categories
i) N-channel
ii) P-channel
NOTES:
b) JFET Operation
i) Gate is the control element (equates to the base on a
BJT)
ii) Source and drain equate to the emitter and collector on
a BJT respectively
iii) Output current is dependent upon input voltage applied
to the gate
iv) JFET is a unipolar device
(1) Gate surrounds the channel
(2) With zero gate voltage, channel width is greatest
and maximum current flows between source and
drain (N-channel)
(3) Slightly forward biasing the gate-source junction will
cause an even increased current flow between
source and drain which may result in damage to the
device (seldom done in practice)
(4) Reverse biasing the gate-source junction causes
decreased current flow between source and drain,
eventually ending in cutoff (normal mode of
operation for a common JFET) Typical gate-source
voltage ranges from 1 – 8 volts
(a) Similar to reverse biasing the base-emitter
junction of a BJT
c) JFET characteristic curves
i) See figure 11-3 on page 267
ii) With no voltage applied to the gate and a variable
voltage applied between drain and source, increasing
VDS causes a rapid rise in ID (Ohmic region)
(1) At some point ID is limited by the channel width
(Pinch-off region)
(2) Further increase in VDS will eventually result in
avalanche and device destruction
d) JFET power dissipation
i) Must be operated within manufacturer’s specifications
ii) As with a BJT, a heat sink can be used to increase the
power dissipation rating
iii) Power dissipation must be derated if operated above 25
C°
e) JFET circuit configurations
i) Common-source amplifier (equivalent to the commonemitter BJT amplifier)
(1) Common source amplifier operation
(a) Quiescent point is located midway on the load
line
(b) Input signal is applied between gate and source
(c) Output signal is taken between drain and source
(d) Decreasing the reverse bias between gate and
source causes the drain to move in a negative
direction
(e) While, increasing the reverse bias between gate
and source causes the drain to move in a positive
direction
(f) The only JFET configuration to produce an
inverted output
(g) Extremely high input Z compared to a BJT
(i) Because no gate current flows
ii) Common-gate amplifier (equivalent to the commonbase BJT amplifier)
(1) Common-gate amplifier operation
(a) Input signal is applied between source and gate
(b) Output signal is taken between drain and gate
(c) Low input Z and high output Z
(d) Capable of good voltage gain and medium power
gain
(e) No inversion between input and output
iii) Common-drain amplifier configuration (equivalent to
the common-collector BJT amplifier)
(1) Common-drain amplifier operation
(a) Input signal is applied between gate and source
(b) Output signal is taken between source and
ground
(c) Input Z is high while output Z is low
(d) Voltage gain always less than 1
(e) Current and power gain is high
(f) No inversion between input and output
f) JFET applications
i) Switching
ii) Amplification
(1) DC
(2) Audio
(3) Radio frequency
iii) Preamplifiers
iv) Impedance matching
v) Multimeter input circuits
(1) High input Z means minimal circuit loading
(2) No disruption to circuit operation during
measurements
vi) Voice-operated relays
3) Metal-Oxide Semiconductor Field-Effect Transistors
(MOSFETs)
a) Three or four terminal device
i) Gate, source, drain, and sometimes substrate(4th
terminal)
ii) “Metal” is somewhat of a misnomer
(1) May be a metal oxide or polysilicon material
b) Two categories
i) N-channel
ii) P-channel
c) MOSFET schematic symbols and terminal identification
i) Gate does not touch the channel on the schematic
symbol
ii) Arrow points towards the channel (N-channel)
iii) Arrow points away from the channel (P-channel)
iv) For 3-terminal devices, the substrate is connected to the
source
v) For 4-terminal devices, the substrate is brought out via
the 4th terminal
(1) It is not connected to the source
d) Enhancement MOSFETs
i) No physical connection between the gate and the
channel
ii) No physical conducting channel between source and
drain
iii) Enhancement MOSFET operation
(1) Under reverse bias, gate-source, no current can flow
source to drain
(a) No physical channel is present
(2) Under forward bias, gate-source
(a) A conductive channel forms between source and
drain and current can now flow
e) Depletion-enhancement MOSFETs
i) Construction similar to the enhancement MOSFET
except that it includes a physical channel between the
source and drain
(1) Current can flow between source and drain even
without an input signal to the gate because of this
physical channel
ii) Depletion-enhancement mode operation
(1) Under reverse bias, gate-source
(a) Channel conductivity is reduced and current
decreases between source and drain
(2) Under forward bias, gate-source
(a) Channel conductivity is enhanced and current
increases between source and drain
(3) Input signal at the gate “modulates” current flow
between source and drain
f) Dual-gate MOSFETs
i) A small DC control voltage is applied to one gate
ii) The desired input signal is applied to the other gate
(1) The DC voltage can be used to control the overall
gain of the stage
(a) Often used in AVC/AGC circuit applications in
communications systems
(i) Example: All radio stations seem to have
about the same volume to the listener
regardless of distance from the broadcast
station or the actual signal strength
g) JFET/MOSFET handling precautions
i) Highly susceptible to ESD damage as well as overvoltage
and overcurrent
ii) Do not remove from manufacturer shielding (bag, foil,
conductive foam) until ready for use
iii) If a shorting spring or wire is used in shipping, install the
device and then remove
iv) Follow good ESD protocols
(1) Grounded bench mat
(2) Grounded wrist strap
(3) ESD safe soldering iron/station
(4) Do not handle unnecessarily until device is installed
h) Power MOSFETs
i) Many of the same characteristics of small-signal
MOSFETs
(1) High input Z
(2) Switching and amplification applications
ii) Enhanced power handling characteristics
iii) Faster switching speeds than bipolar junction devices
iv) Very low source-drain resistance
(1) Minimal heat dissipation within the device
i) Power MOSFETs as switches
i) Approach the characteristics of an ideal switch
(1) No moving parts
(2) Near zero ON-state resistance
(3) Near infinite OFF-state resistance
(4) Very fast switching times
(5) Simple drive requirements
(a) No gate current required
4) Insulated gate bipolar transistors (IGBTs)
a) Three terminal device
i) Emitter, collector, and gate
b) Combines the best features of BJT technology with MOSFET
technology
i) Higher power and current switching capability of the BJT
combined with
ii) Simplified drive requirements of the FET
c) IGBT operation
i) Blocking operation
ii) ON-state operation
iii) OFF-state operation
iv) Latch-up operation
(1) Undesirable effect caused by the internal structure
of the IGBT
(2) Refers to the random formation of parasitic NPN and
PNP transistors that may form and create a thyristorlike effect where
(a) The gate no longer controls the IGBT
(b) Damage will result to the device if current is not
shutoff to the device
d) IGBT safe operating area
i) Defined by the manufacturer maximum VCE and IC
ratings for the device
ii) Operation outside of these ratings will damage the
device
e) PT and NPT configurations
i) Punch Through construction
(1) Includes a buffer layer (N+) between the injection
layer (P+) and the drift region (N-)
(a) Improves shut-off speed by reducing minority
carrier injection quantity and by raising the
recombination rate during the switching
transition
(2) Most current IGBTs are PT devices
ii) Non-Punch Through construction
(1) Lacks the buffer layer of the PT device
(2) Otherwise similar characteristics
f) Troubleshooting IGBTs
i) Ohmmeter test
(1) Jumper emitter to collector and measure resistance
between gate and emitter
(a) Good reading will be several Megohms to infinity
(i) Anything less and device is bad
(2) Jumper gate to emitter and measure resistance from
collector (+) and emitter (-)
(a) Good reading will be several Megohms to infinity
(i) Anything less and device is bad
g) IGBT applications
i) Because of fast switching times and good power
handling
(1) Variable frequency drives (VFDs)
(2) Pulse width modulation control (PWM)
5) JFET/MOSFET multistage amplifiers
a) Operation is similar to BJT amplifiers with the advantage of
lower drive requirements
i) Gains are multiplicative not additive
ii) Amplifier coupling
(1) Capacitive coupling
(a) Offers interstage isolation
(2) Transformer coupling
(a) Offers interstage isolation
(3) Direct coupling
(a) No interstage isolation
(b) A fault in one stage can affect multiple stages
iii) Darlington circuits
(1) Two transistors connected so that the emitter of one
drives the base of the other
(2) Output is taken from the emitter of the second
(3) High current gains possible
(4) Lack of coupling capacitors results in good low
frequency response