ELEC/COMP 425
Fall 2010
Computer Systems Architecture
• Instructor
Peter Varman
DH 2022 (Duncan Hall)
pjv@rice.edu
x3990
• Office Hours
Mon 11 -12 noon, Wed. 10-12 noon or
By Appointment
• Web Page
www.clear.rice.edu/comp425
Course Organization
• Text
 Computer Architecture: A Quantitative Approach, (4th edition, 2007), J.
Hennessy and D. Patterson
• Grading




Homework Sets
In-class Quizzes
Project
Test (3 hrs in Evening)
(2 + 2)
(4)
(1)
5% + 20%
25%
25%
25%
Homework: 2 Problem sets + 2 Simulation studies
• Honor Code
– Can discuss homework and project with each other and staff
– Do not refer to old tests, homeworks, or solutions
Goals
Obtain a thorough understanding of the architectural principles
underlying modern computer architecture
• Organization and design of components and subsystems
• Processor, Memory, Storage, Interconnect
• Techniques to achieve high performance
• System principles
• Technology constraints, trends, opportunities
• Power and Thermal Envelope
• Server consolidation and Virtualization
• New technologies: SSDs?
• System Architecture
Basic Computer System Organization
WAN/Internet
MEM
CONTR
Processor
Memory
System
Gateway/
Router
Cache
Hierarchy
NIC
LAN
Bridge
Controller
Disk Controller
( SCSI/SATA/..)
System Memory Bus
I/O Bus
Network
Adaptor
SAN
A
r
r
a
y
Computer System: Simple View
Application Software
Operating System
System ISA
ISA
User ISA
Native Machine (x86, AMD, MIPS, SPARC, Power, T1)
ISA: Instruction Set Architecture
• Interface presented to higher-level software
• Application Software (user mode) sees only a subset of the machine defined by the User ISA
• Operating System (kernel mode) can access and control components not visible to user program using the System ISA
Processor Architecture : ISA Level
• Instruction Set Architecture (ISA)
• Hardware/software interface
• View seen by low-level system programmer or compiler back end
• Programmer-visible registers (R0, .., R31, F0, .., F31, CCR, ….)
• Memory addressing modes (Absolute, Indirect, Base, ….)
• Instructions (operations + addressing modes, instruction encoding)
• Memory Management support
• Interrupt structure
• Examples:
PowerPC, SPARC, 80x86, M680xx, MIPS
Processor Architecture: Realizing an ISA
Microarchitecture : Many innovations
 Implementation of ISA (“Under-the-hood”)
 Different design choices and optimizations
 Pipeline structure (OOO, Multiple Issue, Superscalar, Speculation, ….)
 Cache organizations
 On-chip vs off-chip functionality
 Power and performance tradeoffs (Pentium 4 vs Mobile Pentium 4)
Hardware Design : Convert design to IC
 High Level Design Language (VHDL, Verilog, ..)
 Logic Design
 Circuit Design
 Process Technology and Fabrication
 Packaging