TI Designs
BeagleBone Cape for Programmable Logic Controller
(PLC) Input/Output Module
TI Designs
Design Features
TI Designs provide the foundation that you need
including methodology, testing, and design files to
quickly evaluate and customize the system. TI Designs
help you accelerate your time to market.
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Design Resources
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TIDA-00312
Tool Folder Containing Design Files
TIDA-00236
LMZ14201
TPS70933
TPS70918
Tool Folder Containing Design Files
Product Folder
Product Folder
Product Folder
ASK Our E2E Experts
WEBENCH® Calculator Tools
•
•
•
•
Connects Input and Output (I/O) Daughter Cards to
BeagleBone Board
BeagleBone Board Auto-Detects the I/O Daughter
Card and Loads the Appropriate Software Driver
SPI and I/O Daughter Card Power Terminates on
Terminal Block for Connection to Any Other
Application Specific Integrated Circuit, MCU, or
FPGA
Web Server-Based Graphical User Interface (GUI)
Running on the BeagleBone Board
Application Programming Interfaces (APIs) Allow
Development, Custom Test Functions, and
Applications on BeagleBone Using Web Server
DC Input Supply: 18- to 32-V Power Supply
Featured Applications
•
•
•
PLC, Data Communications System (DCS), and
Programmable Automated Controllers (PAC)
Industrial Process Control and Automation
Test and Measurement
3.3 V
DC-DC
2x23-pin BeagleBone connector
CPLD
2x23-pin BeagleBone connector
I/O daughter card connector
PLC I/O
module
I/O daughter card connector
SPI terminal block
BeagleBone
Black
24 V
An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and other
important disclaimers and information.
All trademarks are the property of their respective owners.
TIDU730A – January 2015 – Revised March 2015
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BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
1
System Description
1
www.ti.com
System Description
The BeagleBone Black (BBB) Cape for the PLC I/O module is a platform for evaluation of the PLC I/O
reference designs. The platform showcases TI’s system solution that can be used in a PLC signal chain
and allows evaluation of the signal chain performance. The Cape connects the PLC I/O reference design
daughter card to the BBB board. The BBB board runs the evaluation software for the I/O card and a web
server, allowing the user to view the performance from a PC.
The highlight of this design is the simple hardware and minimal software installation requirements on the
PC for evaluation. TI’s PLC I/O module reference designs have a complete signal chain for the PLC I/O
modules. Evaluating the signal chain requires examination of the critical performance parameters of the
hardware. Data collection, processing, and display are the typical functions required for evaluation. The
easy-to-use GUI accelerates the performance of the I/O module evaluation process and reduces time to
market.
The design files include the schematics, BOM, layer plots, Altium files, Gerber files, and an easy-to-use
GUI.
2
Design Specifications
The following list highlights the design specifications of the I/O controller:
• The BeagleBone Black Cape
• A smart I/O interface to plug in TI’s PLC I/O module reference design daughter cards
• A DC input supply: 18 V to 32 V
• Light-emitting diodes (LEDs) for the purposes of debugging or indication
2
BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
TIDU730A – January 2015 – Revised March 2015
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Block Diagram
www.ti.com
3
Block Diagram
3.3 V
DC-DC
2x23-pin BeagleBone connector
CPLD
2x23-pin BeagleBone connector
I/O daughter card connector
PLC I/O
module
I/O daughter card connector
SPI terminal block
BeagleBone
Black
24 V
Figure 1. PLC I/O Interface Cape Block Diagram
TIDU730A – January 2015 – Revised March 2015
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BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
3
Theory of Operation
4
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Theory of Operation
The BBB Cape for the PLC I/O module provides a convenient platform to test and evaluate smart I/O
modules targeted for the PLC system. The cape platform allows functional and parametric signal-chain
performance evaluation. The cape consists of a BBB interface, a complex programmable logic device
(CPLD), a power supply unit, and a smart I/O module interface.
The BBB performs the primary functions like scanning data, running control sequences, and
communication activities. The cape has an on-board power supply unit that converts the 24-V DC input
power supply to the required output voltages. The power supply unit generates the 3.3 V required by a
CPLD, the 5 V of DC required for a BBB, and the 24 V required for a smart I/O module.
The cape has a 50-pin interface connector where various smart I/O modules can be connected. The smart
I/O interface has a dedicated serial peripheral interface (SPI) and I2C to communicate with devices on the
smart I/O module. These pluggable I/O modules are typically analog and digital, input and output modules,
or a combination of both. The evaluation platform runs a webserver on the BBB for the performance
evaluation of the I/O module, which can be accessed from a PC (through the Ethernet interface).
For more information on each of these devices, see the respective product folders at www.TI.com.
4.1
CPLD
JTAG
20-MHZ
Osc
CLK
BBB
SPI_1
CPLD
GPIOs
SPI
Smart I/O
GPIOs
2
I C_2
Figure 2. CPLD Interface
4
BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
TIDU730A – January 2015 – Revised March 2015
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Theory of Operation
www.ti.com
The cape board is a simple glue logic that connects the BBB and the smart I/O reference design daughter
card. The glue logic is mostly implemented in a CPLD. Figure 3 shows the CPLD interface. The CPLD
allows the use of an elastic buffer in the SPI, which can compensate for the round-trip delays due to the
digital isolators.
Table 1. Pin Assignment for BBB and Smart I/O Interface
4.1.1
BBB
Smart I/O
SPI1_D0
MISO
In
BBB Direction
SPI1_D1
MOSI
Out
SPI1_CS0
CS0
Out
SPI1_SCLK
SCLK
Out
I2C2_SCL
EVM_ID_SCL
Bidirectional
I2C2_SDA
EVM_ID_SDA
Bidirectional
GPIO1_16
EVM_GPIO0
Out
GPIO1_17
EVM_GPIO1
Out
GPIO3_21
EVM_GPIO2
Out
GPIO0_7
EVM_GPIO3
In-Out
GPIO1_28
SDRDY
In
Smart I/O Interface
Smart I/O module
24 V
SPI
Digital
isolators
BBB
GPIOs
Smart I/O
interface
2
I C_2
GPIOs
Isolation barrier
SPI_1
2
IC
EEPROM
Figure 3. Smart I/O-BBB Interface
TIDU730A – January 2015 – Revised March 2015
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BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
5
Theory of Operation
TI
•
•
•
www.ti.com
Designs also provides the reference design for pluggable smart I/O modules, like:
TIDA-00119: A 12-bit analog input module for PLCs
TIDA-00118: A 16-bit analog output module for PLCs
TIDA-00236: A low-side, 0.5-A, 8-channel digital output module for PLCs
In SPI protocol, the master and slave configuration asserts the data on one clock edge and reads the data
on the next or opposite clock edge. SPI communication functions well as long as the total round-trip
propagation delay is less than half of the clock period. The digital isolators delay to the timing of the SPI.
The minimum time required for the data from the slave device to reach the master device is twice the
maximum propagation delay. The propagation delay of the isolator reduces the data throughput by
imposing a limit on the SPI clock speed.
The CPLD implements an elastic buffer in the master in-slave out (MISO) SPI, which compensates for the
round-trip delays due to the digital isolators. The elastic buffer delays the MISO in such a way that the
current sample is delayed until the next sample time.
SPI_CLK
MOSI
SPI
BBB
Digital
Isolator
MISO
MOSI
D0
D1
ADC
MOSI
D2
SPI_CLK
D0
D1
D2
SPI_CLK
MISO
D0
D1
D2
D0
D1
D2
MISO
DIN is delayed by the propagation delay of the
isolator and clock-to-output delay of ADC, which in
turn meets the setup timing requirement for the SPI
Both Data and Clock are
delayed, so no problem here
Clock to output delay of
ADC
An elastic buffer to compensate for the round-trip delay
BBB
SPI
SPI_CLK
MOSI
Digital
Isolator
ADC
MISO
Shift
Register
Delay the MISO data so that the present sample is
delayed to the next sample time
Figure 4. High Speed Isolated SPI With CPLD
6
BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
TIDU730A – January 2015 – Revised March 2015
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Theory of Operation
www.ti.com
4.2
Power Supply
+5 V to BBB
+24 V
LMZ14201
TPS70933
+3.3 V to CPLD
TPS70918
+1.8 V to CPLD
Figure 5. Power Supply Tree Diagram of I/O Controller
The cape has an on-board power supply unit that converts the 24-V DC input power supply to the required
output voltages. The power supply unit generates the 3.3 V required by a CPLD, the 5-V DC required for a
BBB, and the 24 V required for a smart I/O module. Input reverse protection is implemented with a diode.
TIDU730A – January 2015 – Revised March 2015
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BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
7
Test Setup
5
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Test Setup
Output status
LEDs
LAN
PC
BBB and TIDA-00236 on TIDA-00312
Loads
LAN
24-V field
power input
Wall adapter
Figure 6. Setup Diagram for Test and Evaluation
The test setup consists of the cape (TIDA-00312) to which the BBB is connected. The low-side, 0.5 A, 8channel digital output module for PLCs (TIDA-00236) smart I/O daughter board plugs into the smart I/O
interface. The TIDA-00236 is capable of turning resistive, inductive, or capacitive loads on or off. The
TIDA-00236 has eight output lines with three LEDs per output to indicate the output status. View more
information on the control and LED status in the TIDA-00236 data sheet.
The Ethernet port of BBB connects to a local area network (LAN). A computer that is connected to the
LAN can access the web server page of the BBB to control the TIDA-00236 output line.
6
Software Description
The software uses a standard Ubuntu distribution, version 14.04. View further information about using
Ubuntu with the BBB at: http://elinux.org/BeagleBoardUbuntu. Typically, any Linux distribution can be
used. There are many Linux distributions that have been ported to BeagleBone boards and all of this
information is available on www.BeagleBoard.org. There is no particular reason to restrict use to the
Ubuntu distribution—Debian, Yellowdog Updater, Modified (yum), or any other distribution is sufficient to
use for the design.
8
BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
TIDU730A – January 2015 – Revised March 2015
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Software Description
www.ti.com
The PLC I/O module evaluation software is implemented as an Internet of Things (IoT) device. The main
objective behind programming the PLC to function as an IoT device is to provide control over the network
and the web. This control makes the network and web easy to operate and evaluate. An IoT device must
have a network connection, which the Ethernet port of the BeagleBone provides. A Node.js ® web server
runs on the board and uses SPI to connect to the PLC I/O board. The web server of the board serves an
HTML page that uses user interface elements to control the digital outputs on the I/O cape board. The
user can connect to the PLC I/O web page from anywhere on the web, click on the digital output controls,
and write the data to the board using the web interface. The web page communicates back to the server
and (depending on the user input controls), the digital output on the PLC digital output module. Figure 7
shows the PLC I/O evaluation software stack.
BeagleBone Black software
TI PLC I/O cape
JavaScript code
Node SPI
Any browser
Node.js and Express
server
Any host machine with a
browser (PC, tablet,
smartphone)
Ubuntu 14.04 on
BeagleBone Black
Network
(Internet and web)
Figure 7. PLC I/O Software Stack
6.1
Software Components
•
•
•
•
•
•
Ubuntu 14.04: Ubuntu for BeagleBone Black is available with instructions at
http://elinux.org/BeagleBoardUbuntu.
Node.js: Node.js is a platform built on the JavaScript runtime for the Google Chrome™ browser to
easily build fast, scalable network applications. Node.js uses an event-driven, non-blocking I/O model
that makes Node.js lightweight, efficient, and perfect for data-intensive, real-time applications that run
across distributed devices. View more information at http://nodejs.org/.
Express.js: Express is a minimalist web framework for Node.js applications. Express provides the web
server functionality in the node application. View more information at http://expressjs.com/.
Node SPI module: The node SPI module is a Node.js interface to the SPI bus and is typically found on
embedded Linux machines such as BeagleBone Black. The module uses a native interface and a
wrapped .js interface with a better API. View more information at
https://github.com/RussTheAerialist/node-spi.
Socket.IO: Socket.IO enables real-time, bidirectional, event-based communication. The Socket.IO
works on every platform, browser, or device and focuses equally on reliability and speed. View more
information at http://socket.io/.
TI’s PLC I/O cape HTML and JavaScript code: The node-based web server running on BeagleBone
Black serves an HTML page that uses standard HTML components to visualize the digital outputs on
the PLC I/O cape. The HTML page is accessible by anyone connected to the network and has a twoway communication established with the Beagle Bone Black-based web server. The two-way
communication not only allows control of the digital I/Os, but also to retrieve the status of the I/Os that
reflect in the current status. This HTML page is based on standard JavaScript.
TIDU730A – January 2015 – Revised March 2015
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BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
9
Connectors and Other Features of TIDA-00312
7
Connectors and Other Features of TIDA-00312
CONNECTOR
8
www.ti.com
DESCRIPTION
J1
Smart I/O connector—to plug in the smart I/O board
J2 and J3
BBB connector—to plug in the BBB
J4
Xilinx® CPLD JTAG programming connector
J5
Smart I/O signal probe connector
J6
24-V DC power input connector
D1
3.3-V power LED
GUI Software and Testing
The testing procedure follows the test setup described in Section 5. The BBB typically stores the PLC I/O
module image on the SD card.
The BBB connects to the LAN and acquires an internet protocol (IP) address for the BBB. The Dynamic
Host Configuration Protocol (DHCP) server assigns the IP address. The user can locate the IP address
assigned to the BBB by using the USB port of the BBB. View further details at
http://beagleboard.org/getting-started and http://elinux.org/Beagleboard:Terminal_Shells. For the purposes
of testing this design, consider that the assigned IP is "w.x.y.z". Note that the assigned IP is independent
of the smart I/O module plugged into the cape board (TIDA-00312).
Access the BBB from a PC that is connected to the LAN using the BBB IP (w.x.y.z). The control page at
http://w.x.y.z:9000/#/ is accessible using either the Firefox® or Chrome browser. The browser opens the
control page of the digital output module.
The control page of the module (in this case, the TIDA-00236 digital output module), has 24 LED toggle
buttons and a Write to Board command button. Buttons D41 through D56 correspond to status LEDs D41
through D48 of the TIDA-00236 device. Similarly, D69 through D76 correspond to output level LEDs D69
through D76 on the TIDA-00236 board.
Change the status of the LEDs by clicking the LED buttons. Send the status to the output board by
clicking the Write to Board button. Turn the output lines on or off by clicking buttons D69 through D76 to
set or reset. Then click the Write to Board button to update the digital outputs in TIDA-00236.
10
BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
TIDU730A – January 2015 – Revised March 2015
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GUI Software and Testing
www.ti.com
Figure 8 shows the control page for TIDA-00236.
Figure 8. TIDA-00236 Control Page
TIDU730A – January 2015 – Revised March 2015
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BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
11
Design Files
9
Design Files
9.1
Schematics
www.ti.com
Glue Logic (CPLD)
DC-DC converter
2x46-pin Beaglebone Black Connector
50-pin IO Daughter Card Connector
To download the schematics, see the design files at TIDA-00312.
+24V
Figure 9. Block Diagram Schematic
12
BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
TIDU730A – January 2015 – Revised March 2015
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Design Files
www.ti.com
U1B
I/O, GCK1
I/O, GCK0
I/O, CDRST
I/O, GCK2
I/O, DGE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
23
22
24
27
28
29
30
19
18
17
16
15
14
32
33
34
35
36
37
53
54
55
56
52
50
49
I/O
I/O
44
58
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
60
61
63
64
43
42
41
40
39
MAIN_CLK
I/O, GSR
I/O
I/O
I/O
I/O
I/O, GTS2
I/O, GTS3
I/O, GTS0
I/O, GTS1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
BANK 2
BANK 1
U1A
EVM_GPIO3_1
BBB_SPI1_CLK
BBB_SPI1_SOMI
BBB_SPI1_SIMO
BBB_SPI1_CS
EVM_GPIO3
EVM_GPIO2
EVM_GPIO1
EVM_GPIO0
/SDRDY
R16
R15
R14
R17
10.0
10.0
10.0
10.0
EVM_MOSI
EVM_CLK
EVM_CS0
EVM_MISO
XC2C64A-7VQG100I
99
97
96
95
94
1
2
3
4
6
7
93
92
91
90
8
9
10
11
12
13
78
79
80
81
82
77
76
74
73
72
71
70
85
86
87
89
68
67
66
65
J7
EVM_ID_SCL
EVM_ID_SCL_1
923345-06-C
J8
EVM_ID_SDA
EVM_ID_SDA_1
EVM_GPIO0 R32
DNP
EVM_GPIO0_1
EVM_GPIO1 R33
DNP
EVM_GPIO1_1
EVM_GPIO2 R34
DNP
EVM_GPIO2_1
/SDRDY
DNP
/SDRDY_1
R35
923345-06-C
EVM_GPIO2_1
EVM_GPIO1_1
EVM_GPIO0_1
J2
J3
GPIO1_13
EHRPWM2B
GPIO1_15
GPIO0_27
EHRPWM2A
GPIO1_15
EHRPWM2B
GPIO1_13
GPIO0_27
EHRPWM2A
/SDRDY_1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
+5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
R25
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
0
EVM_GPIO0_1
EVM_ID_SCL_1
R2
R3
R36
10.0
10.0
10.0
EVM_GPIO1_1
EVM_GPIO2_1
R6
R7
10.0
10.0
BBB_SPI1_SOMI R11
BBB_SPI1_CLK R13
10.0
10.0
R19
10.0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
R1
10.0
/SDRDY_1
R4
R37
10.0
10.0
EVM_ID_SDA_1
R8
R10
10.0
10.0
BBB_SPI1_CS
BBB_SPI1_SIMO
10.0
EVM_GPIO3_1
R9
TSW-123-07-L-D
TSW-123-07-L-D
XC2C64A-7VQG100I
VDD_3.3V
Y1
4
MAIN_CLK
R20
10.0
3
VDD
E/C
OUT
GND
1
2
7X-20.000MBB-T
20MHz
VDD_3.3V
VDD_3.3V
J4
SBH11-PBPC-D07-ST-BK
XC2C64A-7VQG100I to be use d option to solder XC2C128 -7VQG100C also
U1C
R24
10.0k
TMS
TCK
TDO
TDI
J1
EVM_CS0
EVM_CLK
EVM_MOSI
EVM_ID_SDA
EVM_GPIO0
EVM_GPIO1
EVM_CS0
EVM_CLK
EVM_MISO
EVM_MOSI
EVM_ID_SDA
EVM_GPIO0
EVM_GPIO1
+24VDC_FILTER
C10
0.1µF
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
ERM8-025-05.0-L-DV-K-TR
2
4
6
8
10
12
14
TMS
TCk
TDO
TDI
47
48
83
45
XC2C64A-7VQG100I
/SDRDY
/SDRDY
EVM_ID_SCL
C6
DNP
VDD_3.3V
EVM_ID_SCL
1
3
5
7
9
11
13
VDD_3.3V
JTAG CONNECTOR
U1D
R22
R21
GPIO0_27
0
R12
EVM_GPIO2
EVM_GPIO3
0
EVM_GPIO2
EVM_GPIO3
C3
10µF
DNP
20
38
51
VCCIO1
VCCIO1
VCCIO1
88
98
VCCIO2
VCCIO2
VDD_1.8V
5
VAUX
26
57
VCC
VCC
C7
C8
0.1µF 0.1µF
C9
0.1µF
BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
13
C5
0.1µF
C4
0.1µF
C2
0.1µF
C1
0.1µF
C23
0.1µF
C24
0.1µF
XC2C64A-7VQG100I
+24VDC_FILTER
+24VDC_FILTER
J5
SBH11-PBPC-D07-ST-BK
C15
10µF
C14
1uF
EVM_GPIO1
EVM_GPIO0
EVM_ID_SDA
EVM_MISO
EVM_CLK
2
4
6
8
10
12
14
1
3
5
7
9
11
13
U1E
100
84
EVM_GPIO3
EVM_GPIO2
EVM_ID_SCL
/SDRDY
EVM_MOSI
EVM_CS0
R5
DNP 75
69
GND
GND
GND
GND
GND
GND
GND
GND
62
31
25
21
R18
DNP
XC2C64A-7VQG100I
Figure 10. Cape Glue Logic Schematic
TIDU730A – January 2015 – Revised March 2015
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Copyright © 2015, Texas Instruments Incorporated
Design Files
www.ti.com
+24VDC_FILTER
TP8
+5V
U3
TP6
C22
10µF
C21
10µF
R30
118k
R31
249k
1
VIN
VOUT
7
3
EN
FB
6
5
2
SS
GND
RON
EP
L2
600 ohm
R27
16.5k
4
C18
22µF
8
LMZ14201TZE-ADJ/NOPB
R29
11.5k
C19
0.022µF
FB
TP1
R26
1.00k
C20
0.01µF
R28
2.20k
+5V
VDD_1.8V
U4
1
TP11
TPS70918B VT
IN
OUT
5
TP12
2
GND
3
EN
C27
1uF
NC
4
C28
1uF
TP13
TP14
+5V
U2 TPS70933B VT
+24VDC_IN
1
+24VDC_FILTER
D2
MBRS4201T3G
TP7
C16
1uF
J6
1
2
200V
C17
0.1µF
IN
2
GND
3
EN
OUT
VDD_3.3V
MMZ1608B102C
+3.3V power
plane
1
5
L1
2
TP5
R23
300
NC
4
C13
1uF
D1
C11
10µF
C12
0.1µF
Green
282834-2
TP3
TP2
TP4
TP10
TP9
Figure 11. Cape Power Supply Schematic
14
BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
TIDU730A – January 2015 – Revised March 2015
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Design Files
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9.2
BOM
To download the Bill of Materials, see the design files at TIDA-00312.
9.3
Layer Plots
To download the layer plots, see the design files at TIDA-00312.
Figure 12. Top Overlay
Figure 13. Top Solder Mask
Figure 14. Top Layer
Figure 15. Bottom Layer
TIDU730A – January 2015 – Revised March 2015
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BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
15
Design Files
www.ti.com
Figure 16. Bottom Solder Mask
Figure 17. Bottom Overlay
Figure 18. M1 Board Outline
16
BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
TIDU730A – January 2015 – Revised March 2015
Submit Documentation Feedback
Design Files
www.ti.com
9.4
Altium Project
To download the Altium project files, see the design files at TIDA-00312.
Figure 19. Altium Project Image
TIDU730A – January 2015 – Revised March 2015
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BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
17
Design Files
9.5
www.ti.com
Gerber Files
To download the Gerber files, see the design files at TIDA-00312.
Figure 20. Fabrication Drawing
18
BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
TIDU730A – January 2015 – Revised March 2015
Submit Documentation Feedback
Design Files
www.ti.com
9.6
Assembly Drawings
To download the assembly drawings, see the design files at TIDA-00312.
Figure 21. Top Assembly Drawing
Figure 22. Bottom Assembly Drawing
9.7
Software Files
To download the software files, see the design files at TIDA-00312.
10
References
1.
2.
3.
4.
5.
6.
7.
8.
Beagleboard.org, http://beagleboard.org/getting-started.
Texas Instruments, Low Side 0.5-A, 8-Ch Digital Output Module for PLC, User's Guide (TIDU470).
eLinux.org, BeagleBoardUbuntu, http://elinux.org/BeagleBoardUbuntu.
eLinux.org, Beagleboard:Terminal Shells, http://elinux.org/Beagleboard:Terminal_Shells.
Nodejs.org, http://nodejs.org/.
Expressjs.com, http://expressjs.com/.
GitHub, RussTheAerialist / node-spi, https://github.com/RussTheAerialist/node-spi.
Socket.IO, http://socket.io/.
TIDU730A – January 2015 – Revised March 2015
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BeagleBone Cape for Programmable Logic Controller (PLC) Input/Output
Module
Copyright © 2015, Texas Instruments Incorporated
19
Revision History A
www.ti.com
Revision History A
Changes from Original (January 2015) to A Revision .................................................................................................... Page
•
•
•
•
•
Changed TLV70033 to TPS70933 in Tool Folder Containing Design Files ....................................................... 1
Added TPS70918 Product Folder ....................................................................................................... 1
Changed to reflect correct device names in figure.................................................................................... 7
Changed Figures 10 to 22. ............................................................................................................. 13
Changed Bottom Assembly Drawing to an updated image ........................................................................ 19
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
20
Revision History
TIDU730A – January 2015 – Revised March 2015
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