VLSI Lecture 3: Basic circuits
• In Lecture 2. We looked at the primary components, different
types of MOS transistors
• In this lecture, we look at
– how the basic MOS transistor is built
– how these can be used to build the basic circuits from which digital
circuitry is built.
• Each circuit is shown in schematic form
– this helps to understand the way in which the circuit works electronically
• ..as opposed to layout form
– which is what the designer provides to semiconductor foundry
Copyright 1999 © Leslie Smith
31R6 - Computer Design
Slide 25
Circuits 1: Basic nMOS Inverter
• Circuit
• Effect:
Vout = Vdd * (RT1/(RT1 + RT2)
• This form of logic is called
ratio’d logic
• Mode of operation:
T1 is an enhancement mode
nMOS transistor, and T2 is a
depletion mode nMOS transistor.
T2 has its gate connected to its source, and so is always on.
It acts as a resistor, and it is designed so that its on-resistance is
higher than the on-resistance of T1.
• Vin low (=0)
-> RT1 >> RT2, so Vout = Vdd approx
• Vin high (=1)
-> RT1 << RT2, so Vout = 0 approx
Copyright 1999 © Leslie Smith
31R6 - Computer Design
Slide 26
Page 1
1
Circuits 2: Basic CMOS inverter
• Circuit
• This is known as a
ratioless inverter
• Whenever one transistor
is on the other is off
• Relative resistances are
less important.
• T1 and T2 are both enhancement mode transistors
• T1 in nMOS, and T2 is pMOS
• When Vin is low (0) T1 is off. T2 has Vgs << 0 and so is on
– so Vout = Vdd
• When Vin is high, T1 is on. T2 has 0 < Vgs < Vthp and so is off
– so Vout = 0
Copyright 1999 © Leslie Smith
31R6 - Computer Design
Slide 27
Comparing NMOS and CMOS technologies (1)
• Comparing NMOS and CMOS
technologiesConsider Vout vs
Vin:
• Both show a region of high
gain as the input (Vin) moves
from the logic 0 to the logic 1
level.
• Both have Vout = Vdd for Vin
low
•For Vin high
•CMOS inverter has Vout almost 0
•NMOS inverter has Vout > 0
•It is limited by
Vout = Vdd * (RT1/(RT1 + RT2))
•and RT2 is fixed
•(unlike the CMOS situation)
Copyright 1999 © Leslie Smith
31R6 - Computer Design
Slide 28
Page 2
2
Comparing NMOS and CMOS technologies (2)
• Power Consumption
NMOS
Vin = low
low
Vin = high
higher
CMOS
low
low
• To give a low output, the NMOS circuit must draw current, and
so dissipate power.
• In the CMOS circuit, one transistor is always off, so power
consumption is always low
• CMOS circuits draw power
when changing states.
• CMOS circuit dissipation
depends on how often
gates change state
Copyright 1999 © Leslie Smith
31R6 - Computer Design
Slide 29
Gates in NMOS and CMOS
• The circuits used in both NMOS and CMOS gates work as
potential dividers
• From these outline circuits, one can develop circuits for multiinput NAND and NOR gates
• NMOS version:
Rbox
low
high
Copyright 1999 © Leslie Smith
output
low (0)
high (1)
31R6 - Computer Design
Slide 30
Page 3
3
CMOS version
Rpbox
Rnbox
Output
low
high
high
low
high (1)
low (0)
low
high
low
high
not allowed
not allowed
Copyright 1999 © Leslie Smith
31R6 - Computer Design
Slide 31
2-input NAND gate in NMOS
• Circuit
I1
0
0
1
1
Copyright 1999 © Leslie Smith
I2
0
1
0
1
RT1
high
high
low
low
RT2
high
low
high
low
RT1 + RT2
high
high
high
low
31R6 - Computer Design
Output
1
1
1
0
Slide 32
Page 4
4
2-input NOR gate in NMOS
Circuit
I1
0
0
1
1
I2
0
1
0
1
RT1
high
high
low
low
Copyright 1999 © Leslie Smith
RT2
high
low
high
low
RT1 ¦¦ RT2
high
low
low
low
Output
1
0
0
0
31R6 - Computer Design
Slide 33
2-input NAND gate in CMOS
• Circuit
•Rnbox = RTn1 + RTn2 (series)
•Rpbox = 1/(1/RTp1 + 1/RTp2) (parallel)
I1
0
0
1
1
Copyright 1999 © Leslie Smith
I2
0
1
0
1
RNBox
high
high
high
low
RPBox
low
low
low
high
31R6 - Computer Design
Output
1
1
1
0
Slide 34
Page 5
5
2-input NOR gate in CMOS
Circuit
•Rnbox = 1/(1/RTp1 + 1/RTp2) (parallel)
•Rpbox = RTp1 + RTp2 (series)
I1
0
0
1
1
Copyright 1999 © Leslie Smith
I2
0
1
0
1
RNBox
high
low
low
low
RPBox
low
high
high
high
31R6 - Computer Design
Output
1
0
0
0
Slide 35
Page 6
6