H DC - 12 GHz Packaged High Efficiency Divide-by-2 Prescaler Technical Data hp HMMC-3122 Features Wide Frequency Range: 0.212 GHz High Input Power Sensitivity: On-chip pre- and post-amps -15 to +10 dBm (18 GHz) -10 to +8 dBm (810 GHz) -5 to +2 dBm (1012 GHz) Pout: 0 dBm (0.5 Vp-p) Low Phase Noise: -153 dBc/Hz @ 100 kHz Offset (+) or (-) Single Supply Bias Operation Wide Bias Supply Range: 4.5 to 6.5 volt operating range Differential I/0 with on-chip 50W matching Description The HMMC-3122 is a packaged GaAs HBT MMIC prescaler which offers DC to 12 GHz frequency translation for use in communications and EW systems incorporating high-frequency PLL oscillator circuits and signal-path down conversion applications. The prescaler provides a large input power sensitivity window and low phase noise. Package Type: 8-lead SSOP Plastic Package Dimensions: 4.9 Package Thickness: 1.55 mm Typ. Lead Pitch: 1.25 mm Nom. Lead Width: 0.42 mm Nom. ´ 3.9 mm Typ. Absolute Maximum Ratings[1] (@ TA=25°C, unless otherwise indicated) Symbol Parameters/Conditions VCC Bias Supply Voltage VEE Bias Supply Voltage |VCC - Bias Supply Delta VLogic Logic Threshold Voltage VEE| Pin(CW) VRFin TBS[2] Tst Tmax Min. Max. Units +7 volts -7 VCC-1.5 CW RF Input Power DC Input Voltage (@ RFin or RFin Ports) volts +7 volts VCC-1.2 volts +10 dBm VCC ± 0.5 volts Backside Operating Temp -40 +85 °C Storage Temperature -65 +165 °C 310 °C Maximum Assembly Temp. (60 seconds max.) [1]Operation in excess of any parameter limit (except TBS) may cause permanent damage to the device. 6 [2]MTTF >1´10 hours @ TBS <85°C. Operation in excess of maximum operating temperature (TBS) will degrade MTTF. 5-1 DC Specifications/Physical Properties A = 25°C, V (T CC - VEE = 5.0 volts, unless otherwise listed) Symbol VCC - VEE |ICC| or |IEE| VRFin(q) VRFout(q) VLogic Parameters/Conditions Operating bias supply difference[1] Bias supply current Quiescent DC voltage appearing at all RF ports Nominal ECL Logic Level (VLogic contact self-bias voltage, generated on-chip) [1]Prescaler will operate over full specified supply voltage range. V Min. Typ. Max. Units 4.5 34 5.0 40 VCC 6.5 46 volts mA volts VCC - 1.45 VCC -1.32 VCC -1.25 volts CC or VEE not to exceed limits specified in Absolute Maximum Ratings section. RF Specifications (TA = 25°C, Z0 = 50W, VCC - VEE = 5.0 volts) Symbol Parameters/Conditions Maximum input frequency of operation Minimum input frequency of operation[1] ¦in(min) (Pin = -10 dBm) ¦Self-Osc. Output Self-Oscillation Frequency[2] @ DC, (Square-wave input) @ ¦in = 500 MHz, (Sine-wave input) ¦in = 1 to 8 GHz Pin ¦in = 8 to 10 GHz ¦in = 10 to 12 GHz Small-Signal Input/Output Return Loss RL (@¦in< 10 GHz) Small-Signal Reverse Isolation S12 (@¦in<10 GHz) SSB Phase noise (@ Pin = 0 dBm, 100kHz offset jN from a ¦out = 1.2 GHz Carrier) Input signal time variation @ zero-crossing Jitter (¦in = 10 GHz, Pin = -10 dBm) Tr or Tf Output transition time (10% to 90% rise/fall time) @ ¦out < 1 GHz @ ¦out = 2.5 GHz Pout[3] @ ¦out = 3.0 GHz @ ¦out <1 GHz |Vout(p-p)|[4] @ ¦out = 2.5 GHz @ ¦out = 3.0 GHz ¦out power level appearing at RFin or RFin (@ ¦in 10 GHz, Unused RFout or RFout unterminated) PSpitback ¦out power level appearing at RFin or RFin (@ ¦in = 10 GHz, Both RFout & RFout ¦in(max) ) Power level of ¦in appearing at RFout or RFout (@ ¦in = 12 GHz, Pin = 0 dBm, Referred to Pin(¦in)) Second harmonic distortion output level (@ ¦out = 3.0 GHz, Referred to Pout(¦out)) Min. Typ. 12 14 -15 -15 -15 -10 -5 -2.0 -3.5 -4.5 0.2 3.4 >-25 >-20 >-20 >-15 >-10 15 Max. Units GHz 0.5 +10 +10 +10 +5 -1 GHz GHz dBm dBm dBm dBm dBm dB 30 dB -153 dBc/Hz 1 70 0.0 -1.5 -2.5 0.5 0.42 0.37 ps ps dBm dBm dBm volts volts volts -50 dBm -55 dBm -30 dBc -25 dBc terminated Pfeedthru H2 [1]For sine-wave input signal. Prescaler will operate down to D.C. for square-wave input signal. Minimum divide frequency limited by input slew-rate. [2]Prescaler can exhibit this output signal under bias in the absence of an RF input signal. This condition can be eliminated by use of the Input DC offset technique described on page 3. [3]Fundamental of output square waves Fourier Series. [4]Square wave amplitude calculated from P 5-2 out. HMMC-3122/rev.3.0 Applications the prescaler input is "slew-rate" bias operation VCC pins are typi- The HMMC-3122 is designed for limited, requiring fast rising and cally grounded and a negative use in high frequency communi- falling edge speeds to properly di- voltage between -4.5 to -6.5 volts cations, microwave instrumenta- vide. The device will operate at is applied to Pin 8 (VEE). tion, and EW radar systems frequencies down to DC when where low phase-noise PLL con- driven with a square-wave. AC trol circuitry or broad-band fre- coupling at Pin 5 (RFin) is recom- quency translation is required. mended for most applications. Operation The device can be operated from voltage between the RFin and either a single positive or single RFin ports. This prevents noise negative supply. For positive sup- or spurious low level signals The device is designed to operate when driven with either a singleended or differential sinusoidal input signal over a 200 MHz to 12 GHz bandwidth. Below 200 MHz Input DC Offset To prevent false triggers or self-oscillation conditions, apply a 20 to 100 mV DC offset from triggering the divider. ply operation VCC pins are nominally biased at any voltage in the GaAs MMICs are ESD sensitive. +4.5 to +6.5 volt range with Pin 8 Proper precautions should be (VEE) grounded. For negative used when handling these devices. VCC VCC IN ÷ IN VCC OUT OUT SOIC8 w/Backside GND VEE Figure 1. Simplified Schematic HMMC-3122/rev.3.0 5-3 Notes: RFin VCC RFin VEE All dimensions in millimeters. Refer to JEDEC Outline MS012 for additional tolerances MIN. A 1.35 1.75 A1 0.10 0.25 B 0.33 0.51 C 0.19 .025 D 4.80 5.00 E 3.80 4.00 VCC RFout VCC RFout SYMBOL e MAX. 1.27 BSC H 5.80 6.20 L 0.40 1.27 a 0° 8° Exposed heat slug area on pkg bottom = 2.67 1.65. ´ Figure 2. Package & Dimensions VCC (+4.5 to +6.5 volts) ~1 mf Monoblock Capacitor To operate component from a nega- RFin VEE 9618 VCC HMMC-3122 RFin HP tive supply, ground each VCC connec- tion and supply VEE with a negative VCC voltage (-4.5 to -6.5v) bypassed to RFout ground with ~ 1 mf capacitor. VCC RFout W to RFout should be terminated in 50 ground. (DC blocking capacitor required for positive bias configuration.) Figure 3. Assembly Diagram (Single-Supply, positive-bias configuration shown) 5-4 HMMC-3122/rev.3.0 Supplemental Data: CC-VEE = +5 volts, TA=25°C) (V (T =25°C) Input Power, P Supply (mA) 0 0 -10 -10 I -20 -20 -30 -30 -40 -40 2 2 4 4 6 6 8 8 Input Frequency, ¦in 10 10 12 12 -0.2 -0.2 40 40 -0.4 -0.4 35 35 -0.6 -0.6 30 30 -0.8 -0.8 25 25 -1.0 -1.0 20 20 -1.2 -1.2 15 15 -1.4 -1.4 10 10 -1.6 -1.6 55 -1.8 -1.8 00 14 14 -2.0 -2.0 0 0 (GHz) 3 3 4 4 5 6 6 5 CC - VEE (volts) 7 7 8 8 9 9 Figure 5. vs. Supply Voltage CC - VEE = +5 volts, TA=25°C) 8 (V out (@ Pin=0dBm), dBm -115 -120 2 2 0 0 -2 -2 -125 -4 -4 -130 -6 -6 -135 -140 -8 -8 -145 -10 -10 -150 -12 -12 P -155 100 2 2 Typical Supply Current & VLogic -110 -160 1 1 V Figure 4. Typical Input Sensitivity Window Pin = 0 dBm 0.0 0.0 45 45 Logic - VCC (volts) 10 10 0 0 A 50 50 V in (dBm) 20 20 1K 10K 100K 1M -14 -14 10M x [f] [dBc/Hz vs. f[Hz] 1 1 0 2 2 3 3 4 4 5 5 Figure 6. Figure 7. Typical Phase Typical Output Power vs. Output Frequency, Noise Performance (V 6 6 7 7 Output Frequency (GHz) ¦out (GHz) CC - VEE = +5 volts, Pin = 0 dBm,TA=25°C) 0 -10 -20 Unterminated RFout Port PSpitback (dBm) -30 -40 -50 -60 Both RFout Ports Terminated -70 -80 -90 -100 0 0 2 2 4 4 6 6 8 8 Input Frequency, 10 10 12 12 ¦in (GHz) 14 14 Figure 8. Typical "Spitback" Power P(¦out) appearing at RF input port This data sheet contains a variety of typical and guaranteed performance data. The information supplied should not be interpreted as a complete list of circuit specifications. In this data sheet the term typical refers to the 50th percentile performance. For additional information contact your local HP sales representative. HMMC-3122/rev.3.0 5-5 Notes: 5-6 HMMC-3122/rev.3.0