150 μV Maximum Offset Voltage Op Amp
OP07D
Low offset voltage: 150 μV max
Input offset drift: 1.5 μV/°C max
Low noise: 0.25 μV p-p
High gain CMRR and PSRR: 115 dB min
Low supply current: 1.1 mA
Wide supply voltage range: ±4 V to ±18 V operation
PIN CONFIGURATIONS
NULL
8
NULL
–IN 2
OP07D
7
V+
+IN 3
TOP VIEW
(Not to Scale)
6
OUT
5
NC
1
V– 4
NC = NO CONNECT
05867-001
FEATURES
Figure 1. 8-Lead SOIC_N (R-8), 8-Lead DIP (N-8)
APPLICATIONS
Medical and industrial instrumentation
Sensors and controls
Thermocouple
RTDs
Strain bridges
Shunt current measurements
Precision filters
GENERAL DESCRIPTION
The OP07D is a precision, ultralow offset amplifier. It integrates
low power (1.1 mA typical), low input bias current (±1 nA
maximum), and high CMRR/PSRR (130 dB) in the small DIP
package. Operation is fully specified from ±5 V to ±15 V supply.
The OP07D provides higher accuracy than industry-standard
OP07-type amplifiers due to Analog Devices’ iPolar™ process,
which supports enhanced performance in a smaller footprint.
These performance enhancements include wider output swing,
lower power, and higher CMRR (common-mode rejection
ratio) and PSRR (power supply rejection ratio). The OP07D
maintains stability of offsets and gain virtually regardless of
variations in time or temperature. Excellent linearity and gain
accuracy can be maintained at high closed-loop gains.
The OP07D is fully specified over the extended industrial temperature range of −40°C to +125°C. The OP07D amplifier is
available in 8-lead DIP and the popular 8-lead, narrow SOIC
lead-free packages.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
OP07D
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
Applications....................................................................................... 1
Thermal Resistance .......................................................................5
General Description ......................................................................... 1
ESD Caution...................................................................................5
Pin Configurations ........................................................................... 1
Typical Performance Characteristics ..............................................6
Revision History ............................................................................... 2
Outline Dimensions ....................................................................... 13
Specifications..................................................................................... 3
Ordering Guide .......................................................................... 14
REVISION HISTORY
12/05—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
OP07D
SPECIFICATIONS
VS = ±5.0 V, TA = 25°C, unless otherwise specified.
Table 1.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Test Conditions/Comments
Min
VOS
Typ
Max
Unit
40
150
250
350
1
μV
μV
μV
nA
1
1
1
+3.5
nA
nA
nA
V
dB
dB
V/mV
V/mV
μV/°C
μV/°C
0°C ≤ TA ≤ 70°C
−40°C ≤ TA ≤ +125°C
Input Bias Current
IB
Input Offset Current
IOS
0.2
−40°C ≤ TA ≤ +125°C
0.1
−40°C ≤ TA ≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Open-Loop Gain
AVO
Offset Voltage Drift
ΔVOS/ΔT
OUTPUT CHARACTERISTICS
Output Voltage Swing
Short-Circuit Current
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
VOUT
ISC
IO
PSRR
ISY
VCM = ±3 V
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ to ground, VO = ±3 V
−40°C ≤ TA ≤ +125°C
0°C ≤ TA ≤ 70°C
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to ground
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ to ground
−40°C ≤ TA ≤ +125°C
−3.5
120
120
1000
1000
10,000
0.5
0.5
±3.95
±3.95
±3.9
±3.9
1.8
1.4
±4.1
V
V
V
V
mA
mA
±4
27
15
VO = 3.5 V
VS = ±4.0 V to ±18.0 V
0°C ≤ TA ≤ 70°C
−40°C ≤ TA ≤ +125°C
VO = 0 V
0°C ≤ TA ≤ 70°C
−40°C ≤ TA ≤ +125°C
127
115
115
110
130
1.1
1.25
1.45
1.75
dB
dB
dB
mA
mA
mA
SR
GBP
RL = 10 kΩ
0.2
0.6
80
V/μs
MHz
Degrees
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
0.28
10
0.074
μV p-p
nV/√Hz
pA/√Hz
Rev. 0 | Page 3 of 16
OP07D
VS = ±15 V, TA = 25°C, unless otherwise specified.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Test Conditions/Comments
Min
VOS
Typ
Max
Unit
45
150
250
350
1
μV
μV
μV
nA
1
1
1
+13.5
nA
nA
nA
V
dB
dB
V/mV
V/mV
μV/°C
μV/°C
0°C ≤ TA ≤ 70°C
−40°C ≤ TA ≤ +125°C
Input Bias Current
IB
Input Offset Current
IOS
0.2
−40°C ≤ TA ≤ +125°C
0.2
−40°C ≤ TA ≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Open-Loop Gain
AVO
Offset Voltage Drift
ΔVOS/ΔT
OUTPUT CHARACTERISTICS
Output Voltage Swing
Short-Circuit Current
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
VOUT
ISC
IO
PSRR
ISY
VCM = ±13.0 V
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ to ground, VO = ±11 V
−40°C ≤ TA ≤ +125°C
0°C ≤ TA ≤ 70°C
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to ground
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ to ground
−40°C ≤ TA ≤ +125°C
−13.5
120
120
1000
1000
10,000
0.5
0.5
±13.95
±13.9
±13.75
±13.7
2.5
1.5
+14
V
V
V
V
mA
mA
+13.8
30
15
VO = 13.5 V
VS = ±4.0 V to ±18.0 V
0°C ≤ TA ≤ 70°C
−40°C ≤ TA ≤ +125°C
VO = 0 V
0°C ≤ TA ≤ 70°C
−40°C ≤ TA ≤ +125°C
140
115
115
110
130
1.1
1.3
1.55
1.85
dB
dB
dB
mA
mA
mA
SR
GBP
RL = 10 kΩ
0.2
0.6
80
V/μs
MHz
Degrees
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
0.25
10
0.074
μV p-p
nV/√Hz
pA/√Hz
Rev. 0 | Page 4 of 16
OP07D
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 10 sec)
Rating
±18 V
±V supply
±0.7 V
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
+300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4.
Package Type
8-Lead DIP (N-8)
8-Lead SOIC (R-8)
θJA
103
158
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 16
θJC
43
43
Unit
°C/W
°C/W
OP07D
TYPICAL PERFORMANCE CHARACTERISTICS
45
50
VS = ±15V
45
NUMBER OF AMPLIFIERS
40
NUMBER OF AMPLIFIERS
VS = ±15V
40
35
30
25
20
15
35
30
25
20
15
10
10
5
0
–60
–40
–20
0
20
40
60
80
100
VOS (µV)
100
25
50
VOS (µV)
30
20
–50
10
–100
5
–150
0
20
40
60
80
0.75
0.90
1.05
1.20
0
15
100
VOS (µV)
–200
–50
05867-004
NUMBER OF AMPLIFIERS
150
–20
0.60
VS = ±15V
35
–40
0.45
200
VS = ±5V
–60
0.30
Figure 5. Number of Amplifiers vs. TCVOS
40
–100 –80
0.15
TCVOS (µV/°C)
Figure 2. Number of Amplifiers vs. Offset Voltage
0
0
0
50
100
150
TEMPERATURE (°C)
Figure 3. Number of Amplifiers vs. Offset Voltage
05867-005
–100 –80
05867-003
0
05867-048
5
Figure 6. Offset Voltage vs. Temperature
50
VS = ±5V
200
VS = ±5V
150
100
30
VOS (µV)
50
20
0
–50
10
–100
0
0.15
0.30
0.45
0.60
0.75
0.90
TCVOS (µV/°C)
1.05
Figure 4. Number of Amplifiers vs. TCVOS
–200
–50
0
50
100
TEMPERATURE (°C)
Figure 7. Offset Voltage vs. Temperature
Rev. 0 | Page 6 of 16
150
05867-006
–150
0
05867-047
NUMBER OF AMPLIFIERS
40
OP07D
–13.92
1.6
VS = ±15V
RL = 10kΩ
–13.94
1.4
–13.96
VS = ±15V
–13.98
VOL (V)
ISY (mA)
1.2
VS = ±5V
1.0
–14.00
–14.02
–14.04
0.8
–14.06
0.6
0
50
100
150
TEMPERATURE (°C)
–14.10
–50
05867-007
0.4
–50
0
50
100
150
TEMPERATURE (°C)
05867-011
–14.08
Figure 11. Negative Output Voltage Swing vs. Temperature
Figure 8. Supply Current vs. Temperature
–3.98
14.40
VS = ±15V
RL = 10kΩ
VS = ±5V
RL = 10kΩ
–4.00
14.35
–4.02
–4.04
VOL (V)
VOH (V)
14.30
14.25
–4.06
–4.08
–4.10
14.20
–4.12
14.15
0
50
100
150
TEMPERATURE (°C)
–4.16
–50
05867-009
14.10
–50
0
50
100
150
TEMPERATURE (°C)
05867-012
–4.14
Figure 12. Negative Output Voltage Swing vs. Temperature
Figure 9. Positive Output Voltage Swing vs. Temperature
0
4.45
VS = ±5V
RL = 10kΩ
VS = ±15V
4.40
–0.1
4.35
IB (nA)
4.30
–0.3
4.25
4.15
–50
0
50
100
TEMPERATURE (°C)
150
–0.5
–50
0
50
100
TEMPERATURE (°C)
Figure 13. Input Bias Current vs. Temperature
Figure 10. Positive Output Voltage Swing vs. Temperature
Rev. 0 | Page 7 of 16
150
05867-013
–0.4
4.20
05867-010
VOH (V)
–0.2
OP07D
0
150
VS = ±5V
VS = ±4V TO ±18V
–0.05
–0.10
140
PSRR (dB)
IB (nA)
–0.15
–0.20
–0.25
130
–0.30
0
50
100
150
TEMPERATURE (°C)
120
–50
05867-014
–0.40
–50
0
50
100
150
TEMPERATURE (°C)
Figure 14. Input Bias Current vs. Temperature
05867-019
–0.35
Figure 17. PSRR vs. Temperature
40
146
144
VS = ±15V
142
VS = ±15V
140
30
ISC (mA)
CMRR (dB)
138
134
134
132
VS = ±5V
20
130
128
0
50
100
150
TEMPERATURE (°C)
10
–50
05867-015
124
–50
0
50
100
150
TEMPERATURE (°C)
05867-020
VS = ±5V
126
Figure 18. Short-Circuit Current vs. Temperature
Figure 15. CMRR vs. Temperature
1.4
16000
RL = 2kΩ
1.2
14000
SUPPLY CURRENT (mA)
VS = ±15V
10000
8000
VS = ±5V
6000
0.8
0.6
0.4
0
50
100
TEMPERATURE (°C)
150
0
0
10
20
30
SUPPLY VOLTAGE (V)
Figure 19. Supply Current vs. Supply Voltage
Figure 16. Open-Loop Gain vs. Temperature
Rev. 0 | Page 8 of 16
40
05867-022
2000
–50
1.0
0.2
4000
05867-017
AVO (V/mV)
12000
OP07D
50
VOH = +VOUT
VS = ±15V
VIN = 28mV
RL = ∞
CL = 20pF
40
CLOSED-LOOP GAIN (dB)
VOL = –VOUT
1
30
G = +10
20
10
G = +1
0
0.1
1
10
100
ILOAD (mA)
–10
100
05867-023
0.1
0.01
50
CLOSED-LOOP GAIN (dB)
VSY – VOUT (V)
VOL = –VOUT
1
VOH = +VOUT
30
G = +10
20
10
G = +1
0
1
10
100
ILOAD (mA)
–10
100
05867-024
0.1
30
80
0
20
1k
10k
100k
1M
FREQUENCY (Hz)
0
10M
GAIN
20
15
10
5
05867-025
–40
100
+OS
OVERSHOOT (%)
40
GAIN
VS = ±15V
RL = ∞
CL = 20pF
ΦM = 80°
1M
–OS
PHASE MARGIN (Degrees)
60
20
100k
VS = ±15V
VIN = ±50mV
G = +1
25
80
60
40
10k
Figure 24. Closed-Loop Gain vs. Frequency
100
PHASE
1k
FREQUENCY (Hz)
Figure 21. Output Voltage Swing vs. Load Current
100
1M
VS = ±5V
VIN = 28mV
RL = ∞
CL = 20pF
G = +100
40
–20
100k
Figure 23. Closed-Loop Gain vs. Frequency
VS = ±5V
0.1
0.01
10k
FREQUENCY (Hz)
Figure 20. Output Voltage Swing vs. Load Current
10
1k
05867-027
VSY – VOUT (V)
G = +100
05867-026
VS = ±15V
Figure 22. Open-Loop Gain and Phase vs. Frequency
0
0
2
4
6
8
CLOAD (nF)
Figure 25. Overshoot vs. Capacitive Load
Rev. 0 | Page 9 of 16
10
12
05867-028
10
OP07D
30
100
VS = ±5V
VIN = ±50mV
G = +1
25
–OS
G = +100
20
10
ROUT (Ω)
OVERSHOOT (%)
+OS
VS = ±15V
VIN = 28mV
RL = ∞
CL = 20pF
15
10
G = +10
G = +1
1
0
2
4
6
8
10
12
CLOAD (nF)
0.1
10
05867-029
0
100
Figure 26. Overshoot vs. Capacitive Load
112
10k
100k
1M
Figure 29. Output Impedance vs. Frequency
100
VS = ±15V
110
VS = ±5V
VIN = 28mV
RL = ∞
CL = 20pF
108
G = +100
10
106
ROUT (Ω)
CMRR (dB)
1k
FREQUENCY (Hz)
05867-032
5
104
102
G = +10
1
G = +1
100
10k
100k
1M
FREQUENCY (Hz)
0.1
10
100
Figure 27. CMRR vs. Frequency
100
VOLTAGE NOISE DENSITY (nV/ Hz)
–PSRR
60
40
+PSRR
20
1k
10k
FREQUENCY (Hz)
100k
1M
05867-031
PSRR (dB)
80
100
10k
100k
1M
Figure 30. Output Impedance vs. Frequency
100
0
10
1k
FREQUENCY (Hz)
Figure 28. PSRR vs. Frequency
VS = ±15V
10
1
0.1
1
10
100
FREQUENCY (Hz)
Figure 31. Voltage Noise Density vs. Frequency
Rev. 0 | Page 10 of 16
1k
05867-034
1k
05867-030
96
100
05867-033
98
OP07D
10
in (pA/ Hz)
1
0.01
0.1
1
10
100
2
05867-035
0.1
VS = ±5V
CL = 1nF
G = +1
VIN = 4V p-p
1k
FREQUENCY (Hz)
05867-039
OUTPUT VOLTAGE (1V/DIV)
VS = ±15V
TIME (100µs/DIV)
Figure 32. Current Noise Density vs. Frequency
Figure 35. Large-Signal Transient
OUTPUT VOLTAGE (100mV/DIV)
400mV
VS = ±5V AND ±15V
CL = 1nF
G = +1
VIN = 100mV p-p
200mV
VIN
VS = ±15V
VIN = 200mV
G = –100
RECOVERY = 1µs
0V
–200mV
0V
2
–5V
VOUT
–10V
05867-040
TIME (100µs/DIV)
05867-036
–15V
–20V
TIME (10µs/DIV)
Figure 33. Small-Signal Transient
Figure 36. Positive Overload Recovery
200mV
VS = ±15V
CL = 1nF
G = +1
VIN = 4V p-p
VIN
VS = ±15V
VIN = 200mV
G = –100
RECOVERY = 5µs
0V
–200mV
15V
2
10V
VOUT
5V
–5V
TIME (100µs/DIV)
TIME (10µs/DIV)
Figure 34. Large-Signal Transient
Figure 37. Negative Overload Recovery
Rev. 0 | Page 11 of 16
05867-041
0V
05867-038
OUTPUT VOLTAGE (1V/DIV)
400mV
OP07D
1200mV
600mV
VIN
VS = ±5V
VIN = 600mV
G = –10
RECOVERY = 2.4µs
VS = ±15V
VN p-p = 0.24µV
VOLTAGE NOISE (0.2µV/DIV)
0V
–600mV
0V
VOUT
–2V
–4V
1
–8V
TIME (4µs/DIV)
TIME (1s/DIV)
Figure 38. Positive Overload Recovery
1200mV
600mV
VIN
0V
05867-045
05867-042
–6V
Figure 41. Voltage Noise (0.1 Hz to 10 Hz)
VS = ±5V
VIN = 600mV
G = –10
RECOVERY = 5.6µs
–600mV
4V
20kΩ
VOUT
–
0V
2
+
05867-043
–2V
–4V
TIME (4µs/DIV)
7
3
+
4
5
OUTPUT
VOS TRIM RANGE IS
TYPICALLY ±3.5mV
V–
Figure 42. Optional Offset Nulling Circuit
Figure 39. Negative Overload Recovery
VIN
VOUT
05867-044
2
TIME (400µs/DIV)
–
8
OP07D
INPUT
VS = ±5V
VIN = ±5.7V
V+
1
Figure 40. No Phase Reversal
Rev. 0 | Page 12 of 16
05867-049
2V
OP07D
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
4.00 (0.1574)
3.80 (0.1497) 1
5
6.20 (0.2440)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
COPLANARITY
SEATING 0.31 (0.0122)
0.10
PLANE
0.50 (0.0196)
× 45°
0.25 (0.0099)
8°
0.25 (0.0098) 0° 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 43. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
0.210
(5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015
(0.38)
MIN
0.015 (0.38)
GAUGE
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.005 (0.13)
MIN
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001-BA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 44. 8-Lead Plastic Dual In-Line Package [PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
Rev. 0 | Page 13 of 16
OP07D
ORDERING GUIDE
Model
OP07DN
OP07DNZ 1
OP07DR
OP07DR-REEL
OP07DR-REEL7
OP07DRZ1
OP07DRZ-REEL1
OP07DRZ-REEL71
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
Z = Pb-free part.
Rev. 0 | Page 14 of 16
Package Option
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
OP07D
NOTES
Rev. 0 | Page 15 of 16
OP07D
Preliminary Technical Data
NOTES
© 2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05867–0–12/05(0)
Rev. 0 | Page 16 of 16