Circuit Simulation
Results in functional parts in early silicon
Can experiment with process that does not exist
or can not be used yet to make parts (Early
design)
Replaces prototyping and bread boarding
Expensive
• 60,000 runs / month at one company
• 1 hour/timepoint for large processor design
• 2000 copies of SPICE in use
• One company has Cray I dedicated
• IBM has three 3090 at Fishkill
• In IBM 1% increase in speed of ASTAP
pays for 1 year of salary
1
Circuit Simulation
Input
C3 3000 0 .. 0010 P
C4 3000 0 .. 0010 P
.. ..
M1 1 1000 1000 0 DMOS W=2u L=2U
Simulation Engine
Solve
dx/dt = f(x)
Numerically
Output Waveforms
2
Program Structure
Input and Setup
Models
Numerical Techniques
• Equation Formulation
• Integration
• Solution of Nonlinear Equations
• Solution of Linear Equations
Output
Types of Analysis
• DC Analysis
• DC Transfer Curves
• Transient Analysis
• AC Analysis Noise, Distortion, Sensitivity
3
SPICE History
(Read Pederson’s paper in the Reader)
1969-70 The CANCER Project (Ron Rohrer and
Class project)
1970-72 CANCER Program (Ron Rohrer and
Larry Nagel)
May 1972 SPICE I released as Public Domain
Program
July 1975 SPICE 2A E. Cohen following Nagel’s
Research
Fall 1975 SPICE 2C
Mid 1976 SPICE 2D New MOS Models
Jan 1979 SPICE 2E Device Levels
Jan 1980 SPICE 2F The “Transportable” SPICE,
New MOS charge models
Sep 1990 SPICE 2G Pivoting
Aug 1982 - Present SPICE 2G
SPICE 3
4
Modeling
Many types of Models for the same thing
e.g. Logic Gate
• Logic or Boolean
• Logic with Delay
• Delay Equations
• Switch Model
• Circuit Model - simple, complex
Trade Off
Information and Accuracy vs. Speed
Modeling Activity
Realization
Physical System
IC Circuit, Power
system, Bio system
Measurements
Modeling
Mathematical Model
Physical Behavior
Comparison
Simulation
5
Simulated Behavior
Formulation of Circuit Equations
• KCL Kirchoff Current Law
• KVL Kirchoff Voltage Law
• Branch Equations
Branch Equations
Mathematical models of circuit components are
expressed in terms of ideal elements --Inductors,
Capacitors, Resistors, Current Sources, Voltage
Sources, Two-ports, .... -- in terms of physical
quantities - current, voltage, charge, flux
Reference Direction
Two-terminal
+
i
v
Two-port
+
v1
i1
-
i1
i2 +
v2
i2 -
i, v are branch currents and voltages respectively
6
Ideal Two-Terminal Elements
Resistors
linear
nonlinear
symbol
i
+ v i
+
-
voltage
controlled
current
controlled
i = (1/R) v
v=Ri
i=i(v)
v=v(i)
v
Capacitor
linear
nonlinear
symbol
q=Cv
i = dq/dt
i = C dv/dt
q = q(v)
i = dq/dt
i = C(v) dv/dt
i
+ v i
+
voltage controlled
-
v
7
Controlled
Sources
VCVS
Voltage
Controlled
Voltage
Source
CCCS
CurrentControlled
Current
Source
symbol
+
ic
vc
+
linear
ik
Ek +
-
vk
-
ic
vc
-
+
ik
Fk
+
vk
-
nonlinear
vk = Ek vc vk=vk(vc)
ic = 0
ic = 0
ik = Fk ic
vc = 0
ik = ik (ic)
vc = 0
Topological Equations
KCL (nodes)
current out of a
node is +
KVL (node voltage)
1
1
2
1
3
1
i1 - i2 - i3 = 0
4
2
2
v1 - e1 + e2 = 0
Advantage: KVL and KCL can be assembled by
the computer directly from input
8
Matrix Form of KVL and KCL
1
R1
R3
+
v3
G2v3
2
R4
IS5
0
i1
i2
1 1 1 0 0
0 0
–1
1
–1
i3
=
0
0
KCL
i4
i5
Ai=0
v1
1 0
0
v2
1 0
0
v3
v4
v5
–
1
e1
–1
e2
0 1
0
–1
=
0
0
0
v - ATe = 0
Telegen i Tv = 0 conservation of energy
9
KVL
Node Branch Incidence Matrix
branches
1 2 3 ..... j .....
n
o
d
e
s
1
2
3
.
.
i
(+1,-1, 0)
+1 if node i is + terminal of branch j
A ij = -1 if node i is - terminal of branch j
0 if node i is not connected to branch j
Properties
• A is unimodular matrix
• 2 nonzero entries in any column
• Singular ATI = 0 where I = [1 1 1 .. 1]T
Thus, designate one or more nodes as ground
nodes
10
Equation Assembly for Linear Circuits
• Sparse Tableau Analysis (STA)
• Modified Nodal Analysis (MNA)
Sparse Tableau (Brayton, Gustavson, Hachtel (1969-71)
• Write KCL:
Ai = 0 n equations for each node
• Write KVL: v – A T i =
0 b equations
• Write Branch Equations:
b equations
Ki i + Kv v = S
current
controlled
sparse
tableau
voltage
controlled
A
0
0
i
0
I
–A T
v
Ki
Kv
0
e
0
=
n + 2b
unknowns
11
0
S

 n + 2b
 equations


n = # nodes
b = # branches
Advantages of STA
• STA can be applied to any circuit
• STA equations can be assembled directly
from input data
• STA coefficient matrix is very sparse
2b
2b
A
0
0
i
0
I
–A T
v
Ki
Kv
0
e
b
0
=
0
S
2b + 2b + b + b + b
nonzeros
∴ sparsity is
7b
(N+2b)2
b
b
Problem:
Sophisticated programming techniques
and data structures are required for time
and memory efficiency
12
Nodal Analysis
(McCalla, Nagel, Rohrer, Ruehli, Ho)
1
R1
R3
+
v3
G2v3
2
R4
IS5
0
(1)
i1 + i2 + i3 = 0
(I)
(2)
-i3 + i4 - i5 = 0
Step 2: Use branch equations to eliminate branch currents from (I)
Step 1: Write KCL
1
R3
1
R3
(1)
------- v1 + G2v3 + ------- v3 = 0
(II)
1
1
– ------- v3 + ------- v4 = IS5
R3
R4
(2)
Step 3: Use KVL to eliminate branch voltages from (II)
1
1
------- e1 + G2 ( e1 – e2 ) + ------- ( e1 – e2 ) = 0 (1)
R1
R3
1
R3
1
R4
– ------- ( e1 – e2 ) + ------- e2 = IS5
(2)
Matrix Form
1
R3
1
R1
------ + G2 + -----1
R3
– ------
1
R3
– G2 – -----1
1
------ + -----R4 R 3
Yn e = IS
13
e1
e2
=
0
IS5
(III)
Y n and IS can be assembled directly from input
data
Resistors
N+
SPICE Input Format
Rk N+
N- Rkvalue
Resistor “Stamp”
Rk
N-
N+ . . . NN+
. .
. .
. .
N-
1/Rk
-1/Rk
-1/Rk
1/Rk
.
.
.
VCCS
Gk
N+
N- NC+ NC- Gkvalue
NC+ . . . NC-
Vc+
Vc-
+
Vc
-
N+
N-
N+
. .
. .
. .
N-
Gk
-Gk
-Gk
Gk
VCCS “Stamp”
14
.
.
.
Independent Current Sources
Ik N+ N- Ikvalue
N+
N-
.
.
+
-Ik
.
. =
-
N+
Ik
N-
+Ik
Advantages:
• Circuit equations can be assembled by
inspection
• Yn is sparse (not as sparse as STA) and
small (n x n) -smaller than STA (n+2b x n+2b)
• Yn has non-zero diagonal entries and is often
diagonally dominant
Problem:
Nodal Analysis cannot handle
1. Floating (not connected to ground) independent voltages
2. VCVS
3. CCCS
(VCCS ok)
4. CCVS
15
Modified Nodal Analysis (MNA)
R3
1
+
R1
v3
2
-+
R4
ES6
3
IS5
R8
G2v3
0
- +
4
E7v3
Step 1: Write KCL
i1 + i2 + i3 = 0
– i3 + i4 – i5 – i6 = 0
i6 + i8 = 0
i7 – i8 = 0
(1)
(2)
(3)
(4)
Step 2: Use branch equations to eliminate as
many branch currents as possible
1
1
R1
R3
1
1
– ------- v3 + ------- v4 – i6 = IS5
R3
R4
1
i6 + ------- v8 = 0
R8
1
i7 – ------- v8 = 0
R8
------- v1 + G2v3 + ------- v3 = 0
(1)
(2)
(3)
(4)
Step 3: Write down unused branch equations
(b6)
v6 = ES6
(b7)
v7 – E7v3 = 0
16
Step 4: Use KVL to eliminate branch voltages from
previous equations
(1)
1
1
------- e1 + G2 ( e1 – e2 ) + ------- ( e1 – e2 ) = 0
R1
R3
(2)
1
1
– ------- ( e1 – e2 ) + ------- e2 – i6 = IS5
R3
R4
(3)
1
i6 + ------- ( e3 – e4 ) = 0
R8
(4)
1
i7 – ------- ( e3 – e4 ) = 0
R8
( e3 – e2 ) = ES6
(b6)
(b7)
e4 – E7 ( e1 – e2 ) = 0
1
R1
1
– -----R3
1
R3
1
1
------ + -----R3 R4
0
0
1
R3
------ + G2 + ------ – G2 + ------
0
0
E7
0
0
0
0 0
–1 0
0
e1
0
e2
IS5
0
0
1
1
------ – ------ 1 0 e3 =
R8
R8
1
1
– ------ ------ 0 1
R8 R8
1
0
0 0
0
–1
– E7
–1
0
e4
i6
i7
ES6
0
0 0
node voltages
Yn
B
e
C
0
i
17
= MS
solve for some branch
currents
MNA Matrix and MS can be assembled directly
from the input by inspection
Floating voltage source:
ik N+
+
-
SPICE: ESK N+ N- EK
“Stamp”
N+ N- ik
N+ 0
N- 0
branch k 1
RHS
0
1
0
-1
0
0
-1
0
Ek
Ek
N-
CCVS:
SPICE: FSK
N+ N- NC+ NC- F K
“Stamp”
N+ N- NC+ NC- ik
N+
1
N-
-1
NC+
ij
-1
-1
-Fk
1
N+
ik
1
NC+
NCbranch k 1
branch j
ij
-1
18
NC-
+
N-
Fkij
General Rules for MNA
1. A branch current is always introduced as an
additional variable for a voltage source or an
inductor.
2. For current sources, resistors, conductances
and capacitors, the branch current is introduced only if
• any circuit element depends on that
branch current
• the branch current is requested as an
output
CCCS:
NC+
NC-
N+ N- NC+ NC- ij
N+
Ej
ik
ij
N+
Ejij
N-
N-
-Ej
NC+
NC-
1
branch j
19
-1
1
-1
Example 4.4.1
Write the modified modal formulation for the
following network by inspection.
1
2
 G2
− G
 2



 1


− G2
3
I1 I7
1
G2 + G3 + sC4
− G3
− G3
− sC4
G3 + sC5
VVT
Voltage Source
4
− sC 4
sC 4
−µ
1





1



V1   0 
   
V2   0 
V3   0 
 = 
V4   0 
V5   E1 
   
V6   0 
Advantages of MNA
1. MNA can be applied to any circuit
2. MNA equations can be assembled “directly”
(e.g. from SPICE input deck) from input
data
3. MNA matrix is close to Yn
Problem:
Sometimes we have zeros on the main diagonal and principle minors may be singular.
20
n
Matlab reading of text file
Suppose the text file mydata.dat contains data in the following form:
n
Sally Type1 12.34 45 Yes
n
Joe
Type2 23.54 60 No
n
Bill
Type1 34.90 12 No
n
This could be read using the following command
n
[names,types,x,y,answer] = textread('mydata.dat','%s %s %f %d %s');
n
n
Read file as a fixed format file while skipping the doubles
[names,types,y,answer] = textread('mydata.dat','%9c %5s %*f %2d %3s');
n
Read file and match Type literal
[names,typenum,x,y,answer]=textread('mydata.dat','%s Type%d %f %d %s');
n
Read m-file into cell array of strings
n
file = textread('fft.m','%s','delimiter','\n','whitespace','');
Analysis of Networks with VVT’s &
Op Amps
For use with special programming technique
or hand calculations
Symbol for amplifier and its VVT equivalent
We can reduce size of matrix equations by
preprocessing steps. Assume that one terminal
of each voltage source is grounded.
Write KCL equations for nodes not connected
to independent or dependent voltage sources
only.
Example 4.5.2.
Consider the network discussed in the
previous example. Nodes 2 & 3 are not
connected to voltage sources.
KCL at node 2:
(G2 + G3 + sC 4 ) V2 − G3V3 − sC 4 µV3 = G2 E1
KCL at node 3:
− G3V2 + (G3 + sC5 ) V3 = 0
Or in the matrix form:
G2 + G3 + sC4 − (G3V3 + sC4 µ)  V2  G2 E1 

 V  =  0 
−
G
G
+
sC


3
3
5
 3 
For Op Amps: write equal voltages at the input
terminals (if one is grounded both are equal
zero). Do not write KCL equations at the
output node of Op Amps.
Example 4.4.5. Analyze the network shown in
Fig.
Nonzero voltages are V4 , V5 , Vout & E
Since we do not write KCL equations at the
output nodes of Op Amps, we have for nodes
1, 2 & 3
Node (1)
Node (2)
Node (3)
− (G1 + sC1 )V4 − G3Vout = EG4
− G2V4 − sG2V5 = 0
− G5V5 − G6Vout = 0
Or in the matrix form
0
− G3   V4   EG4 
− (G1 + sC1)
 −G
− sC2
0   V5  =  0 
2


 


0
− G5 − G6  Vout   0 
Network Scaling
Typical design deals with network elements
having resistivity from ohms to mega ohms,
capacitance from fF to mF, inductance from
mH to H within the frequency range 102 to
109 Hz. Network analysis with such values
will cause large numerical errors.
Example:
Consider numerical evaluation of function
derivative.
f ( x0 + ∆x ) − f ( x 0 )
f ( x0 ) =
∆x
'
Assume that we are using a computer with 6
digit accuracy. Let f(x0)=1 and
f(x+∆x)=1.0000086 with ∆x=10-5 -the exact
value of derivative should be f’(x0)=0.86
But due to the rundoff errors
f(x+∆x)=1.00001 and f’(x0)=1 which is 16%
error.
Parameter and frequency scaling is used to
bring network impedances close to unit
values.
Impedance scaling
Design values have subscript d and scaled
values have subscript s. In impedance
scaling with scaling factor k we get.
Rd
,
k
1
Zcd
=
Zcs =
k
ksCd
Rs =
Z Ls =
Z Ld sLd
=
k
k
⇔ Cs = kCd ,
⇔
Ls =
Ld
,
k
Frequency scaling
In frequency scaling with the scaling factor
ω0 we have
ω=
Zc =
ω
ω0
,
1
1
1
=
=
jωCd jω sω 0 Cd jω s Cs
Z L = jωLd = jω sω 0 Ld = jω s Ls
⇔ Cs = ω 0 Cd ,
⇔ Ls = ω 0 Ld ,
Combining impedance and frequency
scaling we have
Rd
Rs =
'
k
Ldω 0
Ls =
'
k
Cs = Cdω 0 k.