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CSE 675.02: Introduction to Computer Architecture Arithmetic / Logic Unit – ALU Design Presentation F Slides by Gojko Babi Reading Assignment: B5, 3.4 32-bit ALU ALU Control A 32 32-bit ALU B 32 Result Zero Overflow Carry out 32 • Our ALU should be able to perform functions: – logical and function – logical or function – arithmetic add function – arithmetic subtract function – arithmetic slt (set-less-then) function – logical nor function • ALU control lines define a function to be performed on A and B. g. babic Presentation F 2 1 Functioning of 32-bit ALU ALU Control ALU Control lines Function Ainvert Binvert and 0 0 00 or 0 0 01 add 0 0 10 subtract 0 1 10 slt 0 1 11 nor 1 1 00 4 Operation A 32 32-bit ALU B 32 Result Zero Overflow Carry out 32 • Result lines provide result of the chosen function applied to values of A and B • Since this ALU operates on 32-bit operands, it is called 32-bit ALU • Zero output indicates if all Result lines have value 0 • Overflow indicates integer overflow of add and subtract functions; for unsigned integers, this overflow indicator does not provide any useful information • Carry out indicates carry out and unsigned integer overflow g. babic Presentation F 3 Designing 32-bit ALU: Beginning 1. Let us start with and function 2. Let us now add or function Operation = 0 and = 1 or a0 b0 Result0 0 1 a1 b1 0 Result1 1 a2 b2 0 Result2 1 a31 b31 0 Result31 1 g. babic 4 2 Designing 32-bit ALU: Principles Operation = 0 and • A number of functions are performed internally, but only one a0 result is chosen for b0 the output of ALU = 1 or and or a1 • 32-bit ALU is built out of 32 identical 1-bit ALU’s 1 and b1 or a2 Result1 0 1 and b2 or a31 Result0 0 Result2 0 1 and b31 or Result31 0 1 g. babic 5 Designing the Adder • 32-bit adder is built out of 32 1-bit adders 1-bit Adder 1-bit Adder Truth Table Input b Carry In Sum Carry Out 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Figure B.5.2 From the truth table and after minimization, we can have this design for CarryOut Figure B.5.5 g. babic Output a Figure B.5.3 Presentation F 6 3 32-bit Adder “0” Cin a0 sum0 + b0 Cout This is a ripple carry adder. Cin a1 sum1 + b1 Cout Cin a2 sum2 + b2 The key to speeding up addition is determining carry out in the higher order bits sooner. Result: Carry look-ahead adder. Cout Cin a31 sum31 + b31 Cout Carry out g. babic Presentation F 7 32-bit ALU With 3 Functions =0 1-bit ALU Operation = 00 and = 01 or = 10 add Figure B.5.6 Figure B.5.7 CarryOut g. babic Presentation F + carry out 8 4 32-bit Subtractor “0” “1” Cin a0 Result0 + b0 =A+B+1 Cout Cin a1 Result1 + b1 A – B = A + (–B) Cout Cin a2 Result2 + b2 Cout Cin a31 Result31 + b31 Cout CarryOut g. babic Presentation F 9 32-bit Adder / Subtractor binvert Cin a0 b0 “0” 0 Result0 + Cout 1 Cin a1 b1 0 Result1 + Cout 1 Cin a2 b2 0 Result2 + Binvert = 0 addition = 1 subtraction Cout 1 Cin a31 b31 0 1 g. babic Result31 + Cout 0 1 CarryOut 10 5 32-bit ALU With 4 Functions 1-bit ALU B in ve rt B in v e r t O p e r a tio n O pe ra tion C a r r y In a0 b0 a C a rryI n ALU0 R e s u l t0 0 C a rryO u t 1 0 b R e s u lt a1 b1 2 1 Figure B.5.8 a2 b2 Control lines Binvert (1 line) Operation (2 lines) and 0 00 or 0 01 add 0 10 subtract 1 10 R e s u l t1 C a rryO u t C a r ry O u t Function C a rryI n ALU1 C a rryI n ALU2 R e s u l t2 C a rryO u t C a rr y In a3 1 b3 1 g. babic R e s u l t3 1 C a rryI n A L U 31 Presentation F 0 Carry Out 1 11 2’s Complement Overflow • 2’s complement overflow happens: – if a sum of two positive numbers results in a negative number – if a sum of two negative numbers results in a positive number B in v e r t O p e r a tio n C a r ry In a 0 1 R e s u lt b 0 + 2 1 L e ss 3 Carry Out O v e r f lo w d e te c tio n O v e rflo w 1-bit ALU for the most significant bit Other 1-bit ALUs, i.e. non-most significant bit ALUs, are not affected. g. babic Presentation F 12 6 32-bit ALU With 4 Functions and Overflow B in v e r t O p e r a tio n a0 b0 C a rryI n ALU0 R e s u l t0 C a rryO u t Control lines Binvert (1 line) Operation (2 lines) and 0 00 Function or 0 01 add 0 10 subtract 1 10 a1 b1 C a rryI n ALU1 R e s u l t1 C a rryO u t a2 b2 C a rryI n ALU2 R e s u l t2 C a rryO u t C a rr y In a3 1 b3 1 Missing: slt & nor functions and Zero output C a rryI n A L U 31 R e s u l t3 1 O v e r flo w Carry Out g. babic Presentation F 7