Electrical Power and Energy Systems 33 (2011) 1326–1335
Contents lists available at ScienceDirect
Electrical Power and Energy Systems
journal homepage: www.elsevier.com/locate/ijepes
Distribution systems fault analysis considering fault resistance estimation
André D. Filomena a,d,⇑, Mariana Resener b, Rodrigo H. Salim c, Arturo S. Bretas d
a
Companhia Estadual de Geração e Transmissão de Energia Elétrica (CEEE-GT), Av. Joaquim Porto Villanova 201, Porto Alegre, Brazil
Companhia Estadual de Distribuição de Energia Elétrica (CEEE-D), Av. Joaquim Porto Villanova 201, Porto Alegre, Brazil
c
Electrical Engineering Department, University of São Paulo (USP), Av. Trabalhador São Carlense 400, São Carlos, Brazil
d
Electrical Engineering Department, Federal University of Rio Grande do Sul (UFRGS), Av. Osvaldo Aranha 103, Porto Alegre, Brazil
b
a r t i c l e
i n f o
Article history:
Received 18 April 2009
Received in revised form 7 February 2011
Accepted 1 June 2011
Available online 5 July 2011
Keywords:
Bus impedance matrix
Power distribution systems
Fault analysis
Fault resistance
Power systems protection
a b s t r a c t
Fault resistance is a critical component of electric power systems operation due to its stochastic nature. If
not considered, this parameter may interfere in fault analysis studies. This paper presents an iterative
fault analysis algorithm for unbalanced three-phase distribution systems that considers a fault resistance
estimate. The proposed algorithm is composed by two sub-routines, namely the fault resistance and the
bus impedance. The fault resistance sub-routine, based on local fault records, estimates the fault resistance. The bus impedance sub-routine, based on the previously estimated fault resistance, estimates
the system voltages and currents. Numeric simulations on the IEEE 37-bus distribution system demonstrate the algorithm’s robustness and potential for offline applications, providing additional fault information to Distribution Operation Centers and enhancing the system restoration process.
Ó 2011 Elsevier Ltd. All rights reserved.
1. Introduction
Electric power systems are daily exposed to service interruption
mainly due to faults and human accidental interference. A power
system fault is defined as any failure which interferes with the
normal current flow [1]. The fault phenomenon affects system’s
reliability, security, and energy quality, and can be considered
stochastic. Different events such as lightning, insulation breakdown and trees falling across lines are common overhead power
system fault causes.
Power system faults may be classified as temporary or permanent. Temporary faults in overhead lines are usually caused by
lightning. In this case, system service can be automatically restored
after approximately 20 fundamental frequency cycles, with the circuit breakers opened, to allow deionization. However, permanent
faults are associated with different events, like trees falling across
lines. On these situations, system restoration is maintenance crew
dependant. Facility maintenance crew must search and repair the
system using a fault location estimate. For non-negligible fault
resistances (RF), which are commonly associated with permanent
faults, standard fault location algorithms may present poor performance [2,3].
⇑ Corresponding author at: Companhia Estadual de Geração e Transmissão de
Energia Elétrica (CEEE-GT), Av. Joaquim Porto Villanova 201, Porto Alegre, Brazil.
Tel.: +55 51 33825220; fax: +55 51 33824349.
E-mail addresses: afilomena@ece.ufrgs.br (A.D. Filomena), mariana@ece.ufrgs.br
(M. Resener), rhsalim@usp.br (R.H. Salim), abretas@ece.ufrgs.br (A.S. Bretas).
0142-0615/$ - see front matter Ó 2011 Elsevier Ltd. All rights reserved.
doi:10.1016/j.ijepes.2011.06.010
Fault analysis methods are an important tool used by protection
engineers to estimate power system currents and voltages during
disturbances. It provides information for protection system setting,
coordination and efficiency analysis studies. Today, three
approaches are used in the industry for such analysis: classical
symmetrical components, phase variable approach and complete
time-domain simulations [4]. Classical fault analysis of unbalanced
power systems is based on symmetrical components approach
[5,6]. However, in untransposed feeders with single-phase or double-phase laterals, the symmetrical component methods do not
consider accurately these specific characteristics [7]. Hence, symmetrical components based techniques may not provide accurate
results for power distribution systems, which are normally characterized by those asymmetries.
With industrial computer facilities improvement, the fault analysis phase variable approach has been proposed to substitute the
symmetrical components methods on distribution systems [8]. In
the phase variable approach, system voltages and currents are related through impedance and admittance matrices based on phase
frame representation, considering the typical distribution systems
asymmetries.
However, fault analysis is still fault resistance dependant [9].
Due to fault resistance stochastic nature, typical fault analysis
studies consider the fault paths as an ideal short-circuit. To overcome this limitation, recent studies suggest the usage of fault resistance estimation algorithms [10–12]. These works provide a fault
resistance estimate using symmetrical components or modal analysis techniques, restricting the application on balanced systems
1327
A.D. Filomena et al. / Electrical Power and Energy Systems 33 (2011) 1326–1335
with equally transposed lines. The usage of artificial intelligence
has also been recently proposed in order to overcome the fault
resistance effects in classical power system protection [13] and
fault location [14] applications.
Considering the above mentioned limitations of state-of-the-art
fault analysis methods, this paper proposes an iterative fault analysis algorithm that considers typical distribution systems characteristics, and a fault resistance estimate. The proposed fault
analysis algorithm is composed by two sub-routines, namely the
fault resistance and the bus impedance sub-routines. The fault
resistance sub-routine is based on an iterative formulation executed to estimate the fault resistance through one-terminal fault
records. The bus impedance sub-routine considers the estimated
fault resistance values, and uses a bus impedance matrix based formulation to estimate the fault system voltages and currents.
In order to validate the proposed fault analysis algorithm, the
formulation was implemented in MATLABÒ [15] and had its performance evaluated using a modified IEEE 37 Node Test Feeder [16],
simulated under BPA’s ATP/EMTP software [17].
The remaining of this paper is organized as follows. The second
section presents the fault resistance sub-routine. Section 3 describes the bus impedance sub-routine. A case study is presented
in Section 4. Finally, Sections 5 and 6 discuss the results and conclusions obtained from this work.
2. Fault resistance sub-routine
Fault resistance represents the fault impedance path between
phase or ground faults [18]. The proposed fault resistance sub-routine uses as input data, the sending-end voltages and currents. In
the following subsections the fault resistance sub-routine is
presented.
V Sfp ¼ V Fp þ x ðzpa ISfa þ zpb ISfb þ zpc ISfc Þ
where
V Fp ¼ Z F IFp
2
3
2
V Sfa
zaa
6
7
6
4 V Sfb 5 ¼ x 4 zba
V Sfc
zca
zab
zbb
zcb
3 2
3
2
3
ISfa
V Fa
7 6
7 6
7
zbc 5 4 ISfb 5 þ 4 V Fb 5
ISfc
zcc
V Fc
zac
ð1Þ
where VSfm is the phase m sending-end voltage (V); x the distance
between the sending-end and the fault location (m); zmm the phase
m line self impedance (X/m); zmn the mutual impedance between
phases m and n (X/m); ISfm the phase m sending-end current (A);
VFm the phase m fault location voltage (V); m, n is the phases a, b,
or c.
For the single line-to-ground fault (SLG) illustrated in Fig. 1, the
faulted phase sending-end voltage from (1) can be expanded to (2):
ð3Þ
whereas ZF is the fault impedance between line-to-ground, the subscript p represents the faulted phase, and IFp is the phase p fault
current.
Considering the fault impedance strictly resistive and constant,
(2) may be expanded into its real and imaginary parts:
"
V SfpðrÞ
#
"
¼
V SfpðiÞ
M 1p
IF pðrÞ
M 2p
IF pðiÞ
# x
RF
ð4Þ
where the subscripts r and i represent the real and imaginary components, RF is the fault resistance, and:
X
M 1p ¼
½zpkðrÞ ISfkðrÞ zpkðiÞ ISfkðiÞ ð5Þ
½zpkðrÞ ISfkðiÞ þ zpkðiÞ ISfkðrÞ ð6Þ
k¼fa;b;cg
X
M 2p ¼
k¼fa;b;cg
where zpk is the mutual impedance between the faulted phase p and
non-faulted phase k (X/m).
Evaluating (4), the fault distance and resistance may be calculated as function of the sending-end voltages and currents, as well
as the line parameters, as given by (7):
x
¼
RF
M1p IF pðiÞ
1
M 2p IF pðrÞ
"
IF pðiÞ
M2p
IF pðrÞ
M 1p
# "
V SfpðrÞ
V SfpðiÞ
#
ð7Þ
From (7), fault resistance and distance independent mathematical expressions for single line-to-ground faults are obtained, given
by (8) and (9), respectively:
2.1. Mathematical development
Referring to the power system of Fig. 1, the sending-end voltages are given by (1), which describes the steady-state fault
conditions:
ð2Þ
x¼
V SfpðrÞ IF pðiÞ V SfpðiÞ IF pðrÞ
RF ¼
M 1p IF pðiÞ M 2p IF pðrÞ
M 1p V SfpðiÞ M 2p V SfpðrÞ
M 1p IF pðiÞ M 2p IF pðrÞ
ð8Þ
ð9Þ
As a result of the procedure described above, the fault distance
and resistance may be estimated. To obtain such estimates, the
system parameters, sending-end voltages and currents should be
known. The fault current is the only unknown variable on such
expressions and is calculated by an iterative procedure, as presented in the following.
2.2. Fault current estimation
Referring to Fig. 1, the fault current (IFp) may be estimated
through the difference between the load current and the sending-end current, as given by (10):
½IF ¼ ½ISf ½IL ð10Þ
where [ISf] is the sending-end three-phase current vector; [IL] is the
three-phase load current vector.
Considering the fault period load current different from the prefault load current, due to system dynamics, an iterative formulation is developed to estimate the first [19], as follows:
Fig. 1. Single line-to-ground fault.
(I) Fault period load current is initially considered equal to the
pre-fault load current.
(II) Fault current is calculated using (10).
(III) Fault location and resistance are determined by (8) and (9),
respectively.
(IV) Fault location voltages are estimated through (11):
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2
V Fa
3
2
V Sfa
3
2
zaa
6
7 6
7
6
4 V F b 5 ¼ 4 V Sfb 5 x 4 zba
V Sfc
V Fc
zca
zab
zbb
zcb
zac
3 2
ISfa
3
7 6
7
zbc 5 4 ISfb 5
ISfc
zcc
ð11Þ
(V) An equivalent admittance matrix between the load and the
line impedance between the fault location and the receiving-end is calculated by (12):
½Y L ¼ ½ðL xÞ ½Z þ ½Z L 1
ð12Þ
where [Z] is the line impedance matrix per unit length, [ZL] is
the load impedance matrix, and L is the line length.
(VI) The three-phase load current vector is updated using the
equivalent admittance matrix obtained by (12) and the fault
location voltages:
½IL ¼ ½Y L ½V F ð13Þ
(VI) The algorithm verifies if the fault resistance and distance
have converged, using (14) and (15):
jRF ðnÞ RF ðn 1Þj < d1
ð14Þ
jxðnÞ xðn 1Þj < d2
ð15Þ
where n is the iteration number and d1,2 are the error tolerances, which are previously defined according to the accuracy
and computational time desired. In this work, d1 and d2 have
been considered equal to 1 107 and 1 104, respectively.
(VI) If the fault resistance and distance have converged, stop the
iterative procedure, otherwise return to step II.
From the iterative formulation presented in this section,
fault resistance and distance can be considered as outputs.
Thus, the fault distance can also be used as a fault location
estimate. However, as typical impedance-based fault location techniques, for higher fault resistance values the fault
distance estimate may be inaccurate [19]. An additive error
in the fault current estimate provides a much higher negative effect in the fault distance estimate than in the fault
resistance one [19].
2.3. Distribution systems laterals
Power distribution feeders are typically radial networks composed by a main feeder, laterals, and sub-laterals. The faulted
branch identification is a research field still under development,
which exceeds the scope of this paper. The proposed fault analysis
algorithm considers the faulted lateral to be previously known
data. The extension of the proposed fault resistance sub-routine
for systems with laterals, however, is still necessary. To obtain such
extension, the proposed method obtains equivalent networks associated with each one of the system’s laterals.
In this work, each system lateral is replaced by an equivalent
network that is represented as a three-phase constant impedance
matrix. Thus, each system lateral can be represented by a tapped
off equivalent network. Considering a distribution system with n
laterals, n different equivalent networks are obtained, one for each
lateral. These equivalents are obtained considering the systems
pre-fault steady state operating conditions.
The lateral equivalents are calculated through a technique
based on [20]. It uses estimated voltages and currents at each
bus, considering several different systems conditions. The load
impedance, however, must be maintained constant during the
analysis. Hence, in this work, loads are represented as constant
impedances. As opposed to [20], three-phase power flow analyses
(PFA) are used to determine the equivalents. By the use of this approach, all equivalent networks are determined, and the system is
reduced to the main path between the substation and the faulted
section’s downstream bus. The steps to obtain such equivalent networks are detailed in the following:
(I) Three different power flow analyses, such as described in
[20], are executed. In each one of the PFA, consider different
voltage conditions at the substation, in order to obtain different operating points of the system. The system loading
must be held constant in the three PFA. The different operating points are given by the different voltage conditions at the
substation terminals. Initially is considered a balanced voltage condition at the substation terminals, as given by (16):
½V S ¼ ½jV S j\0
jV S j\120 T
jV S j\ 120
ð16Þ
The first PFA considers the balanced voltage condition, as given by
(16). The other two PFA are executed considering slightly different
voltage conditions, which should be unbalanced in order to avoid
linearly dependent results. The voltage conditions considered in
the subsequent PFA can be described by (17):
½V Sk ¼ jV S j ð1 þ bk Þ
ð17Þ
where bk is a voltage deviation per unit value, which can be either a
positive or a negative value. Its value should be small, such as
0.01 p.u., and different for each phase k. This avoids convergence
problems in the power flow algorithm. The voltage angles, however,
are kept constant.
(II) Calculate the equivalent impedances for each phase, from
each node p to its adjacent nodes q, using (18):
2
½Z t pq
3
Z ta
6
7
¼ 4 Z tb 5
Z tc
pq
2
I b1
I a1
6
¼ 4 I a2
I a3
I b2
I b3
I c1
31 2
I c2 7
5
I c3
pq
V t1
3
6
7
4 V t2 5
V t3 p
ð18Þ
for t = {a, b, c}, where the subscripts {1, 2, 3} represent the index of
the three different PFA; and p, q is the adjacent nodes; Zmn the
impedance between phases m and n; V the resulting voltage from
PFA; I is the resulting current from PFA.
(II) Determine a three-phase equivalent matrix, [Zeq]pq, for each
lateral that starts with a section connecting the adjacent
nodes p and q, using the vectors defined on (18), applied in
(19):
½Z eq pq ¼ ½½Z a pq
½Z b pq
½Z c pq T
ð19Þ
The algorithm considers initially the voltages and currents measured at the substation terminal. With the previously known information of the faulted section and the equivalent laterals, it is
possible to calculate the voltages and currents at all nodes upstream to the faulted section.
Since voltages and currents are measured only at the substation
terminals, voltages and currents at the downstream bus (k + 1) are
estimated by (20) and (21), respectively:
½V kþ1 ¼ ½V k ½Z k ½Ik n
X
½Ikm ½ILk ½Ikþ1 ¼
ð20Þ
ð21Þ
m¼1
m–kþ1
where [Zk] is the line impedance matrix between buses k and k + 1;
[Ik] the three-phase current vector between buses k and k + 1; [Ik-m]
the three-phase current vector between buses k and m; n is the total
system bus number.
Considering a constant impedance load model, the local bus
load current (ILk) is calculated through (22):
½ILk ¼ ½V k ½Z Lk 1
ð22Þ
where [ZLk] is the bus k load impedance matrix.
The voltages and currents are updated until the first node upstream to the faulted section. These values are used for the fault
resistance estimation procedure previously described.
A.D. Filomena et al. / Electrical Power and Energy Systems 33 (2011) 1326–1335
1329
2.4. Fault type extension
Sections 2.1–2.3 presented a fault resistance sub-routine for
SLG faults. The technique may be extended to all remaining faults
types through specific equations. For each fault type, the fault
resistance sub-routine remains the same as presented previously.
However, the fault resistance and distance equations (8) and (9),
respectively, are replaced by the specific expressions for each fault
type, as follows.
2.4.1. Line-to-line fault
Consider a line-to-line fault (L–L), as illustrated in Fig. 2. Following the same procedure presented in Section 2.1, a new set of
expressions is obtained for fault location and resistance, given in
a matrix form by (23):
x
"
¼
RF
M3
IF pðrÞ
M4
IF pðiÞ
#1 "
V SfpðrÞ V SfqðrÞ
Fig. 3. Double line-to-ground fault.
#
ð23Þ
V SfpðiÞ V SfqðiÞ
where
M3 ¼
X
½ðzpkðrÞ zqkðrÞ ÞISfkðrÞ ðzpkðiÞ zqkðiÞ ÞISfkðiÞ ð24Þ
½ðzpkðrÞ zqkðrÞ ÞISfkðiÞ þ ðzpkðiÞ zqkðiÞ ÞISfkðrÞ ð25Þ
k¼fa;b;cg
M4 ¼
X
k¼fa;b;cg
zpm is the mutual impedance between phases p and m (X/m); zqm
the mutual impedance between phases q and m (X/m); m the
phases a, b, and c; p, q is the faulted phases a, b, or c.
2.4.2. Double line-to-ground fault
A double line-to-ground fault (DLG) is illustrated in Fig. 3. The
mathematical expressions for this fault type are given by:
2
3
2
31 2
V SfpðrÞ
3
M 1p
IF pðrÞ
0
IF pðrÞ þ IF qðrÞ
6 RF
6 p
6
4 RF q
7 6 M2
7 6 p
7¼6
5 4 M 1q
IF pðiÞ
0
0
IF qðrÞ
6
7
IF pðiÞ þ IF qðiÞ 7
7 6 V SfpðiÞ 7
7 6
7
IF pðrÞ þ IF qðrÞ 5 4 V SfqðrÞ 5
RF pq
M 2q
0
IF qðiÞ
IF pðiÞ þ IF qðiÞ
x
ð26Þ
V SfqðiÞ
Fig. 4. Three-phase fault.
Finally, from (9), (23), (26), and (27) it is possible to estimate all
fault resistances for any fault type. Based on these estimated values, the bus impedance sub-routine can be developed, as presented
in the following.
where M1 and M2 are given by (5) and (6).
3. Bus impedance sub-routine
2.4.3. Three-phase fault
For the three-phase fault (3PH), which is illustrated in Fig. 4, the
expressions for the fault distance and the three fault resistances
are given by (27):
Power distribution systems are typically unbalanced, with
untransposed feeders and single-phase loads. In these conditions,
the bus impedance matrix technique is the most suitable choice
available for fault system voltages and currents state estimation.
Using this method it is possible to analyze any fault type by modifying the phase coordinate base-case impedance matrix, considering the system’s asymmetries. The bus impedance sub-routine,
which was initially proposed in [7], is described in the following
subsections.
3 2
M 1a
x
6 R 7 6 M2
Fa
7 6 a
6
7¼6
6
4 RFb 5 4 M1b
2
RF c
M 1c
IF aðrÞ
31 2
0
0
IF aðiÞ
0
0
IF bðrÞ
0 7
7
7
0 5
0
0
IF cðrÞ
3
V SfaðrÞ
6 V Sf 7
6 aðiÞ 7
6
7
4 V SfbðrÞ 5
V SfcðiÞ
where M1 and M2 are given by (5) and (6).
ð27Þ
3.1. Bus impedance matrix
Three-phase admittance matrix Ybus is calculated from the
three-phase sub-matrices feeder’s components. The diagonal submatrix of a hypothetical bus p is calculated through (28), which
represents the sum of all sub-matrices representing the M elements adjacent to bus p.
½Y abc p;p ¼
M h
i
X
Y~ abc
i¼1
i;p
ð28Þ
The off-diagonal sub-matrices are obtained from (29), where
~ abc is the admittance matrix element between buses p and j.
½Y
p;j
h
i
½Y abc p;j ¼ Y~ abc
Fig. 2. Line-to-line fault.
p;j
ð29Þ
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A.D. Filomena et al. / Electrical Power and Energy Systems 33 (2011) 1326–1335
From (28) and (29), 3n 3n three-phase admittance and
impedance matrices are built, as presented in (30) and (31),
respectively.
2
½Y abc 1;1
6 ½Y 6 abc 2;1
6
½Y bus ¼ 6
..
6
.
4
½Y abc n;1
½Y abc 1;2
½Y abc 2;2
..
.
½Y abc n;2
½Y abc 1;n
3
½Y abc 2;n 7
7
7
7
..
7
.
5
½Y abc n;n
½Z bus ¼ ½Y bus 1
ð30Þ
ð31Þ
3.2. Pre-fault state calculation
The bus impedance sub-routine uses a ladder based three-phase
load flow technique [21], considering the non-linear characteristics
of the feeder to estimate the pre-fault voltages on each bus. For the
estimated voltages convergence analysis, the three-phase load flow
also considers the pre-fault voltages measured at the substation on
each fault record and compares to the calculated voltages at the
substation bus.
3.3. Fault calculation
ð36Þ
Finally, from the three-phase bus voltages and the admittance matrix, it is possible to calculate the three-phase currents during the
fault period at each feeder (Igh):
3.3.1. Single line-to-ground fault
For a single line-to-ground fault, Zbus must be modified to include the fault resistance of the path between the faulted line
and ground. The fault resistance is included in the bus impedance
matrix through a fault node r. As result, a new impedance matrix
Znew of dimension (3n + 3) (3n + 3) is obtained. For a SLG fault,
the fault current may be calculated using (32):
ð37Þ
where [Yabc]g,h is the admittance matrix between buses g and h;
[VFg] the bus g three-phase voltage vector; [VFh] is the bus h
three-phase voltage vector.
where g, h = 1 ? (n + 1), in which n is the total bus number.
3.3.2. Line-to-line fault
A similar procedure may be applied for line-to-line faults,
where Zbus must be modified to include the fault resistance
between the two faulted nodes (r and s), as given by (38) and (39)
Z new ðr; rÞ ¼ Z bus ðr; rÞ þ 0:5RF
ð38Þ
Z new ðs; sÞ ¼ Z bus ðs; sÞ þ 0:5RF
ð39Þ
where RF is the fault resistance estimated by (23).
From the modified impedance matrix, it is possible to determine the relation between the fault voltages and currents:
The bus impedance sub-routine is based on the superposition
technique. The fault condition is simulated by two voltages sources
series connected. The first voltage source represents the pre-fault
voltage, whereas the second source is defined to satisfy each fault
type boundary condition.
For each fault type, a different bus impedance matrix (Zbus)
modification must be developed to include the fault resistance
estimate, calculated by the fault resistance algorithm presented
in Section 2. The Zbus modifications for each fault type are presented in the following.
V Fr
¼
V Fs
IFr
Z new ðs; sÞ
IFr
Z new ðr; rÞ Z new ðr; sÞ
Z new ðs; rÞ
ð40Þ
Manipulating algebraically (40), the fault current for a line-toline fault can be calculated using (41):
IFq ¼
V PF r V PF s
Z new ðr; rÞ Z new ðr; sÞ þ Z new ðs; sÞ
ð41Þ
where VPFr and VPFs are the nodes r and s pre-fault voltages.
With the estimated fault current, the superimposed voltages are
calculated though (42):
3
3
2
DV 1
0
6 . 7
6 .. 7
6 .. 7
6 . 7
7
7
6
6
7
7
6
6
6 DV r 7
6 IFr 7
7
7
6
6
6 DV 7 ¼ ½Z new 6 IFr 7
s 7
7
6
6
6 . 7
6 . 7
6 . 7
6 . 7
4 . 5
4 . 5
0
DV n
2
ð42Þ
or
V Fr
Z new ðr; rÞ
ð32Þ
Z new ðr; rÞ ¼ Z bus ðr; rÞ þ RF
ð33Þ
where RF is the fault resistance, estimated by (9).
The superimposed voltages at each bus due to the injected fault
current (IFr) may be calculated using the impedance matrix Znew:
3
2
DV 1 3
0
6 .. 7
6 .. 7
6 . 7
6 . 7
7
7
6
6
7
7
6
6
6 DV r 7 ¼ ½Z new 6 IFr 7
7
7
6
6
6 .. 7
6 .. 7
4 . 5
4 . 5
2
ð34Þ
0
where (34) can also be rewritten as:
DV i ¼ Z new ði; rÞ ðIFr Þ
whereas i = 1 ? (3n + 3) represents the node index.
DV i ¼
X
Z new ði; jÞ IFj
ð43Þ
j¼1
where VFr is the node r pre-fault voltage, and
DV n
V F i ¼ V PF i þ DV i
½Igh ¼ ½Y abc g;h ð½V Fg ½V Fh Þ
where n is the total system bus number.
IFr ¼
Adding the superimposed voltages to each pre-fault bus voltage
(VPF), the fault period bus voltages (VF) are estimated through (36):
ð35Þ
where i, j = 1 ? (3n + 3) represent the node indexes.
From the superimposed and pre-fault voltages, the three-phase
voltages and currents at each feeder can also be calculated through
(36) and (37), respectively.
3.3.3. Double line-to-ground fault
Considering a DLG fault, as illustrated in Fig. 3, the Zbus matrix
must be modified to include in the two faulted nodes (r and s)
the three fault resistances of the fault model. Following the same
procedure as presented previously:
Z new ðr; rÞ ¼ Z bus ðr; rÞ þ RF r þ 0:5RF rs
ð44Þ
Z new ðs; sÞ ¼ Z bus ðs; sÞ þ RF s þ 0:5RF rs
ð45Þ
where RFR, RFs, and RFrs are the fault resistances estimates obtained
from (26).
Using the modified three-phase impedance matrix Znew, the
fault currents (IFr and IFs) are calculated through (46):
A.D. Filomena et al. / Electrical Power and Energy Systems 33 (2011) 1326–1335
IF r
IF s
¼
Z new ðr; rÞ Z new ðr; sÞ
Z new ðs; rÞ Z new ðs; sÞ
1 V PF r
V PF s
ð46Þ
where VPFr, VPFs, are the pre-fault voltages on the faulted nodes r and
s, respectively.
From the fault currents estimated through (46), the superimposed voltages are calculated using (47):
3
3
2
DV 1
0
6 . 7
6 .. 7
6 .. 7
6 . 7
7
7
6
6
7
7
6
6
6 DV r 7
6 I 7
7 ¼ ½Z new 6 Fr 7
6
6 DV 7
6 IFs 7
s 7
7
6
6
6 . 7
6 . 7
6 . 7
6 . 7
4 . 5
4 . 5
2
ð47Þ
0
DV n
From the superimposed voltages, the fault period bus voltages
and currents can be obtained through (36) and (37), respectively.
3.3.4. Three-phase fault
Three-phase fault is the most severe fault type, and is normally
used for rotating machines fault analysis. However, this fault type
represents only 5% of the fault events on transmission lines [1]. For
three-phase faults the bus impedance matrix must be modified to
include the phases a, b, and c fault resistances, whose estimates are
obtained from (27):
Z new ðr; rÞ ¼ Z bus ðr; rÞ þ RF a
ð48Þ
Z new ðs; sÞ ¼ Z bus ðs; sÞ þ RF b
ð49Þ
Z new ðt; tÞ ¼ Z bus ðt; tÞ þ RF c
ð50Þ
where r, s, and t are the fault nodes indexes.
From the modified three-phase bus impedance (Znew), the fault
currents are calculated using (51):
2
IF r
3
2
Z new ðr; rÞ Z new ðr; sÞ Z new ðr; tÞ
6 7 6
4 IF s 5 ¼ 4 Z new ðs; rÞ
IF t
Z new ðt; rÞ
31 2
Z new ðs; sÞ
7
Z new ðs; tÞ 5
Z new ðt; sÞ
Z new ðt; tÞ
V PF r
3
6
7
4 V PF s 5
V PF t
All loads modeled as constant impedance Y-connected with
neutral grounding.
The modified test system, composed by 36 buses and illustrated
by Fig. 5, was simulated using BPA’s ATP/EMTP [17]. The fault analysis algorithm was implemented in MATLABÒ [15]. A modified
Fourier filter [22] was also implemented in MATLAB to remove
the decaying DC component and estimate the voltages and currents fundamental components measured at the substation terminal. The simulations were executed considering the following fault
conditions:
103 different fault locations (covering all system laterals and
sections).
Five different fault resistances: 0, 10, 20, 50, and 100 X.
10 fault types: A-g, B-g, C-g, AB, BC, AC, AB-g, BC-g, AC-g, and
ABC-g.
Total: 5150 faults.
The simulation set was divided in two different case tests,
which are summarized in the following scenarios:
Set I:
103 fault locations.
Five fault resistances.
10 fault types.
Total: 5150 fault cases.
Set II:
Two fault locations (K1 = 2.063 km, K2 = 1.649 km).
Five fault resistances.
10 fault types.
Total: 100 fault cases.
ð51Þ
where VPFr, VPFs, VPFt are the pre-fault voltages on the faulted nodes
r, s, and t, respectively.
From the fault currents calculated through (51), the bus superimposed voltages are obtained by (52):
3
3
2
DV 1
0
6 . 7
.
6 . 7
6 .. 7
6 . 7
7
6
7
6
7
6
6 I 7
6 DV r 7
6 Fr 7
7
6
7
6
7
6
7
6 DV s 7 ¼ ½Z new 6
6 IFs 7
7
6
6 I 7
6 DV t 7
6 Ft 7
7
6
7
6
6 . 7
6 .. 7
6 . 7
4 . 5
4 . 5
0
DV n
2
ð52Þ
Finally, as presented previously, the bus voltages and currents
during the fault period are calculated by (36) and (37).
4. Case study
In order to validate the proposed algorithm, a modified version of
IEEE 37 Node Test Feeder has been chosen for numeric test simulations. The original IEEE 37-bus system [16] has been modified to include some Brazilian’s distribution systems typical characteristics:
Base voltage: 13.8 kV.
Three wire Y-connected with neutral grounding.
No voltage regulator.
1331
Fig. 5. Modified IEEE 37 node test feeder.
1332
A.D. Filomena et al. / Electrical Power and Energy Systems 33 (2011) 1326–1335
The errors in the fault resistances estimates were calculated
considering the absolute difference between estimated and simulated fault resistances, as given by (53):
e ¼ jRF calc RF real j
ð53Þ
where RFcalc and RFreal are the estimated and the real fault resistances values, respectively.
5. Results
In the following subsections, the obtained results from the proposed fault analysis algorithm are presented and discussed. Initially, the effects of different fault resistance and distance values
on the fault resistance estimate are verified. After, the buses voltages and fault currents estimates are also compared to the BPA’s
ATP/EMTP simulations.
5.1. Fault resistance estimation
Set I test results were used to analyze the fault analysis algorithm performance. The results are analyzed over two aspects:
fault resistance and distance effects.
5.1.1. Fault resistance effects
Table 1 presents the results for single line-to-ground and lineto-line faults for five simulated fault resistances. The results show
that the errors associated to the fault resistances estimates slightly
increase for higher fault resistances values. The algorithm yielded a
highest average error equal to 1.13 X for SLG faults and 0.19 X for
L–L faults. Still, the maximum errors produced by the algorithm
were 1.66 X and 1.13 X for single line-to-ground and line-to-line
faults, respectively.
Table 2 shows the fault resistances estimate results for double
line-to-ground and three-phase faults. The comparison between
the calculated and the simulated fault resistances values also demonstrate negligible errors on both fault types. In double line-toground faults, the average and maximum errors obtained were,
respectively, 0.97 X and 1.43 X, both occurred on the 100-X fault
scenario. The algorithm provided for three-phase faults a maximum error equal to 2.30 X, for a 100-X fault. Also for this fault
type, the highest average errors for 50-X and 100-X fault resistances were 0.22 X and 1.05 X, respectively.
The results presented in Table 2 show slight differences between the estimated fault resistances in each faulted phase, resulted by system unbalances and the fundamental components
determination process, due to different fault inception angles.
However, as described in Table 2, these inaccuracies provide small
differences which will not affect the proposed fault analysis method performance.
As expected from an impedance-based formulation, the highest
errors were obtained during the most critical fault resistance test
scenario. The fault resistance effect in the proposed algorithm
may be explained by the erroneous estimation of the fault current
for high fault resistances values [16], also associated to the socalled reactance error [23]. As given in (10), the proposed formulation is fault period load current estimate dependent. For faults with
small fault resistances values, the current divider circuit of the
faulted system is composed by the load impedance and a negligible
fault resistance. In this scenario, the source current will mainly
feed the fault and the fault current will be close to the first. Therefore, small variation on the calculated fault current does not affect
the fault resistance estimate. As illustrated by Tables 1 and 2, as the
fault resistance increases, this effect became more significant.
However, even to the most critical analyzed fault scenario, the
maximum error obtained was 2.30%.
5.1.2. Fault distance effect
To analyze the fault distance effect on the fault resistance estimate, the obtained results from Set I were used. Figs. 6 and 7 illustrate the fault resistance estimates over each one of the 103
simulated fault locations for single line-to-ground and line-to-line
faults, respectively.
The fault resistance estimates demonstrate that the proposed
algorithm efficiency is fault location independent. As provided by
Tables 1 and 2, on faults up to 100-X, a small difference between
maximum and average errors can be observed for the four fault
types. Also, as illustrated by Figs. 6 and 7, a small variation over
the 103 fault points can only be visually observed for the most critical simulated fault condition. However, as discussed previously,
these differences can be neglected.
5.2. System voltages and currents estimation
Considering Set test II, the proposed fault analysis algorithm
performance is discussed over two aspects: fault current at the
faulty bus and bus voltages during the disturbance. In this section
two different fault locations have been analyzed. The investigated
fault points K1 and K2, which are coincident to buses 707 and 737,
are located 2063 and 1649 meters from the substation, as illustrated in Fig. 5. The results discussed in this section represents
not only the inaccuracy associated to the Zbus analysis technique,
but the hole fault analysis method proposed in this paper, including the errors introduced by the fault resistance estimates.
5.2.1. Fault current
Fault analysis performance was first evaluated considering the
fault current at faulty buses K1 and K2. Tables 3 and 4 show the
fault current errors, demonstrating the inaccuracies of absolute
and angular components between calculated fault current and
BPA’s ATP/EMTP simulations.
The obtained results for single line-to-ground and line-to-line
faults at K1 and K2 are presented in Table 3. During SLG faults without fault resistance, the method provided maximum errors to this
Table 1
Fault resistance estimates for single line-to-ground and line-to-line faults.
Fault type
Simulated RF (X)
Maximum error (X)
Minimum error (X)
Average error (X)
A-g
A-g
A-g
A-g
A-g
BC
BC
BC
BC
BC
0
10
20
50
100
0
10
20
50
100
0
0.02
0.06
0.35
1.66
0
0.01
0.03
0.11
1.13
0
0
0.01
0.03
0.11
0
0
0
0
0
0
0.01
0.03
0.21
1.13
0
0
0
0.03
0.19
1333
A.D. Filomena et al. / Electrical Power and Energy Systems 33 (2011) 1326–1335
Table 2
Fault resistances estimates for double line-to-ground and three-phase faults.
Fault type
AC-g
AC-g
AC-g
AC-g
AC-g
ABC-g
ABC-g
ABC-g
ABC-g
ABC-g
Simulated RF (X)
Maximum error (X)
Minimum error (X)
Average error (X)
RFa
RFb
RFc
RFa
RFb
RFc
RFa
RFb
RFc
RFa
RFb
RFc
0
10
20
50
100
0
10
20
50
100
–
–
–
–
–
0
10
20
50
100
0
10
20
50
100
0
10
20
50
100
0
0.01
0.04
0.29
1.43
0
0.02
0.06
0.42
1.53
–
–
–
–
–
0
0.02
0.05
0.62
2.30
0
0.01
0.04
0.27
1.03
0.01
0.01
0.05
0.49
2.25
0
0
0.01
0.03
0.11
0
0
0.01
0.03
0.10
–
–
–
–
–
0
0
0
0
0.01
0
0
0
0.01
0.04
0
0
0.01
0.02
0.06
0
0.01
0.03
0.18
0.97
0
0.01
0.03
0.22
1.05
–
–
–
–
–
0
0
0.02
0.13
0.48
0
0
0.02
0.12
0.66
0
0.01
0.02
0.19
0.92
Fig. 6. Distance effect on RF estimation for SLG faults (A-g).
Fig. 7. Distance effect on RF estimation for L–L faults (BC).
Table 3
Fault current errors at K1 and K2 for single line-to-ground and line-line faults.
Fault
K1
K2
A-g
BC
A-g
BC
RF (X)
|Ifa| (%)
H (°)
|Ifbc| (%)
H (°)
|Ifa| (%)
H (°)
|Ifbc| (%)
H (°)
0
10
20
50
100
0.22
0.01
0.01
0
0.01
0.31
0.34
0.34
0.34
0.34
0.45
0.08
0.04
0.02
0.01
0.28
0.32
0.32
0.32
0.32
0.30
0.05
0.03
0.02
0.02
0.16
0.19
0.19
0.19
0.19
0.54
0.08
0.04
0.02
0.03
0.17
0.17
0.17
0.17
0.17
fault type equal to 0.22% at K1 and 0.30% at K2, which represents
negligible absolute errors of 16 and 21 A, respectively. Still in this
fault scenario, the highest fault current angle errors were 0.31° and
0.16°. In line-to-line disturbances, a similar behavior as SLG faults
has also been obtained, providing maximum errors of 0.54%, or
39 A, and 0.17°, both occurred at K2. For 2LG and 3PH faults, which
results at K1 are shown in Table 4, the proposed fault analysis confirms its accuracy with small errors for all fault conditions. During
double line-to-ground faults, the maximum error was 0.47% and
0.41°, once again occurred during solid faults. For three-phase
faults the method also achieved negligible errors, equal to 0.59%
and 0.37°.
The above mentioned results demonstrate that the proposed
fault analysis method has always produced the highest absolute errors during solid faults, oppositely as the fault resistance estimate
process, as discussed previously. However, the highest obtained error was 43 A, or 0.59%, and could be neglected. As shown by Tables
3 and 4, the inaccuracy associated to the absolute fault currents became insignificant for higher fault resistances values. Therefore,
the fault resistance increase does not interfere in the fault current
estimate accuracy.
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A.D. Filomena et al. / Electrical Power and Energy Systems 33 (2011) 1326–1335
Table 4
Fault current errors at K1 for double line-to-ground and three-phase faults.
Fault type
AC-g
ABC
RF (X)
|Ifa| (%)
H (°)
|Ifc| (%)
H (°)
|Ifa| (%)
H (°)
|Ifb| (%)
H (°)
|Ifc| (%)
H (°)
0
10
20
50
100
0.21
0.01
0.01
0
0.01
0.41
0.35
0.35
0.34
0.34
0.47
0.06
0.03
0.01
0.01
0.40
0.38
0.37
0.37
0.37
0.27
0.01
0.01
0
0.01
0.32
0.34
0.34
0.34
0.34
0.37
0.04
0.02
0.01
0.01
0.24
0.35
0.35
0.35
0.36
0.59
0.06
0.03
0.01
0.01
0.36
0.37
0.37
0.37
0.37
Table 5
Bus voltages errors for faults at K1.
RF (X)
Fault type
Bus
0
10
20
50
100
|V| (%)
H (°)
|V| (%)
H (°)
|V| (%)
H (°)
|V| (%)
H (°)
|V| (%)
H (°)
702
A-g
BC
AC-g
ABC
0.25
0.21
0.20
0.18
0.2
0.17
0.16
0.14
0.25
0.24
0.24
0.24
0.19
0.18
0.19
0.19
0.25
0.25
0.25
0.25
0.19
0.19
0.19
0.19
0.25
0.25
0.19
0.25
0.19
0.19
0.25
0.19
0.25
0.25
0.25
0.25
0.19
0.19
0.19
0.19
709
A-g
BC
AC-g
ABC
0.17
0.12
0.21
0.11
0.31
0.31
0.30
0.31
0.18
0.17
0.19
0.17
0.31
0.31
0.32
0.31
0.18
0.18
0.18
0.18
0.31
0.31
0.32
0.31
0.18
0.18
0.18
0.18
0.31
0.31
0.31
0.31
0.18
0.18
0.18
0.18
0.32
0.31
0.31
0.32
720
A-g
BC
AC-g
ABC
0.71
0.75
0.77
0.76
0.50
0.64
0.48
0.51
0.82
0.81
0.82
0.82
0.51
0.51
0.50
0.50
0.82
0.82
0.82
0.82
0.50
0.51
0.50
0.50
0.82
0.82
0.82
0.82
0.50
0.50
0.50
0.50
0.82
0.82
0.82
0.82
0.50
0.50
0.50
0.50
734
A-g
BC
AC-g
ABC
0.37
0.15
0.18
0.20
0.43
0.72
0.47
0.62
0.40
0.37
0.37
0.38
0.39
0.39
0.39
0.39
0.40
0.38
0.38
0.39
0.39
0.39
0.39
0.39
0.40
0.39
0.39
0.39
0.39
0.39
0.39
0.39
0.40
0.39
0.39
0.39
0.38
0.39
0.39
0.38
5.2.2. Bus voltages
The fault analysis algorithm performance was also evaluated
through comparisons between BPA’s ATP/EMTP simulations and
the estimated voltages in four different buses: 702, 709, 720, and
734. Table 5 presents the maximum absolute and angular errors
for all analyzed faults at K1. Considering the bus voltages estimated
from the calculated fault current and pre-fault voltages, this section discusses the inaccuracies introduced by three different processes: fault resistance, fault current and three-phase load flow.
The estimated bus voltages accuracy is demonstrated by Table 5
results: the highest absolute error was 0.82%, which represents an
error equal to 113 Volts and it is associated to bus 720. A maximum
error of 0.72° has also been obtained at bus 734. As consequence
from the already discussed fault current estimate accuracy, the results provided by Table 5 also demonstrate the bus voltage estimate invariance to different fault resistances values. Besides,
these results demonstrate that the main error source is the prefault bus voltages, which were estimated in this paper through a
three-phase load flow based on the ladder technique [21]. Therefore, the bus voltage estimates are dependent to the bus and also
the fault location, resulting in different error levels (absolute and
angular) to each analyzed bus. However, even the highest obtained
error may be neglected due its small value.
technique has been developed to be suitable for generic unbalanced
power distribution systems with ramifications, and only requires
the disturbance sending-end voltages and currents.
Test results demonstrate an accurate and robust fault analysis
method. The fault resistance estimate algorithm provided accurate
results to all analyzed cases, for faults up to 100 X, with a small
dependence with the fault resistance value. Besides, the fault resistance sub-routine is invariant to the fault location. The proposed
fault analysis algorithm performance is also independent to fault
resistance values and fault location. The obtained results demonstrate the technique accuracy to all analyzed conditions, showing
that the discussed aspects do not affect the proposed fault analysis
performance.
In this work the fault impedance was modeled as a constant
resistance and the distribution system considered radial. It is expected that the proposed method performance decreases when
fault impedance is not strictly resistive and constant or when distributed generation are connected to network buses. Parameter
identification is a research topic of great interest of the power systems community. In this work however this issue was not addressed. The proposed formulation considers known accurate
system data. It is expected that the proposed method performance
decreases with data inaccuracy.
6. Conclusions
References
In this paper, an iterative fault analysis algorithm is proposed.
The proposed method is based on two instances: fault resistance
estimation process, through an iterative impedance-based formulation; and the fault voltages and currents estimation process, which
are carried out through a bus impedance matrix based formulation.
The proposed technique aims to help post-disturbance analysis, providing information to Distribution Operation Centers. The proposed
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André Darós Filomena was born in Porto Alegre, Rio Grande do Sul, Brazil, on
October 27, 1982. He received his B.Sc. and M.Sc. degrees in Electrical Engineering
from Federal University of Rio Grande do Sul (UFRGS), Brazil, in 2005 and 2008,
respectively. He is currently with CEEE-GT (Companhia Estadual de Geração e
Transmissão de Energia Elétrica), in Porto Alegre, RS, Brazil and also pursuing his
Ph.D. degree at UFRGS. His research interests include power system protection,
modeling and analysis.
Mariana Resener was born in Passo Fundo, Rio Grande do Sul, Brazil, on April 8,
1985. She received her B.Sc. and M.Sc. degrees in Electrical Engineering from
Federal University of Rio Grande do Sul (UFRGS), Brazil, in 2008 and 2011,
respectively. She is currently with CEEE-D (Companhia Estadual de Distribuição de
Energia Elétrica), in Porto Alegre, RS, Brazil. Her research interests include power
system control, stability, and distributed generation.
Rodrigo Hartstein Salim was born in Porto Alegre, Rio Grande do Sul, Brazil, on
September 15, 1983. He received his B.Sc. and M.Sc. degrees in Electrical Engineering from Federal University of Rio Grande do Sul (UFRGS), Brazil, in 2006 and
2008, respectively. In 2011 he received the Ph.D. degree in electrical engineering
from University of São Paulo, São Carlos, Brazil. His research interests include power
system protection, control, and distributed generation.
Arturo Suman Bretas was born in Bauru, São Paulo, Brazil, on July 5, 1972. He
received the B.Sc. and M.Sc. degrees in Electrical Engineering from the University of
São Paulo, Brazil, in 1995 and 1998 respectively. In 2001 he received the Ph.D.
degree in electrical engineering from Virginia Tech, Blacksburg, VA. Currently, he is
an Associate Professor of the Federal University of Rio Grande do Sul (UFRGS), Porto
Alegre, Brazil. His research interests include power system protection, analysis and
restoration.