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This is the published version of a paper presented at ECCE Euroup EPE 2015.
Citation for the original published paper:
Nikouie Harnefors, M., Jin, L., Harnefors, L., Wallmark, O., Leksell, M. et al. (2015)
Analysis of the dc-link stability for the stacked polyphase bridges converter.
In: 2015 17th European Conference on Power Electronics and Applications (EPE'15 ECCE-Europe)
IEEE
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Analysis of the dc-link stability for the stacked polyphase bridges
converter
Mojgan Nikouie Harnefors1 , Lebing Jin1 , Lennart Harnefors2 ,
Oskar Wallmark1 , Mats Leksell1, Staffan Norrga1
1
KTH Royal Institute of Technology, Stockholm, Sweden
E-mail: {mojgann, lebingj, owa, leksell, norrga}@kth.se
2 ABB Corporate Research, Västerås, Sweden
E-mail: lennart.harnefors@se.abb.com
Acknowledgments
The authors gratefully acknowledge the Swedish Hybrid Vehicle Centre (SHC) for the financial support.
Keywords
<<DC-link stability>>, <<integrated electric drive>>, <<stacked polyphase bridges converter>>.
Abstract
This paper presents an analysis of the capacitor voltage stability for a stacked polyphase bridges (SPB)
type converter. The SPB converter comprises of several submodules which are connected in series.
Therefore, stability of the dc-link voltage is very important to investigate. From the analysis, a corresponding controller and an analytical expression for stability are derived. The proposed controller and
the associated stability condition are verified in a simulation environment and on a small experimental
setup.
Introduction
The stacked polyphase bridges (SPB) converter is a converter topology proposed relatively recently. It
has been found suitable for integrated electric drives [1–3] and wind turbine applications [4]. As illustrated in Figure 1, the SPB converter is realized by series-connecting a number of converter submodules.
Each submodule comprises a conventional two-level, three-phase converter with low-voltage components. For example, low-voltage (Si or GaN) MOSFETs can be utilized along with high switching frequencies (100 kHz or more). These properties allow the converter to use very small, non-electrolytic type
capacitors. By combining the converter topology with a fractional-slot concentrated winding machine,
a modular, very compact integrated electric drive can potentially be realized, rendering the technology
interesting in electric and hybrid electric vehicle traction applications [5].
Since the converter submodules are series connected, the input capacitor voltage to each submodule
needs active (or passive) stabilization. Such an active voltage stabilization algorithm is implemented
in [2], where the stabilization is realized by adding to the voltage references sent to the modulators of
each converter submodule. While no design guidelines are provided, the algorithm is implemented successfully on an experimental setup comprising of two (series-connected) submodules.
Multiple-star
PMSM
ib
Lb
+
1-
Submodule
(sm1)
ia,1
ib,1
ic,1
+
2
-
Submodule
(sm2)
ia,2
ib,2
ic,2
Rb
v
Eb
v
Submodule
in
T1
Submodule
(smn)
T5
ia,n
ib,n
ic,n
T2
vn +-
T3
C
T4
T6
ia,n
ib,n
ic,n
CS1
CS2
CSn
(b)
SPI
Central DSP
RS 232
USB
PC
PC
(a)
Figure 1: The SPB converter topology: (a) Structure of the SPB converter; (b) Submodule configuration.
In this paper, an (active) capacitor voltage controller is analyzed and proposed for the SPB converter
topology. The approach represents a generalization of the controller in [6] which considered two-level
converters. The load considered in this paper is an RL-type load and an analytical stability condition is
derived which eases a practical implementation. The derived stability condition is verified in a simulation
environment and the controller is also implemented on a small experimental setup.
The paper is outlined as follows. First, the capacitor voltage controller is derived and its stability is
investigated. Next, the proposed controller is implemented and evaluated in a simulation environment
along with the experimental results. Finally, a conclusion is reported.
Control system analysis
From Figure 1, the dynamics of the battery current can be expressed as
Lb
msm
dib
= Eb − Rb ib − ∑ vn
dt
n=1
(1)
where msm is the number of converter submodules. For the nth capacitor voltage, with equal capacitances
C, and with in as the current into the nth converter, we have
dvn
= ib − in .
(2)
dt
We can express the output complex power Sn from nth converter submodule into the corresponding
machine winding as
C
3
Sn = vn i∗n
(3)
2
where vn and in are the space vectors in the dq frame for voltage and current, respectively. The real and
the imaginary parts of (3) yield the active power Pn and the reactive power Qn , respectively, as
3
dψq,n
dψd,n
3
3
Pn = Rs i2d,n + i2q,n +
id,n
+ iq,n
+ ωe (ψd,n iq,n − ψq,n id,n )
(4)
2
2
dt
dt
2
3
dψq,n
dψd,n
3
3
Qn = ωe Ls i2d,n + i2q,n +
id,n
− iq,n
+ ωe (ψd,n id,n + ψq,n iq,n ) .
2
2
dt
dt
2
(5)
The first term on the right-hand side of (4) represents the resistive losses, the second term is the change
of magnetic energy stored in the winding/coils, and the third term is the mechanical power output (for
an RL load, this term is zero). If the converter losses are neglected, then Pn is the power into the nth
converter submodule as well. Therefore, we can express the input current in as in = Pn /vn . As a first step
in the controller design process (this will be justified below), we assume an RL load
2 + i2
3R
i
s d,n
q,n
Pn
in =
=
.
(6)
vn
2vn
This system is nonlinear. To analyze the stability, for each variable we assume operation such that a
small deviation from a certain operation point can be assumed, e.g., as in = i⋆n + ∆in . Thus
!
⋆
⋆ ∆i ⋆ 2 + i⋆ 2
∆i
+
i
i
i
d,n
q,n
3R
q,n
q,n
d,n
d,n
s
in ≈ i⋆n + 3Rs
∆vn
(7)
−
v⋆n
2
v⋆n 2
where the approximation represents a first order Taylor expansion. By substituting (7) into (2), we obtain
!
⋆
⋆ 2
⋆ 2
id,n ∆id,n + i⋆q,n ∆iq,n
d∆vn
3Rs id,n + iq,n
C
= ∆ib − 3Rs
∆vn .
(8)
+
dt
v⋆n
2
v⋆n 2
As seen in (8) the coefficient of ∆vn is positive. Therefore, the system is unstable. If we control id,n and
iq,n , then it should be possible to select the deviation variables ∆id,n , and ∆iq,n as functions of ∆vn . Thus,
the system may become stable. A similar situation is considered in [6], where it is suggested adding an
additional term to each current reference. Here, if we can select
∆id,n = gi⋆d,n ∆vn
(9)
∆iq,n = gi⋆q,n ∆vn
(10)
where g is a positive gain parameter, we obtain from (8)
!
i⋆d,n 2 + i⋆q,n 2
d∆vn
1
C
= ∆ib − 3Rs
g − ⋆ ∆vn .
dt
v⋆n
2vn
(11)
For stability, (11) suggests that g > 1/(2v⋆n ) should be selected. In practice, the selections (9) and (10)
ref
are, as mentioned, implemented by adding an additional component to each current reference iref
d,n and iq,n
as
msm vi
∑i=1
ref
ref′
⋆
id,n = id,n + gid,n vn −
(12)
msm
msm vi
∑i=1
ref
ref′
⋆
.
(13)
iq,n = iq,n + giq,n vn −
msm
The nominal value for v⋆n is equal to Eb,nom /msm . Therefore, g is selected as
msm
g=γ
2Eb,nom
(14)
where γ > 1 and Eb,nom is the nominal battery voltage.
The power factor for this system can be derived as
cosφ = p
Pn
Pn2 + Q2n
=q
1
2 2
1 + ωRe L2 s
(15)
s
As seen in (15), the power factor is independent of selecting id,n and iq,n and has an inductive characteristic.
Simulation and experimental results
Simulation
To verify the proposed dc-link stability controller and the associated stability condition, a simulation
model has been implemented in Matlab/Simulink1 consisting of two submodules (msm = 2) connected to
a battery with the parameters Eb = 60 V, Lb = 4 µH, and Rb = 175 mΩ. The submodules operate using
a switching frequency of 10 kHz and a submodule capacitance of C = 100 µF. An RL load with the
parameters Rs = 6 Ω and Ls = 4.7 mH is connected to each submodule. For each submodule, a closedloop current controller is implemented and tuned to a bandwidth of 175 Hz. The simulation shows that
the system is unstable for γ = 1/2, marginally stable for γ = 1, and stable for γ = 2 in agreement with the
theory.
Figure 2 shows the corresponding simulation results.
−1
−2
−1
−2
50
100
2
1
−2
0
(e)
0
50
100
(h)
2
1
0
50
100
(c)60
(f)35
(i)35
40
20
0
30
25
0
50
t [ms]
100
100
0
50
100
50
100
0
0
v1 , v2 [V]
100
50
1
v1 , v2 [V]
50
0
2
v1 , v2 [V]
0
0
−1
iq,1 , iq,2 [A]
0
iq,1 , iq,2 [A]
iq,1 , iq,2 [A]
(b)
(g)
0
id,1 , id,2 [A]
(d)
0
id,1 , id,2 [A]
id,1 , id,2 [A]
(a)
30
25
0
50
t [ms]
100
0
t [ms]
Figure 2: Current step responses and dc-link voltages for submodule one (blue) and submodule two (green): (a) –
(c) Current step responses and dc-link voltages for γ = 1/2 (unstable); (d) – (f) for γ = 1 (marginally stable); (g) –
(i) for γ = 2 (stable).
Experimental results
The experimental setup is designed for an SPB converter with three submodules, where each is connected
to an RL load. However, for evaluation of the dc-stability considered in this paper, only two submodules
are being used. Figure 3(a) shows the setup. One printed circuit board (PCB) cell, shown in Figure 3(b),
represents one submodule for the converter. Each cell is designed for a 100-V, 50-A two-level, threephase converter with a 5-kW output power and a 100-µF dc-link capacitor. In each cell there is one digital
signal processing (DSP) unit that controls the switching signals and handles the communication between
the submodules. The serial peripheral interface (SPI) bus protocol is chosen for the communication
between cells. The information between two or more submodules is transmitted through the SPI bus
which is coupled to the DSP on each board. Therefore, one cell operates as master and the remaining
cells operate as slaves. In principle, all cells are designed to act as both master and slave; in the case of
a fault within the master cell, a slave cell can substitute the master.
1 Matlab
and Simulink are registered trademarks of The Mathworks Inc., Natick, MA, U.S.A.
Three submodules on the rack
Resistance load
Inductance load
(a)
(b)
Figure 3: Experimental setup: (a) The SPB converter with three submodules connected to an RL load; (b) One
submodule structure.
20
0
0
1
2
3
(b)
3
γ
2
1
0
ia,1 , ib,1 , ic,1 [A]
0
1
2
3
(c)
2
0
−2
1.45
1.5
t [s]
1.55
ia,2 , ib,2 , ic,2 [A]
v1 , v2 [V]
40
ia,2 , ib,2 , ic,2 [A]
(a)
60
ia,1 , ib,1 , ic,1 [A]
Figure 4 shows the experimental results. As seen, for γ = 1/2 the system (capacitor voltages) are unstable and for γ = 2, the controller manages to stabilize the system in agreement with the theory and the
simulation. The fact that the system is stabilized for γ & 1.5, rather than the corresponding theoretical
prediction γ > 1, can likely be attributed to measurement errors and the simplifications made during the
derivation of the stability controller.
(d)
2
0
−2
0
1
2
3
1
2
3
(e)
2
0
−2
0
(f)
2
0
−2
1.45
1.5
1.55
t [s]
Figure 4: DC-link voltage and phase current stability for two submodules: (a) DC-link voltages of master submodule (blue) and slave submodule (red); (b) Variation of γ; (c)-(d) Phase current of master submodule ia (blue), ib
(green) and ic (red); (e)-(f) Phase current of slave submodule ia (blue), ib (green) and ic (red).
Conclusion
This paper presented an analysis and corresponding control design for the dc-link voltage stability of
an SPB-type converter. The proposed controller and associated stability condition were verified in a
simulation and environment and on a smaller experimental setup comprising of an SPB-type converter
with two submodules.
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