IDT74ALVCH16646
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS
TRANSCEIVER AND
REGISTER WITH 3-STATE
OUTPUTS AND BUS-HOLD
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
µ W typ. static)
• CMOS power levels (0.4µ
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. The ALVCH16646 can be used as two 8-bit transceivers or one
16-bit transceiver. Data on the A or B bus is clocked into the registers on the
low-to-high transition of the appropriate clock (CLKAB or CLKBA) input.
Output-enable (OE ) and direction-control (DIR) inputs are provided to
control the transceiver functions. In the transceiver mode, data present at the
high-impedance port may be stored in either register or both. The select control
(SAB and SBA) inputs can multiplex stored and real-time (transparent mode)
data. The circuitry used for select control eliminates the typical decoding glitch
that occurs in a multiplexer during the transition between stored and real-time
data. DIR determines which bus receives data when OE is low. In the isolation
mode (OE high), A data may be stored in one register and/or B data may be
stored in the other register. When an output function is disabled, the input function
is still enabled and may be used to store and transmit data. Only one of the two
buses, A or B, can be driven at a time.
The ALVCH16646 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining speed
performance.
The ALVCH16646 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Suitable for heavy loads
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
1OE
1DIR
1CLKBA
1SBA
1CLKAB
1SAB
56
2OE
1
2DIR
55
2CLKBA
54
2SBA
2
2CLKAB
3
2SAB
29
28
30
31
27
26
One of 8 Channels
One of 8 Channels
1D
1D
C1
1A1
C1
5
52
1B1
1D
2A1
15
42
2B1
1D
C1
C1
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
APRIL 1999
1
© 1999 Integrated Device Technology, Inc.
DSC-4221/1
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
PIN CONFIGURATION
Symbol
Description
VTERM(2)
Max
Unit
Terminal Voltage with Respect to GND
–0.5 to +4.6
V
VTERM(3)
Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
°C
1DIR
1
56
1OE
1CLKAB
2
55
1CLKBA
TSTG
Storage Temperature
–65 to +150
1SAB
3
54
1SBA
IOUT
DC Output Current
–50 to +50
mA
GND
4
53
GND
IIK
±50
mA
1A1
5
52
1B1
Continuous Clamp Current,
VI < 0 or VI > VCC
1A2
6
51
1B2
IOK
Continuous Clamp Current, VO < 0
–50
mA
VCC
7
VCC
Continuous Current through each
VCC or GND
±100
mA
50
ICC
ISS
1A3
8
49
1B3
1A4
9
48
1B4
1A5
10
47
1B5
GND
11
46
GND
1A6
12
45
1B6
1A7
13
44
1B7
1A8
14
43
1B8
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
2A1
15
42
2B1
2A2
16
41
2B2
2A3
17
40
2B3
GND
18
39
GND
Symbol
Conditions
Typ.
Max.
Unit
2A4
19
38
2B4
CIN
Input Capacitance
VIN = 0V
5
7
pF
2A5
20
37
2B5
COUT
Output Capacitance
VOUT = 0V
7
9
pF
CI/O
I/O Port Capacitance
VIN = 0V
7
9
pF
2A6
21
36
2B6
VCC
22
35
VCC
2A7
23
34
2B7
2A8
24
33
2B8
GND
25
32
GND
2SAB
26
31
2SBA
2CLKAB
27
30
2CLKBA
2DIR
28
29
2OE
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Parameter(1)
NOTE:
1. As applicable to the device type.
PIN DESCRIPTION
Pin Names
xAx
SSOP/ TSSOP/ TVSOP
TOP VIEW
Description
Data Register A Inputs(1)
Data Register B Outputs
xBx
Data Register B Inputs(1)
Data Register A Outputs
xCLKAB, xCLKBA
xSAB, xSBA
Clock Pulse Inputs
Output Data Source Select Inputs
xOE
Output Enable Inputs
xDIR
Direction Control Inputs
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
2
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
FUNCTION TABLE(1)
Inputs
Data I/O
xOE
xDIR
xCLKAB
xCLKBA
xSAB
xSBA
xAx
xBx
X
X
↑
X
X
X
Input
Unspecified(2)
Store A, B Unspecified(2)
Operation or Function
X
X
X
↑
X
X
Unspecified(2)
Input
Store B, A Unspecified(2)
H
X
↑
↑
X
X
Input
Input
Store A and B Data
H
X
H or L
H or L
X
X
Input Disabled
Input Disabled
L
L
X
X
X
L
Output
Input
Real-Time B Data to A Bus
L
L
X
H or L
X
H
Output
Input
Stored B Data to A Bus
L
H
X
X
L
X
Input
Output
Real-Time A Data to B Bus
L
H
H or L
X
H
X
Input
Output
Stored A Data to B Bus
Isolation, Hold Storage
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
↑ = LOW-to-HIGH Transition
2. The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled, i.e. data at the bus pins will be
stored on every LOW-to-HIGH transition on the clock inputs.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40°C to +85°C
Symbol
VIH
VIL
Min.
Typ.(1)
Max.
Unit
VCC = 2.3V to 2.7V
1.7
—
—
V
VCC = 2.7V to 3.6V
2
—
—
VCC = 2.3V to 2.7V
—
—
0.7
VCC = 2.7V to 3.6V
—
—
0.8
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Test Conditions
V
IIH
Input HIGH Current
VCC = 3.6V
VI = VCC
—
—
±5
µA
IIL
Input LOW Current
VCC = 3.6V
VI = GND
—
—
±5
µA
IOZH
High Impedance Output Current
VCC = 3.6V
VO = VCC
—
—
±10
µA
IOZL
(3-State Output pins)
VO = GND
—
—
±10
VIK
Clamp Diode Voltage
VCC = 2.3V, IIN = –18mA
—
–0.7
–1.2
V
VH
Input Hysteresis
VCC = 3.3V
—
100
—
mV
Quiescent Power Supply Current
VCC = 3.6V
VIN = GND or VCC
—
0.1
40
µA
Quiescent Power Supply Current
Variation
One input at VCC - 0.6V, other inputs at VCC or GND
—
—
750
µA
ICCL
ICCH
ICCZ
∆ICC
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
3
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
BUS MANAGEMENT FUNCTIONS
BUS
A
OE
L
BUS
A
BUS
B
CLKAB
X
DIR
L
CLKBA
X
SAB
X
SBA
L
OE
L
Real-Time Transfer Bus B to Bus A
BUS
A
OE
X
X
H
CLKAB
↑
X
↑
CLKBA
X
↑
↑
SAB
X
X
X
CLKAB
X
CLKBA
X
SAB
L
SBA
X
Real-Time Transfer Bus A to Bus B
BUS
A
BUS
B
DIR
X
X
X
DIR
H
BUS
B
SBA
X
X
X
OE
L
L
Storage from A, B, or A and B
BUS
B
DIR
L
H
CLKAB
X
H or L
CLKBA
H or L
X
SAB
X
H
Transfer Stored Data to A and/or B
4
SBA
H
X
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
BUS-HOLD CHARACTERISTICS
Symbol
IBHH
Parameter(1)
Bus-Hold Input Sustain Current
VCC = 3V
Bus-Hold Input Sustain Current
VCC = 2.3V
IBHL
IBHHO
Typ.(2)
Max.
Unit
– 75
—
—
µA
VI = 0.8V
75
—
—
VI = 1.7V
– 45
—
—
VI = 0.7V
45
—
—
—
±500
VI = 2V
IBHL
IBHH
Min.
Test Conditions
Bus-Hold Input Overdrive Current
VCC = 3.6V
VI = 0 to 3.6V
—
µA
µA
IBHLO
NOTES:
1. Pins with Bus-Hold are identified in the pin description.
2. Typical values are at VCC = 3.3V, +25°C ambient.
OUTPUT DRIVE CHARACTERISTICS
Symbol
VOH
VOL
Test Conditions(1)
Parameter
Output HIGH Voltage
Output LOW Voltage
Min.
Max.
Unit
V
VCC = 2.3V to 3.6V
IOH = – 0.1mA
VCC – 0.2
—
VCC = 2.3V
IOH = – 6mA
2
—
VCC = 2.3V
IOH = – 12mA
1.7
—
VCC = 2.7V
2.2
—
VCC = 3V
2.4
—
VCC = 3V
IOH = – 24mA
2
—
VCC = 2.3V to 3.6V
IOL = 0.1mA
—
0.2
VCC = 2.3V
IOL = 6mA
—
0.4
IOL = 12mA
—
0.7
VCC = 2.7V
IOL = 12mA
—
0.4
VCC = 3V
IOL = 24mA
—
0.55
V
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OPERATING CHARACTERISTICS, TA = 25°C
Symbol
Parameter
CPD
Power Dissipation Capacitance Outputs enabled
CPD
Power Dissipation Capacitance Outputs disabled
Test Conditions
CL = 0pF, f = 10Mhz
5
VCC = 2.5V ± 0.2V
VCC = 3.3V ± 0.3V
Typical
Typical
Unit
39
43
pF
10
12
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS(1)
VCC = 2.5V ± 0.2V
Symbol
Parameter
fMAX
tPLH
Propagation Delay
tPHL
xAx to xBx or xBx to xAx
tPLH
Propagation Delay
tPHL
xCLKAB to xBx or xCLKBA to xAx
VCC = 2.7V
VCC = 3.3V ± 0.3V
Min.
Max.
Min.
Max.
Min.
Max.
Unit
150
—
150
—
150
—
MHz
1
4.8
—
4.5
1
3.9
ns
1
5.6
—
5.2
1
4.5
ns
1
6.8
—
6.4
1
5.3
ns
1
6.5
—
6.2
1
5.1
ns
1
7.8
—
6.2
1
5.1
ns
1.6
5.7
—
5
1.4
4.7
ns
1.5
6.5
—
6
1.1
5.3
ns
tPLH
Propagation Delay
tPHL
xSBA or xAx or xSAB to xBx
tPZH
Output Enable Time
tPZL
xOE to xAx or xBx
tPZH
Output Enable Time
tPZL
xDIR to xAx or xBx
tPHZ
Output Disable Time
tPLZ
xOE to xAx or xBx
tPHZ
Output Disable Time
tPLZ
xDIR to xAx or xBx
tSU
Set-up Time, xAx before xCLKAB↑ or xBx before xCLKBA↑
1.6
—
1.7
—
1.4
—
ns
tH
Hold Time, xAx after xCLKAB↑ or xBx after xCLKBA↑
0.6
—
0.4
—
0.7
—
ns
tW
Pulse Width, xCLKAB or xCLKBA HIGH or LOW
3.3
—
3.3
—
3.3
—
ns
Output Skew(2)
—
—
—
—
—
500
ps
tSK(o)
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2 Skew between any two outputs of the same package and switching in the same direction.
6
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS
Symbol
VCC(1)= 3.3V±0.3V VCC(1)= 2.7V
VCC(2)= 2.5V±0.2V
Unit
VLOAD
6
6
2 x Vcc
V
VIH
2.7
2.7
Vcc
V
VT
1.5
1.5
Vcc / 2
V
VLZ
300
300
150
mV
VHZ
300
300
150
mV
CL
50
50
30
pF
(1, 2)
VIN
tPHL
VIH
VT
0V
ALVC Link
DISABLE
ENABLE
CONTROL
INPUT
GND
tPZL
D.U.T.
OUTPUT
SWITCH
NORMALLY
CLOSED
LOW
tPZH
OUTPUT
SWITCH
NORMALLY
OPEN
HIGH
500Ω
CL
ALVC Link
Test Circuit for All Outputs
tPLH
Propagation Delay
VOUT
RT
tPHL
OPPOSITE PHASE
INPUT TRANSITION
Open
500Ω
tPLH
OUTPUT
VLOAD
VCC
Pulse
Generator
VIH
VT
0V
VOH
VT
VOL
SAME PHASE
INPUT TRANSITION
tPLZ
VLOAD/2
VT
VIH
VT
0V
VLOAD/2
VLZ
VOL
tPHZ
VOH
VHZ
0V
VT
0V
ALVC Link
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Enable and Disable Times
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns.
DATA
INPUT
SWITCH POSITION
Test
GND
All Other Tests
Open
INPUT
OUTPUT 1
tPLH1
SYNCHRONOUS
CONTROL
VIH
VT
0V
VOH
VT
VOL
tSK (x)
OUTPUT 2
LOW-HIGH-LOW
PULSE
VT
tW
HIGH-LOW-HIGH
PULSE
VT
ALVC Link
tPHL2
Pulse Width
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
Output Skew - tSK(X)
tH
Set-up, Hold, and Release Times
VOH
VT
VOL
tPLH2
tSU
ALVC Link
tPHL1
tSK (x)
tREM
ASYNCHRONOUS
CONTROL
VLOAD
Disable High
Enable High
tH
TIMING
INPUT
Switch
Open Drain
Disable Low
Enable Low
tSU
VIH
VT
0V
VIH
VT
0V
VIH
VT
0V
VIH
VT
0V
ALVC Link
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
7
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
ALVC X
IDT
XX
Bus-Hold
Temp. Range
XX
Family
XX
XXX
Device Type Package
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646
16-Bit Bus Transceiver and Register with 3-State Outputs
16
Double-Density, ±24mA
H
Bus-Hold
74
–40°C to +85°C
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