Low-Power Circuit Design
R. Harrison
Transistor Gain
We’ve seen that the following configurations give us an inherent voltage gain
of AV = -gmro.
Vdd
Vdd
Vin
I
Vout
Vout
Vin
I
Thus, if we want to increase the voltage gain, we have to increase the
transconductance or the output resistance. The output resistance can be
increased by making the transistor longer. The transconductance can be
increased by raising the drain current, but this decreases the output
resistance, so this doesn’t help us. If our transistor is operating in strong
inversion, we can raise the transconductance by increasing W/L. We should
increase the width, since decreasing the length reduces the output
resistance. If our transistor is operating in weak inversion, the
transconductance is independent of W/L, so there is no way to increase it
without lowering the output resistance.
Example: Suppose we have an nMOS transistor with Early voltage VA = 20V
and W/L = 10. Calculate the transistor’s inherent voltage gain at bias currents
of I = 1nA, I = 10nA (both weak inversion), I = 10µA, and I = 100µA (both strong
inversion). In this technology, µnCox’ = 120µA/V2 and κ = 0.7.
I = 1nA:
gm = κI/UT = (0.7)(1 nA) / (26 mV) = 27 nA/V
ro = VA/I = (20 V) / (1 nA) = 20 GΩ
A = -gmro = -540 ⇒ 55 dB
I = 10nA:
gm = κI/UT = (0.7)(10 nA) / (26 mV) = 270 nA/V
ro = VA/I = (20 V) / (10 nA) = 2 GΩ
A = -gmro = -540 ⇒ 55 dB
I = 10µA:
gm = [2µnCox(W/L)I]1/2 = [2(120 µA/V2)(10)(10µA)]1/2 = 155 µA/V
ro = VA/I = (20 V) / (10 µA) = 2 MΩ
A = -gmro = -310 ⇒ 50 dB
Lecture 8
1
Low-Power Circuit Design
I = 100µA:
R. Harrison
gm = [2µnCox(W/L)I]1/2 = [2(120 µA/V2)(10)(100µA)]1/2 = 490 µA/V
ro = VA/I = (20 V) / (100 µA) = 200 kΩ
A = -gmro = -98 ⇒ 40 dB
Notice several trends:
•
In weak inversion, gain is independent of bias current and W/L ratio.
•
Gain is at a maximum in weak inversion (typically 50dB-60dB), and
decreases in strong inversion.
•
In strong inversion, gain decreases as the square root of bias current
and increases as the square root of the W/L ratio.
If we need additional gain beyond what can be obtained through a single
device, we have two options: cascade or cascode.
A cascade configuration is simply two gain stages in series:
Vdd
I
I
Vout
Vin
It is easy to see that the gain of N elementary gain stages in series is simply
the product of each individual gain:
N
Acascade = ∏ (− g mi roi )
i =1
For the case of two identical cascaded gain stages, A = (gmro)2.
Lecture 8
2
Low-Power Circuit Design
R. Harrison
The cascode configuration is shown below. The idea behind the cascode
scheme is to add a source follower at the drain of the original transistor. If
we set the source follower’s input to a dc voltage (VCAS), this device will
attempt to hold the first transistor’s drain voltage constant while Vout swings
up and down. This has the effect of multiplying the effective output
resistance ro by the gain of the circuit (approximately).
Vdd
I
Vout
VCAS
Vin
So we see that the gain of a cascode stage is given by:
Acascode ≅ −
1
(g m ro )2
κ
Lecture 8
3
Low-Power Circuit Design
R. Harrison
Another Look at the Body Effect
Our expressions for transistor operation and weak inversion and strong
inversion deal with the body effect in different ways:
•
In our weak inversion equations, we use the capacitive-divider ratio
kappa to express the partial control the gate has over the channel.
•
In our strong inversion equations, we increase the threshold voltage as
the source-to-body potential increases.
We will now show that these two expressions are equivalent.
Here, again, is the equation for saturation current in strong inversion:
ID =
1
W
(VGS − VT )2
µ n C ox′
2
L
where VT = VT 0 + γ
(
2Φ F + VSB −
2Φ F
)
Combining these equations (and assuming the bulk voltage is zero), we get:
ID =
[
1
W
µ n C ox′
VG − VT 0 − VS − γ
2
L
ID =
(
2Φ F + V S − 2Φ F
)]
2
1
W
[VG − VT 0 − f (VS )]2
µ n C ox′
2
L
We have grouped all the VS terms into a single function f(VS):
f (VS ) = VS + γ
(
2Φ F + VS −
2Φ F
)
Let’s take the derivative of this function:
df
γ
= 1+
dVS
2 2Φ F + V S
The value of the derivative at the point VS = 0 is:
df
dVS
= 1+
VS = 0
γ
2 2Φ F
=
1
κ
If we simplify our original expression by making a first-order approximation,
we can write the saturation current in strong inversion as:
V 
1
W
′
I D ≅ µ n C ox
VG − VT 0 − S 
2
L
κ 
2
Now let’s pull the κ outside the squared quantity:
Lecture 8
4
Low-Power Circuit Design
R. Harrison
ID ≅
′ W
1 µ n C ox
[κ (VG − VT 0 ) − VS ]2
2
2 κ
L
Now let’s reconsider the expression for weak inversion current:
W
I D = I0 e
L
κVG −Vs
UT
Remember that the I0 factor contains an exp(-κVT0/UT) term, so we can rewrite
this as:
W
ID = IS e
L
κ (VG −VT 0 )−Vs
UT
Where IS is the familiar specific current that defines the boundary between
weak and strong inversion current levels. Expanding this out, we get:
µ C′
W
I D = 2 n ox U T2 e
κ
L
κ (VG −VT 0 )−Vs
UT
So we have written both strong and weak inversion current in the following
form:
I D = f [κ (VG − VTO ) − VS ]
which demonstrates that the body effect results from the same physical
effects in both weak and strong inversion, despite the different
mathematical conventions used to express it.
We can now define a third important small-signal parameter for a transistor
that accounts for the body effect: the body-effect parameter or body
transconductance gmb:
g mb ≡
∂I D
∂VBS
(Note: This parameter is called gs in Johns & Martin.)
Usually we express gmb as a fraction of the gate transconductance gm:
g mb = ηg m
where eta is given by:
η=
γ
2 2Φ F + VSB
≅
1−κ
for small VSB
κ
Lecture 8
5
Low-Power Circuit Design
R. Harrison
In weak inversion we can write this as:
g mb = ηg m =
(1 − κ )I D
UT
A good rule of thumb is that gmb will usually be about one-fifth of gm. This is
due to the fact that kappa increases with VSB.
g mb = ηg m ≅ 0.2 g m
Now we can build a better small-signal model that includes the body effect:
D
G
vGS
gmvGS
vBS
S
ro
gmbvBS
B
Lecture 8
6
Low-Power Circuit Design
R. Harrison
Node Impedances
Now that we have defined all three small-signal parameters for a MOSFET,
we can consider the impedances “looking into the transistor” in different
ways:
Low Impedance
High Impedance
1/(gm + gmb)
1/gm
ro
∞
1/gm
ro
∞
1/(gm + gmb)
diode
drain
source
gate
Example: For a MOSFET in weak inversion, compute the resistances looking
into a diode-connection, the source, and the drain if the transistor is biased
at 50nA. Assume κ = 0.7 and VA = 10V.
diode: 1/gm = UT/κID = 0.74 MΩ
source: 1/(gm + gmb) = UT/ID = 0.52 MΩ
drain: ro = VA/ID = 200 MΩ
So the impedance looking into the drain is about two orders of magnitude
higher than the impedance looking into the source or into a diode-connected
transistors.
If the bias currents in a circuit are on the same order of magnitude, we can
usually determine relative node impedances by inspection. High impedance
nodes are usually associated with high gain, and usually determine the highfrequency limit of the circuit [fnode = 1/(2πRnodeCnode)].
Lecture 8
7
Low-Power Circuit Design
R. Harrison
The Differential Pair
The differential pair is a very useful subcircuit.
I1
I2
V1
V2
V
IB
The idea is that the bias current IB is divided between two branches, and the
difference between V1 and V2 determines the division. The common-source
voltage V “floats” to whatever level is necessary to insure that I1 + I2 = IB.
Let’s analyze this circuit in weak inversion.
Lecture 8
8
Low-Power Circuit Design
R. Harrison
κV1
UT
e
I1 = I B
e
κV1
UT
+e
e
I2 = IB
e
κV1
UT
κV2
UT
κV2
UT
+e
κV2
UT
IB
I2
I1
I1 + I2 = IB
IB
2
0
-100 mV
0
+100 mV
V1 - V2
What if we measure the output differentially (I1 – I2)?
Lecture 8
9
Low-Power Circuit Design
R. Harrison
Transconductance Amplifier (Voltage In; Current Out)
Here we use a pFET current mirror to subtract I2 from I1.
Vdd
I1
I1
I2
Iout = I1 - I2
V1
V2
Vout
V
IB
I out = I 1 − I 2 = I B tanh
κ (V1 − V2 )
2U T
The tanh function is a “well-behaved” function in that it has asymptotes at +1
and –1, and has a slope of 1 at the origin.
Lecture 8
10
Low-Power Circuit Design
R. Harrison
If we define Vin = V1 – V2,
I out ≅ I B
κVin
for small Vin
2U T
The overall small-signal transconductance of the circuit is given by:
Gm ≡
∂I out κI B
=
= g m1 = g m 2
∂Vin 2U T
IB
I2
I1
IB
2
0
-100 mV
0
+100 mV
V1 - V2
I1 - I2
-IB
Lecture 8
11