Hardware-in-the-Loop Simulation for Air Data Computer with a Leading-Edge Controller
"With as many as 17 time-critical processes running
in parallel, the successful integration and operation
of the system seemed hard on the processor. But
with a wide range of NI high-end controllers and
DAQ and FPGA modules, we completed the task
with minimum load to the processor. In addition, we
easily handled the customized protocol and xVDT
sensor simulation requirements with reconfigurable
NI FPGA modules."
- Rinya Ramesh, Captronic Systems Pvt. Ltd. (http://captronicsystems.com/)
The Challenge:
Developing a hardware-in-loop simulator capable of simulating different interfaces and sensors for a quad-redundant air data computer like vane
simulation, pressure simulation, total air temperature simulation, leading-edge actuator simulation, a throttle quadrant assembly, a digital engine
controller, cockpit discrete simulation, the memory peek and poke protocol, and the Inter-channel data link protocol, among others, at high data rates.
The Solution:
Using NI DAQ and FPGA hardware to accurately simulate the variety of sensors in an aircraft and develop a custom code for high-speed data
transmissions to meet Inter-channel data link protocol and memory peek and poke protocol requirements.
Author(s):
Rinya Ramesh - Captronic Systems Pvt. Ltd. (http://captronicsystems.com/)
Pradeep Kumar - Captronic Systems Pvt. Ltd. (http://captronicsystems.com/)
Justin Thomas - Captronic Systems Pvt. Ltd.
Monika Jayant - Captronic Systems Pvt. Ltd.
Krishna Mohan - Captronic Systems Pvt. Ltd.
Supreeth Jain - Captronic Systems Pvt. Ltd. (http://captronicsystems.com/)
The system has a three-tier layout: the PXI systems, panel connectors, and break-in break-out box (BOB). The two PXIe-1065 (
http://sine.ni.com/nips/cds/view/p/lang/en/nid/203670) chassis (with MXI interface), one PXIe-8135 (http://sine.ni.com/nips/cds/view/p/lang/en/nid/210545)
controller, and integrated I/O functional modules complete the PXI part of the ATE. The connector panel interfaces ADC with the ATE simulated sensor
interfaces, real sensors, and other LRU simulators as well as connects the FCC and other DAQ systems. These connectors allow the following
connections:
• Real sensor signals
• Simulated sensor signals generated entirely by our ATE—these signals are generated based on the inputs from another LRU simulator or from the local
application software
The break-in break-out panel routes all the signals generated by the ATE/FCC/real sensors to the ADC as shown in Figure 1. The system features the
following modules: left and right angle of attack (LAOA, RAOA) vane sensor simulation, angle of side slip (AOSS) vane sensor simulation, synthetic
pressure simulation, total air temperature (TAT) simulation, vane excitation simulation, throttle quadrant assembly simulation, cockpit discrete simulation,
FADEC simulation, memory peek and poke protocol to access the memory locations of ADC EEPROM and NVRAM, inter-channel datalink protocol, and
leading-edge actuator simulation.
We implemented the critical system components as follows.
xVDT Simulation: We achieved vane and leading-edge actuator (RVDT and LVDT) simulation using the FPGA-based PXI-7842R (
http://sine.ni.com/nips/cds/view/p/lang/en/nid/205129), a highly flexible multifunction reconfigurable I/O (RIO) module with analog I/O. These xVDT RIO
simulators acquire simulated or real excitation signals and generate xVDT position feedback to ADCs. Excitation for the xVDTs is generated using the
PXI-6733 (http://sine.ni.com/nips/cds/view/p/lang/en/nid/11311) modules when simulated; otherwise, excitation is directly connected from the FCC. The
flexibility of programming the FPGA card facilitated the accurate simulation of these varied types of sensors. Figure 2 shows the implementation of xVDT
Simulation.
Custom Communication Protocols: With features like data rates as high as 16 Mb/s, configurable channels, 16 DMA channels, and a full-duplex option,
the PXIe-7962R (http://sine.ni.com/nips/cds/view/p/lang/en/nid/208166) FlexRIO module along with the accompanying NI 6584 (
http://sine.ni.com/nips/cds/view/p/lang/en/nid/208119) RS422 adapter module helped us meet inter-channel datalink protocol and memory peek and poke
protocol requirements.
Inter-Channel datalink Protocol: We use an inter-channel datalink protocol to conduct inter channel communication within a redundant computer system
at data rates as high as 1 MHz or 2 MHz. We use this protocol to transmit and receive data that the local channel (ADC) has gathered through its various
I/O devices and data that the local processor produces. This data is sent across channels to be compared with data the other channels (ADCs) have
gathered to ensure data integrity. Our system can implement four channels of this protocol with Manchester coding at the configurable data rates of 1 MHz
or 2 MHz using the PXIe-7962R FlexRIO module.
Memory Peek and Poke Protocol: We use this protocol mainly to perform peek and poke operations and access all the memory resources of the ADCs
with a link speed of 5 Mb/s. Every byte of data sent using this protocol is acknowledged on the input of this protocol link. We can do this only when the
aircraft is on the ground and not in flight. We implemented four channels of this protocol in the PXIe-7962R FlexRIO module with a high execution rate to
achieve a 5 Mb/s data rate. Figure 3 shows the implementation of the custom protocols in FlexRIO.
Model Execution: Simulating the dynamics of a leading-edge actuator through a model is the key feature of this system. With the LabVIEW Model
Interface Toolkit, we can execute The MathWorks, Inc. Simulink®, FORTRAN, and C models much easier. Our system effectively uses this NI tool to
execute multiple actuator models simultaneously at rates as low as 12.5 ms. Figure 4 shows the model execution.
MIL-STD-1553 Module: The MIL-STD-1553 protocol is mainly used for handshaking and data transmission between LRUs in aircraft. Our system allows
simulated digital engine controller, and other simulated LRU’s to be connected as Remote Terminals, Bus Controller and Bus Monitor on a MIL-STD-1553
bus. It can also be connected to an external Bus controller, LRU’s and Bus Monitors.
System Execution Mode: Our system executes in two modes: stand alone and closed loop. In stand-alone mode, our system simulates different
interfaces and sensor signals and sends these signals to Quad redundant ADC’s. In closed-loop mode, our system receives input from other LRU
simulators and then simulates those sensor signals and sends it to Quad redundant ADC’s.
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Application Software: The application software features two main components: (1) the time-critical simulation and communication modules that are
deployed in the real-time controller and (2) the user interface that is deployed on the host computer. The host to real-time controller communication uses
current value tables (CVTs) and TCP/IP communication.
The host application features the following modules:
• Calibration Panel: Calibrates all the inputs/outputs of the system. This information is saved in a file using a specific format.
• Command Execution Panel: Performs memory peek/poke and I/O read and write operations using a predefined set of commands. With the test scripts
and macros, users can perform automated testing and get a results data file. During execution, the software decodes various commands using a string
parser.
• Data View: Displays the acquired data in tabbed layout formats like 1, 2, and 4 charts; numeric; and digital. CVTs are used to obtain instantaneous
values of channels in this panel.
• Model Configuration Panel: Configures the models and maps channels to both inports and outports of all the models loaded.
Figure 5 shows the application software main screen.
Benefits of Using NI Products
With as many as 17 time-critical processes running in parallel, the successful integration and operation of the system seemed hard on the processor. But
with a wide range of NI high-end controllers and DAQ and FPGA modules, we completed the task with minimum load to the processor. In addition, we
easily handled the customized protocol and xVDT sensor simulation requirements with reconfigurable NI FPGA modules.
Simulink® is a registered trademark of The MathWorks, Inc.
A National Instruments Alliance Partner is a business entity independent from National Instruments and has no agency, partnership, or joint-venture
relationship with National Instruments.
Author Information:
Rinya Ramesh
Captronic Systems Pvt. Ltd. (http://captronicsystems.com/)
#3, Victorian Meadows, Airport-Varthur Road, Munekolalu, Marathalli (PO)
Bangalore
India
Tel: 080-40373900
rinya@captronicsytems.com (mailto:rinya@captronicsytems.com)
Figure 1. Hardware-in-the-Loop Simulation System Schematic
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Figure 2. xVDT Simulation Schematic
Figure 3. Custom Protocol Implementation in FlexRIO
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Figure 4. Model Execution Schematic
Figure 5. Host Application Software Main Screen
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